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Change subject: security/intel/txt: Set up TPM in bootblock if using measured boot
......................................................................
Patch Set 1: Code-Review+2
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Hello build bot (Jenkins), Nico Huber, Angel Pons, Krystian Hebel, Kyösti Mälkki, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52779
to look at the new patch set (#2).
Change subject: mb/pcengines/apu1: Disable memory bank interleaving
......................................................................
mb/pcengines/apu1: Disable memory bank interleaving
Bank interleaving does not work on this platform, disable it.
AmdInitPost returns success thanks to this setting.
TEST=boot apu1 and see AGESA_SUCCESS after AmdInitPost
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: Id555b458c61df9a27a93f44f600d1718867106ca
---
M src/mainboard/pcengines/apu1/OemCustomize.c
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/52779/2
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Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/51133 )
Change subject: Add support to switch LSPCON modes
......................................................................
Patch Set 11:
(1 comment)
Commit Message:
https://review.coreboot.org/c/libgfxinit/+/51133/comment/2a54d933_35886027
PS11, Line 9: highly-cursed
> Any suggestions on what to replace it with? Or can I just leave it as-is?
I'd drop it. it's not a technical term, and it doesn't make sense outside of coreboot IRC and reddit, pretty much.
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Change subject: security/intel/cbnt: Rename bg-prov to cbnt-prov
......................................................................
Patch Set 1: Code-Review+1
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52971 )
Change subject: UPDATE 3rdparty/intel-sec-tools
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52971/comment/14fee875_bde6a0a0
PS1, Line 7: UPDATE 3rdparty/intel-sec-tools
There's no need to shout (uppercase text):
3rdparty/intel-sec-tools: Update submodule pointer
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Change subject: security/tpm/tspi/crtm: Fix FMAP TPM PCR
......................................................................
Patch Set 2: Code-Review+1
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Change subject: Add support to switch LSPCON modes
......................................................................
Patch Set 11:
(1 comment)
Commit Message:
https://review.coreboot.org/c/libgfxinit/+/51133/comment/651e8b17_450abf25
PS11, Line 9: highly-cursed
> although accurate, not sure this adds anything of value
Any suggestions on what to replace it with? Or can I just leave it as-is?
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