coreboot-gerrit May 2021

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Change in coreboot[master]: mb/amd/bilby,cereme,mandolin: change PSPP policy to balanced
by Marshall Dawson (Code Review) 27 May '21

27 May '21

Attention is currently required from: Jason Glenesk, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54935 ) Change subject: mb/amd/bilby,cereme,mandolin: change PSPP policy to balanced ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54935 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7571ed92b3c3fa79581e2c7342960ca31451af1f Gerrit-Change-Number: 54935 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 May 2021 17:23:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: IMOK: Add IMOK method support for DPTF
by Sumeet R Pawnikar (Code Review) 27 May '21

27 May '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Aaron Durbin, Karthik Ramasubramanian. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54688 ) Change subject: IMOK: Add IMOK method support for DPTF ...................................................................... Patch Set 2: (1 comment) File src/ec/google/chromeec/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/54688/comment/66e86fe1_780c353a PS1, Line 262: DPTF > I agree this file is already mixed with DPTF usages. If possible we should avoid adding more. […] Sure, will add appropriate config checks as per comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/54688 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8edfa3bcaa6bde0b9690fcace000cd582dcc81d2 Gerrit-Change-Number: 54688 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 27 May 2021 17:18:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/fpu_enable.inc: Remove file
by Kyösti Mälkki (Code Review) 27 May '21

27 May '21

Attention is currently required from: Arthur Heymans. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55008 ) Change subject: cpu/x86/fpu_enable.inc: Remove file ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55008 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I530bb217bb9a944990232dcf4e08f160b5267512 Gerrit-Change-Number: 55008 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 27 May 2021 17:09:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Makefile: Remove the -mno-mmx flag
by Kyösti Mälkki (Code Review) 27 May '21

27 May '21

Attention is currently required from: Arthur Heymans, Martin Roth, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55009 ) Change subject: Makefile: Remove the -mno-mmx flag ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: CB:27101 I think the correct arument here might not be BUILD_TIMELESS, but noting that the affected AMD platforms, for which -mno-mmx is removed, only reference mmx registers in pre-C environment. -- To view, visit https://review.coreboot.org/c/coreboot/+/55009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d22aea7be3ff521fd289504bb131c32a19fab4b Gerrit-Change-Number: 55009 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 27 May 2021 17:05:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add firmware configuration probing for audio
by Tim Wawrzynczak (Code Review) 27 May '21

27 May '21

Attention is currently required from: Furquan Shaikh, Sugnan Prabhu S, Sathya Prakash M R, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54716 ) Change subject: mb/google/brya: Add firmware configuration probing for audio ...................................................................... Patch Set 6: Code-Review+2 (1 comment) Patchset: PS6: Thanks Sugnan, I have some plans to make integrating fw_config w/ GPIOs a little nicer, but I'm not done, this works for now! -- To view, visit https://review.coreboot.org/c/coreboot/+/54716 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f159442516830f9d304d78c83f070e4fcff4a37 Gerrit-Change-Number: 54716 Gerrit-PatchSet: 6 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sathya Prakash M R <sathya.prakash.m.r(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Sathya Prakash M R <sathya.prakash.m.r(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 27 May 2021 16:59:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Update real time chat options
by Angel Pons (Code Review) 27 May '21

27 May '21

Attention is currently required from: Stefan Reinauer, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55010 ) Change subject: Documentation: Update real time chat options ...................................................................... Patch Set 1: -Code-Review (1 comment) Patchset: PS1: > Let's see how official Stefan wants his little playground to be. Agreed. -- To view, visit https://review.coreboot.org/c/coreboot/+/55010 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3035266c5e035b954c0d709bd2c09069128c3340 Gerrit-Change-Number: 55010 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 May 2021 16:59:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: acpi: Add support for reporting CrashLog in BERT table
by Felix Held (Code Review) 27 May '21

27 May '21

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49799 ) Change subject: acpi: Add support for reporting CrashLog in BERT table ...................................................................... Patch Set 10: (1 comment) Patchset: PS10: > The Key here is understanding the picture I provided to see how the raw data concept fully fit into […] CB:55006 is supposed to be used in combination with CB:54738 , right? sure, the generation of the data structures in the bert region is and should be soc-specific. the acpi code that generates the bert ssdt that points to the bert memory region if there's something in there should be generic code though https://review.coreboot.org/c/coreboot/+/54149/2/src/soc/amd/picasso/agesa_… while this https://review.coreboot.org/c/coreboot/+/49799/10/src/acpi/acpi.c#1585 introduces two more functions that are implemented in the intel soc code despite common functionality for this already being available in the existing common bert code -- To view, visit https://review.coreboot.org/c/coreboot/+/49799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00e390d735d61beac2e89a726e39119d9b06b3df Gerrit-Change-Number: 49799 Gerrit-PatchSet: 10 Gerrit-Owner: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nikunj Dadhania <nikunj.dadhania(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Thu, 27 May 2021 16:59:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/timestamp.inc: Remove unused file
by Kyösti Mälkki (Code Review) 27 May '21

27 May '21

Attention is currently required from: Arthur Heymans. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55007 ) Change subject: arch/x86/timestamp.inc: Remove unused file ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55007 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d4f8bcdac7e15d60540157e9d2ac98603320977 Gerrit-Change-Number: 55007 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 27 May 2021 16:44:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: add devicetree setting for PSPP policy
by Felix Held (Code Review) 27 May '21

27 May '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/54934 ) Change subject: soc/amd/picasso: add devicetree setting for PSPP policy ...................................................................... soc/amd/picasso: add devicetree setting for PSPP policy Since the default for the corresponding UPD of the Picasso FSP is DXIO_PSPP_POWERSAVE and the devicetree default is DXIO_PSPP_PERFORMANCE, add a deviectree setting for each board that's using the Picasso SoC code to not change the setting for the existing boards. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I0008ebb0c0f339ed3bdf24ab95a20aa83d5be2c9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54934 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/mainboard/amd/bilby/devicetree.cb M src/mainboard/amd/mandolin/variants/cereme/devicetree.cb M src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/fsp_m_params.c 7 files changed, 20 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved diff --git a/src/mainboard/amd/bilby/devicetree.cb b/src/mainboard/amd/bilby/devicetree.cb index a3385b9..7797c3e 100644 --- a/src/mainboard/amd/bilby/devicetree.cb +++ b/src/mainboard/amd/bilby/devicetree.cb @@ -136,6 +136,8 @@ register "gpp_clk_config[5]" = "GPP_CLK_REQ" register "gpp_clk_config[6]" = "GPP_CLK_REQ" + register "pspp_policy" = "DXIO_PSPP_POWERSAVE" + device cpu_cluster 0 on device lapic 0 on end end diff --git a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb index ee0af53..9a3e78e 100644 --- a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb +++ b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb @@ -136,6 +136,8 @@ register "gpp_clk_config[5]" = "GPP_CLK_OFF" register "gpp_clk_config[6]" = "GPP_CLK_OFF" + register "pspp_policy" = "DXIO_PSPP_POWERSAVE" + device cpu_cluster 0 on device lapic 0 on end end diff --git a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb index 994c910..826a84b 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb +++ b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb @@ -136,6 +136,8 @@ register "gpp_clk_config[5]" = "GPP_CLK_REQ" register "gpp_clk_config[6]" = "GPP_CLK_REQ" + register "pspp_policy" = "DXIO_PSPP_POWERSAVE" + device cpu_cluster 0 on device lapic 0 on end end diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index a8c270e..2525400 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -250,6 +250,8 @@ register "gpp_clk_config[5]" = "GPP_CLK_OFF" register "gpp_clk_config[6]" = "GPP_CLK_OFF" + register "pspp_policy" = "DXIO_PSPP_POWERSAVE" + device cpu_cluster 0 on device lapic 0 on end end diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 840dfe7..89bca93 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -243,6 +243,8 @@ register "gpp_clk_config[5]" = "GPP_CLK_OFF" register "gpp_clk_config[6]" = "GPP_CLK_OFF" + register "pspp_policy" = "DXIO_PSPP_POWERSAVE" + device cpu_cluster 0 on device lapic 0 on end end diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 359fa95..4c43b1f 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -263,6 +263,13 @@ GPP_CLK_OFF, /* GPP clk off */ } gpp_clk_config[GPP_CLK_OUTPUT_COUNT]; + /* performance policy for the PCIe links: power consumption vs. link speed */ + enum { + DXIO_PSPP_PERFORMANCE = 0, + DXIO_PSPP_BALANCED, + DXIO_PSPP_POWERSAVE, + } pspp_policy; + /* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */ bool acp_i2s_use_external_48mhz_osc; diff --git a/src/soc/amd/picasso/fsp_m_params.c b/src/soc/amd/picasso/fsp_m_params.c index f196e48..3532fb2 100644 --- a/src/soc/amd/picasso/fsp_m_params.c +++ b/src/soc/amd/picasso/fsp_m_params.c @@ -112,5 +112,8 @@ mcfg->sata_enable = devtree_sata_dev_enabled(); mcfg->hdmi2_disable = config->hdmi2_disable; + /* PCIe power vs. speed */ + mcfg->pspp_policy = config->pspp_policy; + mainboard_updm_update(mcfg); } -- To view, visit https://review.coreboot.org/c/coreboot/+/54934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0008ebb0c0f339ed3bdf24ab95a20aa83d5be2c9 Gerrit-Change-Number: 54934 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Apply more uses for Kconfig TPM
by Kyösti Mälkki (Code Review) 27 May '21

27 May '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55016 ) Change subject: Apply more uses for Kconfig TPM ...................................................................... Apply more uses for Kconfig TPM Change-Id: I54b296563940cd46fe9da9fe789b746f2fc1987d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/drivers/tpm/Kconfig M src/security/intel/txt/Kconfig M src/security/tpm/Kconfig M src/security/vboot/Kconfig M src/security/vboot/Makefile.inc 5 files changed, 7 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/55016/1 diff --git a/src/drivers/tpm/Kconfig b/src/drivers/tpm/Kconfig index 79b860f..735cfee 100644 --- a/src/drivers/tpm/Kconfig +++ b/src/drivers/tpm/Kconfig @@ -1,6 +1,6 @@ config TPM_INIT_RAMSTAGE bool - default y if TPM1 || TPM2 + default y if TPM depends on !VBOOT && !VENDORCODE_ELTAN_VBOOT && !VENDORCODE_ELTAN_MBOOT \ && !TPM_MEASURED_BOOT_INIT_BOOTBLOCK help @@ -9,7 +9,7 @@ config TPM_PPI bool "Generate ACPI code to implement TPM physical presence interface" - depends on TPM1 || TPM2 + depends on TPM depends on HAVE_ACPI_TABLES depends on !CHROMEOS default y if PAYLOAD_TIANOCORE diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig index 14b4f6a..3648925 100644 --- a/src/security/intel/txt/Kconfig +++ b/src/security/intel/txt/Kconfig @@ -7,7 +7,7 @@ select ENABLE_VMX if CPU_INTEL_COMMON select AP_IN_SIPI_WAIT select TPM_MEASURED_BOOT_INIT_BOOTBLOCK if TPM_MEASURED_BOOT - depends on (TPM1 || TPM2) + depends on TPM depends on CPU_INTEL_FIRMWARE_INTERFACE_TABLE depends on PLATFORM_HAS_DRAM_CLEAR depends on (SOC_INTEL_COMMON_BLOCK_SA || HAVE_CF9_RESET) diff --git a/src/security/tpm/Kconfig b/src/security/tpm/Kconfig index e228a3d..4864f12 100644 --- a/src/security/tpm/Kconfig +++ b/src/security/tpm/Kconfig @@ -70,7 +70,7 @@ bool "Output verbose TPM debug messages" default n select DRIVER_TPM_DISPLAY_TIS_BYTES if I2C_TPM - depends on TPM1 || TPM2 + depends on TPM help This option enables additional TPM related debug messages. @@ -96,7 +96,7 @@ bool "Enable Measured Boot" default n select VBOOT_LIB - depends on TPM1 || TPM2 + depends on TPM depends on !VBOOT_RETURN_FROM_VERSTAGE help Enables measured boot (experimental) diff --git a/src/security/vboot/Kconfig b/src/security/vboot/Kconfig index 515efc7..0368758 100644 --- a/src/security/vboot/Kconfig +++ b/src/security/vboot/Kconfig @@ -13,7 +13,7 @@ bool "Verify firmware with vboot." default n select VBOOT_LIB - select VBOOT_MOCK_SECDATA if !TPM1 && !TPM2 + select VBOOT_MOCK_SECDATA if !TPM depends on 0 = 0 # Must have a 'depends on' or board overrides will break it. help Enabling VBOOT will use vboot to verify the components of the firmware diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc index 668d3d9..47830f3 100644 --- a/src/security/vboot/Makefile.inc +++ b/src/security/vboot/Makefile.inc @@ -109,9 +109,7 @@ ramstage-y += secdata_tpm.c endif -ifneq ($(CONFIG_TPM1)$(CONFIG_TPM2),) -verstage-y += tpm_common.c -endif +verstage-$(CONFIG_TPM) += tpm_common.c romstage-y += common.c -- To view, visit https://review.coreboot.org/c/coreboot/+/55016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I54b296563940cd46fe9da9fe789b746f2fc1987d Gerrit-Change-Number: 55016 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit May 2021