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Change subject: lint: checkpatch: Ignore ASSIGN_IN_IF and UNNECESSARY_ELSE errors
......................................................................
Patch Set 3: Code-Review+2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/asurada: early-init eMMC
......................................................................
mb/google/asurada: early-init eMMC
Some eMMCs need 80+ms for CMD1 to complete. And the payload may need to
access eMMC in the very early stage (for example, Depthcharge needs it
20ms after started) so we have to start initialization in coreboot.
On Hayato Chromebook this can save ~100ms in total.
BUG=b:177389446
TEST=emerge-asurada coreboot
BRANCH=asurada
Signed-off-by: Wenbin Mei <wenbin.mei(a)mediatek.com>
Change-Id: I2f58d203e969dc1a13a479d7dc63b1b162a9ae3f
---
M src/mainboard/google/asurada/mainboard.c
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/51973/2
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Hello Hung-Te Lin, Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Yu-Ping Wu, Yidi Lin,
I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek: add new driver 'msdc' for eMMC
......................................................................
soc/mediatek: add new driver 'msdc' for eMMC
Add MTK host mmc driver support.
MTK host controller support eMMC5.1 spec.
BUG=b:177389446
TEST=emerge-asurada coreboot
BRANCH=asurada
Signed-off-by: Wenbin Mei <wenbin.mei(a)mediatek.com>
Change-Id: I54a7749ed167c00cd631a76af7c67c654c7bc725
---
M src/commonlib/include/commonlib/sd_mmc_ctrlr.h
A src/soc/mediatek/common/include/soc/msdc.h
A src/soc/mediatek/common/msdc.c
M src/soc/mediatek/mt8192/Makefile.inc
4 files changed, 686 insertions(+), 0 deletions(-)
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Shaoming Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51432 )
Change subject: soc/mediatek: dsi: fine tune the delta time for EoTp
......................................................................
Patch Set 5:
(2 comments)
File src/soc/mediatek/common/dsi.c:
https://review.coreboot.org/c/coreboot/+/51432/comment/6bf57fa0_15cc7fe0
PS2, Line 207: 10
> Your implementation in patchset_5 is not align with b/173603645#comment63. […]
The effect is the same with MIPI_DSI_MODE_EOT_PACKET, 12 byte also.
File src/soc/mediatek/common/dsi.c:
https://review.coreboot.org/c/coreboot/+/51432/comment/5cb276f2_0ed6b06e
PS5, Line 213: 6
> Do we need to modify it?
It's same with before, delta += 6
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Hello Varshit B Pandya, build bot (Jenkins), Dana Alkattan, Francois Toguo Fotso, Rizwan Qureshi, Subrata Banik, Sridhar Siricilla, Ronak Kanabar, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M
......................................................................
soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M
Added new LPC and IGD device IDs for Alderlake M.
Also added entry for CPUID_ALDERLAKE_M_A0 in report_platform.c
BUG=None
BRANCH=None
TEST=check if platform information print is coming properly in coreboot
Change-Id: If33c43da8cbd786261b00742e342f0f01622c607
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
---
M src/include/device/pci_ids.h
M src/soc/intel/alderlake/bootblock/report_platform.c
M src/soc/intel/common/block/graphics/graphics.c
M src/soc/intel/common/block/lpc/lpc.c
4 files changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/50138/23
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Meera Ravindranath has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/51408 )
Change subject: src/arch/smbios.c: Allow mainboard to fill Vendor name
......................................................................
Abandoned
Fixed through a kernel CL
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Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52012 )
Change subject: soc/intel/alderlake: Enable RMT
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> @Furquan, do you thimnk it okay to keep this in soc code?
We should mark this as WIP and not merge it. We don't really want RMT to be enabled all the time. It is only for test purpose.
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