coreboot-gerrit April 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/tpm/Kconfig: TPM_INIT for measured boot only
by Frans Hendriks (Code Review) 02 Apr '21

02 Apr '21

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52050 ) Change subject: drivers/tpm/Kconfig: TPM_INIT for measured boot only ...................................................................... drivers/tpm/Kconfig: TPM_INIT for measured boot only TPM_INIT depends on VBOOT but should also depend on VENDORCODE_ELTAN_xBOOT. Add dependency. TPM_INIT will be enable for measured boot only. BUG = NA TEST = Boot Facebook FB7101 with possible combinaties of VBOOT, measured boot and eltan security. Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Change-Id: I03f8457731c73c653bd82b1042bda3fc2d797feb --- M src/drivers/tpm/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/52050/1 diff --git a/src/drivers/tpm/Kconfig b/src/drivers/tpm/Kconfig index baf760b..d8a1e10 100644 --- a/src/drivers/tpm/Kconfig +++ b/src/drivers/tpm/Kconfig @@ -1,7 +1,7 @@ config TPM_INIT bool default y if TPM1 || TPM2 - depends on !VBOOT + depends on !VBOOT && !VENDORCODE_ELTAN_VBOOT && !VENDORCODE_ELTAN_MBOOT help This driver automatically initializes the TPM if vboot is not used. The TPM driver init is done during the ramstage chip init phase. -- To view, visit https://review.coreboot.org/c/coreboot/+/52050 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03f8457731c73c653bd82b1042bda3fc2d797feb Gerrit-Change-Number: 52050 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera
by Wentao Qin (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Paul Menzel, Tao Xia, Karthik Ramasubramanian, ShawnX Tu. Wentao Qin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52048 ) Change subject: mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52048/comment/5850dd64_10e4fa83 PS1, Line 9: modifying > increasing Done https://review.coreboot.org/c/coreboot/+/52048/comment/3da6c5be_c8ff700e PS1, Line 9: Solve NVM not working > What does not work exactly? Currently, we set in coreboot to create NVM file nodes normally, but it’s failed to dump the nvm data by test command. # cat /sys/bus/i2c/devices/i2c-PRP0001:01/eeprom > ./ov8856_eeprom_test.bin # hexdump -C ./ov8856_eeprom_test.bin > ov8856_eeprom_dump.log # cat ov8856_eeprom_dump.log It will report the following error: cat: '/sys/bus/i2c/devices/i2c-PRP0001:01/eeprom': Connection timed out -- To view, visit https://review.coreboot.org/c/coreboot/+/52048 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia933927981f07e0f7954a4bc6d82f0bdd70181f5 Gerrit-Change-Number: 52048 Gerrit-PatchSet: 3 Gerrit-Owner: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jessie Xu <xuyanan(a)huaqin.corp-partner.google.com> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Comment-Date: Fri, 02 Apr 2021 09:18:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera
by Wentao Qin (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Tao Xia, Karthik Ramasubramanian, ShawnX Tu. Wentao Qin has uploaded a new patch set (#3) to the change originally created by Tao Xia. ( https://review.coreboot.org/c/coreboot/+/52048 ) Change subject: mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera ...................................................................... mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera Currently,it’s failed to dump the nvm data by test command. It will report the following error: cat: '/sys/bus/i2c/devices/i2c-PRP0001:01/eeprom': Connection timed out So increasing the value from 0x0400 to 0x2000 and address_width from 0x08 to 0x10 can solve this problem BUG=b:177393430 TEST=1.cat /sys/bus/i2c/devices/i2c-PRP0001:01/eeprom > /tmp/ov8856_eeprom.bin 2.hexdump -C /tmp/ov8856_eeprom.bin > ov8856_eeprom_dump.log 3.cat ov8856_eeprom_dump.log Signed-off-by: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Change-Id: Ia933927981f07e0f7954a4bc6d82f0bdd70181f5 --- M src/mainboard/google/dedede/variants/storo/overridetree.cb 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/52048/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52048 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia933927981f07e0f7954a4bc6d82f0bdd70181f5 Gerrit-Change-Number: 52048 Gerrit-PatchSet: 3 Gerrit-Owner: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jessie Xu <xuyanan(a)huaqin.corp-partner.google.com> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera
by Wentao Qin (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Tao Xia, Karthik Ramasubramanian, ShawnX Tu. Wentao Qin has uploaded a new patch set (#2) to the change originally created by Tao Xia. ( https://review.coreboot.org/c/coreboot/+/52048 ) Change subject: mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera ...................................................................... mb/google/dedede/var/storo: Modify eeprom setting for MIPI camera Currently,it’s failed to dump the nvm data by test command. It will report the following error: cat: '/sys/bus/i2c/devices/i2c-PRP0001:01/eeprom': Connection timed out So increasing the value from 0x0400 to 0x2000 and address_width from 0x08 to 0x10 BUG=b:177393430 TEST=1.cat /sys/bus/i2c/devices/i2c-PRP0001:01/eeprom > /tmp/ov8856_eeprom.bin 2.hexdump -C /tmp/ov8856_eeprom.bin > ov8856_eeprom_dump.log 3.cat ov8856_eeprom_dump.log Signed-off-by: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Change-Id: Ia933927981f07e0f7954a4bc6d82f0bdd70181f5 --- M src/mainboard/google/dedede/variants/storo/overridetree.cb 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/52048/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52048 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia933927981f07e0f7954a4bc6d82f0bdd70181f5 Gerrit-Change-Number: 52048 Gerrit-PatchSet: 2 Gerrit-Owner: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jessie Xu <xuyanan(a)huaqin.corp-partner.google.com> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: ShawnX Tu <shawnx.tu(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek: add new driver 'msdc' for eMMC
by Angel Pons (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Wenbin Mei, Yu-Ping Wu. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51966 ) Change subject: soc/mediatek: add new driver 'msdc' for eMMC ...................................................................... Patch Set 5: Code-Review+1 (21 comments) File src/soc/mediatek/common/include/soc/msdc.h: https://review.coreboot.org/c/coreboot/+/51966/comment/bbdaaf07_8b7b5d57 PS5, Line 25: Please avoid mixing tabs and spaces to align the values. Either tabs or spaces, but not both https://review.coreboot.org/c/coreboot/+/51966/comment/111b8148_3764204f PS5, Line 66: /* MSDC_CFG mask */ I usually place bitfield definitions right after the corresponding register offset define, but I like this approach too. 😊 (No action needed here) https://review.coreboot.org/c/coreboot/+/51966/comment/c41cbccb_bb3fe60e PS5, Line 84: #define MSDC_FIFOCS_CLR (0x1 << 31) /* RW */ The `MSDC_FIFOCS_TXCNT` mask already contains bit 31 (`MSDC_FIFOCS_CLR`), is this intentional? https://review.coreboot.org/c/coreboot/+/51966/comment/a5861fb0_48a9bc99 PS5, Line 96: #define SDC_CMD_WR BIT(13) nit: For consistency with the other macros, I wouldn't use `BIT(x)` here: #define SDC_CMD_STOP (1 << 14) #define SDC_CMD_WR (1 << 13) https://review.coreboot.org/c/coreboot/+/51966/comment/936fcf82_e3bb33aa PS5, Line 102: #define SDC_CMD_CMD_S 0 If I understand correctly, the `_S` suffix means shift, and the `_M` suffix means mask. I would define the mask using the corresponding shift: #define SDC_CMD_CMD_S 0 #define SDC_CMD_CMD_M (0x3f << SDC_CMD_CMD_S) #define SDC_CMD_RSPTYP_S 7 #define SDC_CMD_RSPTYP_M (0x7 << SDC_CMD_RSPTYP_S) #define SDC_CMD_DTYPE_S 11 #define SDC_CMD_DTYPE_M (0x3 << SDC_CMD_DTYPE_S) #define SDC_CMD_WR (1 << 13) #define SDC_CMD_STOP (1 << 14) #define SDC_CMD_BLK_LEN_S 16 #define SDC_CMD_BLK_LEN_M (0xfff << SDC_CMD_BLK_LEN_S) I've also inverted the ordering, for consistency with the macros for the other registers https://review.coreboot.org/c/coreboot/+/51966/comment/e243cd30_a070328c PS5, Line 143: #define MSDC_TIMEOUT (1000*1000) /* 1S */ I would add a `_MS` or `_US` suffix to indicate the units the value is expressed in: #define CMD_TIMEOUT_MS (5 * 100) /* 500ms */ #define MSDC_TIMEOUT_US (1000 * 1000) /* 1s */ And I think we have macros somewhere in commonlib to convert between time units, which could also be used https://review.coreboot.org/c/coreboot/+/51966/comment/8fa0ac00_0f11fdc9 PS5, Line 167: int nit: bool? File src/soc/mediatek/common/msdc.c: https://review.coreboot.org/c/coreboot/+/51966/comment/9d6d02a7_4005963d PS5, Line 12: int unsigned int https://review.coreboot.org/c/coreboot/+/51966/comment/bc89fb5b_6951eabc PS5, Line 14: static inline u32 div_round_up(u32 n, u32 d) { return (n + d - 1) / d; } There's a DIV_ROUND_UP macro in commonlib/bsd/helpers.h https://review.coreboot.org/c/coreboot/+/51966/comment/2d694490_4321c38a PS5, Line 22: write32(reg, tv); This could be replaced with: clrsetbits32(reg, field, val << __ffs(field)); https://review.coreboot.org/c/coreboot/+/51966/comment/98726d1b_9ce1fbaf PS5, Line 33: int u32? https://review.coreboot.org/c/coreboot/+/51966/comment/6d4f3f4b_98176036 PS5, Line 45: return MSDC_SUCCESS; I'd suggest using the timer API (timer.h): #include <timer.h> static int msdc_poll_timeout(void *addr, u32 mask) { struct stopwatch timer; stopwatch_init_usecs_expire(&timer, MSDC_TIMEOUT); u32 reg; do { reg = read32(addr); if (stopwatch_expired(&timer)) return -MSDC_NOT_READY; udelay(1); } while (reg & mask); return MSDC_SUCCESS; } https://review.coreboot.org/c/coreboot/+/51966/comment/0fb843d2_5ee3a230 PS5, Line 57: while (!(reg & mask)) { nit: I would use a do-while loop like on `msdc_poll_timeout` https://review.coreboot.org/c/coreboot/+/51966/comment/d6348365_36bc9d13 PS5, Line 61: *status = reg; Missing a null pointer check? if (status) *status = reg; https://review.coreboot.org/c/coreboot/+/51966/comment/6fa05d7c_d44fcdbc PS5, Line 72: static void msdc_reset_hw(struct msdc_ctrlr *host) nit: should this function return an error if reset and FIFO clear times out? https://review.coreboot.org/c/coreboot/+/51966/comment/634b3bb4_3aed38d0 PS5, Line 162: resp = 0x1; nit: you could return the value directly https://review.coreboot.org/c/coreboot/+/51966/comment/93b48d88_4a79e3d6 PS5, Line 243: ((dtype << SDC_CMD_DTYPE_S) & SDC_CMD_DTYPE_M); I'd suggest splitting this in multiple statements: rawcmd |= (opcode << SDC_CMD_CMD_S) & SDC_CMD_CMD_M; rawcmd |= (resp_type << SDC_CMD_RSPTYP_S) & SDC_CMD_RSPTYP_M; rawcmd |= (blocksize << SDC_CMD_BLK_LEN_S) & SDC_CMD_BLK_LEN_M; rawcmd |= (dtype << SDC_CMD_DTYPE_S) & SDC_CMD_DTYPE_M; https://review.coreboot.org/c/coreboot/+/51966/comment/6a81c517_9f55ec35 PS5, Line 269: if (cmd->cmdidx != MMC_CMD_AUTO_TUNING_SEQUENCE) nit: I'd add braces here. Even though they're not strictly required because there's only one statement, the comment spans multiple lines https://review.coreboot.org/c/coreboot/+/51966/comment/79b248f7_65993a91 PS5, Line 328: return cmd_ret; nit: Just return `msdc_start_command(host, cmd, data)` directly? https://review.coreboot.org/c/coreboot/+/51966/comment/090691d0_ccd74b1c PS5, Line 454: sizeof(int) nit: sizeof(status) ? https://review.coreboot.org/c/coreboot/+/51966/comment/7206d7f3_58bc1e87 PS5, Line 477: memset(&media, 0, sizeof(media)); You can zero-initialize media without memset: struct storage_media media = { 0 }; -- To view, visit https://review.coreboot.org/c/coreboot/+/51966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I54a7749ed167c00cd631a76af7c67c654c7bc725 Gerrit-Change-Number: 51966 Gerrit-PatchSet: 5 Gerrit-Owner: Wenbin Mei <wenbin.mei(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidi.lin(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Wenbin Mei <wenbin.mei(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 02 Apr 2021 08:47:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/hp/snb_ivb_laptops: Remove undefined variable in cmos.default
by Angel Pons (Code Review) 02 Apr '21

02 Apr '21

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51670 ) Change subject: mb/hp/snb_ivb_laptops: Remove undefined variable in cmos.default ...................................................................... mb/hp/snb_ivb_laptops: Remove undefined variable in cmos.default There is no "volume" defined in cmos.layout now, so removing "volume=" from cmos.default, otherwise building will fail with CONFIG_USE_OPTION_TABLE set. Change-Id: I1d6bb68fb927882ddcc052b432bb34b42c58eac7 Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51670 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/hp/snb_ivb_laptops/cmos.default 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Iru Cai (vimacs): Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.default b/src/mainboard/hp/snb_ivb_laptops/cmos.default index ba33ddf..ad822d5 100644 --- a/src/mainboard/hp/snb_ivb_laptops/cmos.default +++ b/src/mainboard/hp/snb_ivb_laptops/cmos.default @@ -2,5 +2,4 @@ debug_level=Debug power_on_after_fail=Disable nmi=Enable -volume=0x3 sata_mode=AHCI -- To view, visit https://review.coreboot.org/c/coreboot/+/51670 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d6bb68fb927882ddcc052b432bb34b42c58eac7 Gerrit-Change-Number: 51670 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/hp/snb_ivb_laptops: Remove undefined variable in cmos.default
by Angel Pons (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Bill XIE. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51670 ) Change subject: mb/hp/snb_ivb_laptops: Remove undefined variable in cmos.default ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51670 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d6bb68fb927882ddcc052b432bb34b42c58eac7 Gerrit-Change-Number: 51670 Gerrit-PatchSet: 1 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Comment-Date: Fri, 02 Apr 2021 08:07:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/mb/ocp: Update Delta Lake documentation
by Angel Pons (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Paul Menzel, Stefan Reinauer, ron minnich, Tim Chu. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51824 ) Change subject: Documentation/mb/ocp: Update Delta Lake documentation ...................................................................... Patch Set 5: Code-Review+1 (4 comments) File Documentation/mainboard/ocp/deltalake.md: https://review.coreboot.org/c/coreboot/+/51824/comment/ba85f813_2f3e7319 PS5, Line 31: Intel. > Align below ACM as done above. Or even move it to the previous line (it should fit) https://review.coreboot.org/c/coreboot/+/51824/comment/6b7672eb_57606215 PS5, Line 103: - KM/BPM signing > Don’t use tabs for consistency? Yeah, I'd use 8 spaces https://review.coreboot.org/c/coreboot/+/51824/comment/28097e98_b1082896 PS5, Line 151: CLTT CLTT = Closed Loop Thermal Throttling? I'd add the full form in parentheses: - CLTT (Closed Loop Thermal Throttling) https://review.coreboot.org/c/coreboot/+/51824/comment/c1e68483_29b44a9d PS5, Line 152: - ProcHot > I have no idea, what that means. PROCHOT# is a signal that is used to report "Processor Hot", and activate thermal protections. I forget about the specifics. I agree it would be nice to elaborate a bit on what exactly doesn't work -- To view, visit https://review.coreboot.org/c/coreboot/+/51824 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifd6ab251cd7806cf8cd3f984ad88c091f85035cf Gerrit-Change-Number: 51824 Gerrit-PatchSet: 5 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Apr 2021 08:05:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: *x86: Support x2apic mode
by Paul Menzel (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Furquan Shaikh, Jamie Ryu, Wonkyu Kim, Subrata Banik, Raj Astekar, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51723 ) Change subject: *x86: Support x2apic mode ...................................................................... Patch Set 6: Code-Review+1 (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/51723/comment/7f15ac20_45c77529 PS6, Line 10: LAPIC_BASE_MSR(LAPIC_BASE_MSR_X2APIC_MODE) Please add a space before the (. https://review.coreboot.org/c/coreboot/+/51723/comment/6f994713_5f9b9a65 PS6, Line 11: implment implement https://review.coreboot.org/c/coreboot/+/51723/comment/2d7bb4c3_ec2a6638 PS6, Line 21: cat /proc/cpuinfo | grep "apicid" No need to use cat. ;-) grep apicid /proc/cpuinfo Patchset: PS5: > Why are there three +2, if a 500 line change does not have a commit message consisting of one line? *does only have a commit message body consisting of one line. -- To view, visit https://review.coreboot.org/c/coreboot/+/51723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0bb729b0521fb9dc38b7981014755daeaf9ca817 Gerrit-Change-Number: 51723 Gerrit-PatchSet: 6 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 02 Apr 2021 07:57:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/asurada: select mmc storage config
by Wenbin Mei (Code Review) 02 Apr '21

02 Apr '21

Attention is currently required from: Paul Menzel. Wenbin Mei has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52014 ) Change subject: mb/google/asurada: select mmc storage config ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52014/comment/1982f23b_c153ddb6 PS2, Line 10: > Please add: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52014 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac656d57c2b834d1ce393fd991275b897e597b4b Gerrit-Change-Number: 52014 Gerrit-PatchSet: 3 Gerrit-Owner: Wenbin Mei <wenbin.mei(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 02 Apr 2021 07:55:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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