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Hello Jason Glenesk, Raul Rangel, Patrick Georgi, Martin Roth, Marshall Dawson,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/amd/cezanne: add SMU support
......................................................................
soc/amd/cezanne: add SMU support
BUG=b:181766974
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I5b9b4c3d57945ea7c3287cf47f3d9704f42ff24b
---
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/cezanne/Makefile.inc
A src/soc/amd/cezanne/include/soc/smu.h
A src/soc/amd/cezanne/smu.c
4 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/51233/2
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Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.
Hello Jason Glenesk, Raul Rangel, Marshall Dawson,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51234
to look at the new patch set (#2).
Change subject: soc/amd/cezanne/smihandler: implement S3 entry SMI handler
......................................................................
soc/amd/cezanne/smihandler: implement S3 entry SMI handler
Since the support for the GSMI ELOG isn't implemented in the SMI handler
yet, the corresponding code isn't added to fch_slp_typ_handler in this
patch.
BUG=b:181766974
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: Ia27b2486dde1a373607ce895a975e873d9026ba1
---
M src/soc/amd/cezanne/smihandler.c
1 file changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/51234/2
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Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51194 )
Change subject: soc/intel/tigerlake: Enable TCSS Muxes to disconnect mode during boot
......................................................................
Patch Set 5:
(7 comments)
File src/soc/intel/tigerlake/early_tcss.c:
https://review.coreboot.org/c/coreboot/+/51194/comment/e103d5ac_f4ccf1c8
PS5, Line 109: res
The caller doesn't even care about res. This can be just defined in this function rather than accepting from caller.
struct pmc_ipc_buffer req = { 0 };
struct pmc_ipc_buffer rsp;
https://review.coreboot.org/c/coreboot/+/51194/comment/26fa352c_99a4224e
PS5, Line 115: PMC_IPC_TCSS_DISC_REQ_RES,
: port_map.usb3_port,
: port_map.usb2_port,
: 0, 0, 0, 0);
Can you please reflow this to fill in the 96-column limit?
https://review.coreboot.org/c/coreboot/+/51194/comment/a733e44a_3dcb766d
PS5, Line 268: struct tcss_port_map port_map
Instead of passing in the entire structure here, you can pass in a pointer to the entry?
const struct tcss_port_map *port_map
https://review.coreboot.org/c/coreboot/+/51194/comment/246adaab_65545036
PS5, Line 270: *rbuf = NULL
This is problematic. rbuf is set to NULL here and the driver expects the caller to pass in a valid pointer. This whole file is passing it wrong. (Fixed in CB:51232).
https://review.coreboot.org/c/coreboot/+/51194/comment/6ce19571_2b1d10be
PS5, Line 271: = 0
Not required. This is set on line 273.
https://review.coreboot.org/c/coreboot/+/51194/comment/9de1584d_ceae2ded
PS5, Line 319: if (!display_init_required())
if (!CONFIG(EARLY_TCSS_DISPLAY) || !display_init_required())
return;
File src/soc/intel/tigerlake/include/soc/early_tcss.h:
https://review.coreboot.org/c/coreboot/+/51194/comment/f5e0781a_de47b4cc
PS5, Line 129: uint8_t usb3_port; /* USB2 Port Number */
: uint8_t usb2_port; /* USB3 Port Number */
This can be dropped now that there is a separate structure for the port map?
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Attention is currently required from: Nico Huber, Angel Pons, Subrata Banik, Patrick Rudolph.
Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51205 )
Change subject: soc/intel/skylake: Do not unhide P2SB before disabling HECI
......................................................................
Patch Set 3:
(1 comment)
File src/soc/intel/skylake/finalize.c:
https://review.coreboot.org/c/coreboot/+/51205/comment/050d28bf_0cb34857
PS3, Line 37: p2sb_unhide();
> Removing this call doesn't make things clearer, IMHO. […]
If P2SB is meant to remain hidden in coreboot (and only be unhidden when required), I can look into where it may be used and not hidden.
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Attention is currently required from: Alexander Couzens.
Hello build bot (Jenkins), Alexander Couzens,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51231
to look at the new patch set (#3).
Change subject: T440P: Add Back Cover LED, Make it pulse like original
......................................................................
T440P: Add Back Cover LED, Make it pulse like original
T440P has a red LED on the back as many of the newer thinkpads.
coreboot did not support this. The LED also remained on while
the system was suspended unlike the stock firmware. Now this is fixed.
I usually turn it off except for suspend but I assume others
will want the default behavior.
Signed-off-by: Ph0rk0z <Crabstorage(a)getbackinthe.kitchen>
Change-Id: Ia38bc5de36aa72f383e6be6de03df78187cbe93b
---
M src/ec/lenovo/h8/acpi/systemstatus.asl
M src/ec/lenovo/h8/h8.h
2 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/51231/3
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Gerrit-Owner: Forkoz <Crabstorage(a)getbackinthe.kitchen>
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Attention is currently required from: Forkoz, Alexander Couzens.
Hello build bot (Jenkins), Alexander Couzens,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51231
to look at the new patch set (#2).
Change subject: T440P: Add Back Cover LED, Make it pulse like original
......................................................................
T440P: Add Back Cover LED, Make it pulse like original
T440P has a red LED on the back as many of the newer thinkpads. coreboot did not support this.
The LED also remained on while the system was suspended unlike the stock firmware. Now this is fixed.
I usually turn it off except for suspend but I assume others will want the default behavior.
Signed-off-by: Ph0rk0z <Crabstorage(a)getbackinthe.kitchen>
Change-Id: Ia38bc5de36aa72f383e6be6de03df78187cbe93b
---
M src/ec/lenovo/h8/acpi/systemstatus.asl
M src/ec/lenovo/h8/h8.h
2 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/51231/2
--
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Forkoz has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51231 )
Change subject: T440P: Add Back Cover LED, Make it pulse like original
......................................................................
T440P: Add Back Cover LED, Make it pulse like original
T440P has a red LED on the back as many of the newer thinkpads. Coreboot did not support this.
The LED also remained on while the system was suspended unlike the stock firmware. Now this is fixed.
I usually turn it off except for suspend but I assume others will want the default behavior.
Signed-off-by: Ph0rk0z <Crabstorage(a)getbackinthe.kitchen>
Change-Id: Ia38bc5de36aa72f383e6be6de03df78187cbe93b
---
M src/ec/lenovo/h8/acpi/systemstatus.asl
M src/ec/lenovo/h8/h8.h
2 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/51231/1
diff --git a/src/ec/lenovo/h8/acpi/systemstatus.asl b/src/ec/lenovo/h8/acpi/systemstatus.asl
index a5793be..44cfbdc 100644
--- a/src/ec/lenovo/h8/acpi/systemstatus.asl
+++ b/src/ec/lenovo/h8/acpi/systemstatus.asl
@@ -12,6 +12,8 @@
\_SB.PCI0.LPCB.EC.TLED(0x00)
/* suspend TLED off */
\_SB.PCI0.LPCB.EC.TLED(0x07)
+ /* Red Dot TLED off */
+ \_SB.PCI0.LPCB.EC.TLED(0x0a)
}
If (LEqual (Arg0, 1)) {
@@ -21,6 +23,8 @@
\_SB.PCI0.LPCB.EC.TLED(0x80)
/* suspend TLED off */
\_SB.PCI0.LPCB.EC.TLED(0x07)
+ /* Red Dot TLED on */
+ \_SB.PCI0.LPCB.EC.TLED(0x8a)
}
If (LEqual (Arg0, 2)) {
@@ -30,6 +34,8 @@
\_SB.PCI0.LPCB.EC.TLED(0x80)
/* suspend LED blinking */
\_SB.PCI0.LPCB.EC.TLED(0xc7)
+ /* red dot LED blinking */
+ \_SB.PCI0.LPCB.EC.TLED(0xca)
}
If (LEqual (Arg0, 3)) {
@@ -39,6 +45,8 @@
\_SB.PCI0.LPCB.EC.TLED(0xa0)
/* suspend TLED on */
\_SB.PCI0.LPCB.EC.TLED(0x87)
+ /* red dot TLED pulsing */
+ \_SB.PCI0.LPCB.EC.TLED(0xaa)
}
}
}
diff --git a/src/ec/lenovo/h8/h8.h b/src/ec/lenovo/h8/h8.h
index 4081611..c971f99 100644
--- a/src/ec/lenovo/h8/h8.h
+++ b/src/ec/lenovo/h8/h8.h
@@ -71,7 +71,7 @@
#define H8_LED_CONTROL 0x0c
#define H8_LED_CONTROL_OFF 0x00
#define H8_LED_CONTROL_ON 0x80
-#define H8_LED_CONTROL_PULSE 0xa0 /* Some models, power LED only*/
+#define H8_LED_CONTROL_PULSE 0xa0 /* Some models, some LED */
#define H8_LED_CONTROL_BLINK 0xc0
#define H8_LED_CONTROL_POWER_LED 0x00
@@ -83,6 +83,8 @@
#define H8_LED_CONTROL_DOCK_LED2 0x09
#define H8_LED_CONTROL_ACDC_LED 0x0c
#define H8_LED_CONTROL_MUTE_LED 0x0e
+#define H8_LED_CONTROL_REDDOT_LED 0x0a /* Red Dot On Back Cover */
+#define H8_LED_CONTROL_FN_LED 0x06 /* FN key LED */
#define H8_USB_ALWAYS_ON 0x0d
#define H8_USB_ALWAYS_ON_ENABLE 0x01
--
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