Attention is currently required from: Martin Roth, Selma Bensaid, Subrata Banik, Bernardo Perez Priego, Usha P, Andrey Petrov, Patrick Rudolph.
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Selma Bensaid, Subrata Banik, Usha P, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51105
to look at the new patch set (#4).
Change subject: intel/common/block/memory: Add saving memory info API
......................................................................
intel/common/block/memory: Add saving memory info API
Memory information is stored into CBMEM later to be used to generate
SMBIOS table 17.
Including implementation for CNL, SKL and TGL SOC's.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com>
Change-Id: I78d14c71d5d19f58e6a27ed5ef8269c6678f32a5
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/romstage/romstage.c
A src/soc/intel/common/block/include/intelblocks/meminfo.h
M src/soc/intel/common/block/memory/Kconfig
M src/soc/intel/common/block/memory/Makefile.inc
A src/soc/intel/common/block/memory/meminfo.c
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/romstage/romstage.c
10 files changed, 165 insertions(+), 311 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/51105/4
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Attention is currently required from: Martin Roth, Selma Bensaid, Subrata Banik, Bernardo Perez Priego, Usha P, Andrey Petrov, Patrick Rudolph.
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Selma Bensaid, Subrata Banik, Usha P, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51105
to look at the new patch set (#3).
Change subject: intel/common/block/memory: Add saving memory info API
......................................................................
intel/common/block/memory: Add saving memory info API
Memory information is stored into CBMEM later to be used to generate
SMBIOS table 17.
Including implementation for CNL, SKL and TGL SOC's.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com>
Change-Id: I78d14c71d5d19f58e6a27ed5ef8269c6678f32a5
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/romstage/romstage.c
A src/soc/intel/common/block/include/intelblocks/meminfo.h
M src/soc/intel/common/block/memory/Kconfig
M src/soc/intel/common/block/memory/Makefile.inc
A src/soc/intel/common/block/memory/meminfo.c
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/romstage/romstage.c
10 files changed, 166 insertions(+), 311 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/51105/3
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/51244
to look at the new patch set (#3).
Change subject: mb/google/guybrush: Enable internal graphics
......................................................................
mb/google/guybrush: Enable internal graphics
BUG=b:181809122
TEST=builds
Signed-off-by: Mathew King <mathewk(a)chromium.org>
Change-Id: I64475a475e9b72a6edd04ce0728591e0649d9f60
---
M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/51244/3
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Nikolai Vyssotski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49864 )
Change subject: soc/amd/common/block/graphics/graphics: report GOP frame buffer
......................................................................
Patch Set 6:
This change is ready for review.
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