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Change subject: mb/google/zork: add UPDM updating function before runing FSP-M
......................................................................
Patch Set 6:
(2 comments)
File src/mainboard/google/zork/romstage.c:
https://review.coreboot.org/c/coreboot/+/51181/comment/049c2367_896bbbe1
PS4, Line 4: #include <device/device.h>
> nits:remove this.
Done
https://review.coreboot.org/c/coreboot/+/51181/comment/6a466e4c_3570dc82
PS4, Line 6: #include <soc/pci_devs.h>
> nits:remove this.
Done
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Change subject: mb/google/zork: add UPDM updating function before runing FSP-M
......................................................................
Patch Set 6: Code-Review+2
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Change subject: mb/google/zork/var/vilboz: Add Mainboard Type for VCORE IC
......................................................................
mb/google/zork/var/vilboz: Add Mainboard Type for VCORE IC
To define Mainboard Type config, use the fw_config bit[26].
Check MB Type to modify SDLE settings for different VCORE IC.
BUG=b:177193131
BRANCH=zork
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
Change-Id: If153c0a3e641ae32ef89737925bd9f62dfb71f3d
---
M src/mainboard/google/zork/variants/baseboard/helpers.c
M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/zork/variants/vilboz/Makefile.inc
A src/mainboard/google/zork/variants/vilboz/romstage.c
4 files changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/49683/11
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Change subject: mb/google/zork/var/vilboz: Add Mainboard Type for VCORE IC
......................................................................
mb/google/zork/var/vilboz: Add Mainboard Type for VCORE IC
To define Mainboard Type config, use the fw_config bit[26].
Check MB Type to modify SDLE settings for different VCORE IC.
BUG=b:177193131
BRANCH=zork
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
Change-Id: If153c0a3e641ae32ef89737925bd9f62dfb71f3d
---
M src/mainboard/google/zork/variants/baseboard/helpers.c
M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
A src/mainboard/google/zork/variants/vilboz/romstage.c
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/zork: add UPDM updating function before runing FSP-M
......................................................................
mb/google/zork: add UPDM updating function before runing FSP-M
Add the UPD updating hook in early stage for customization.
BUG=b:117719313
BRANCH=zork
TEST=build,check the hook function been executed.
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: I4954a438a51b29b086015624127e651fd06f971b
---
M src/mainboard/google/zork/Makefile.inc
A src/mainboard/google/zork/romstage.c
M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
A src/soc/amd/picasso/include/soc/romstage.h
M src/soc/amd/picasso/romstage.c
5 files changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/51181/6
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Change subject: mb/google/zork/var/vilboz: Add Mainboard Type for VCORE IC
......................................................................
mb/google/zork/var/vilboz: Add Mainboard Type for VCORE IC
To define Mainboard Type config, use the fw_config bit[26].
Check MB Type to modify SDLE settings for different VCORE IC.
BUG=b:177193131
BRANCH=zork
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
Change-Id: If153c0a3e641ae32ef89737925bd9f62dfb71f3d
---
M src/mainboard/google/zork/variants/baseboard/helpers.c
M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
A src/mainboard/google/zork/variants/vilboz/romstage.c
3 files changed, 27 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/49683/9
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Patrick Georgi, Martin Roth, Marshall Dawson, Chris Wang, EricR Lai, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/zork: add UPDM updating function before runing FSP-M
......................................................................
mb/google/zork: add UPDM updating function before runing FSP-M
Add the UPD updating hook in early stage for customization.
BUG=b:117719313
BRANCH=zork
TEST=build,check the hook function been executed.
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: I4954a438a51b29b086015624127e651fd06f971b
---
M src/mainboard/google/zork/Makefile.inc
A src/mainboard/google/zork/romstage.c
M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/zork/variants/vilboz/Makefile.inc
A src/soc/amd/picasso/include/soc/romstage.h
M src/soc/amd/picasso/romstage.c
6 files changed, 31 insertions(+), 0 deletions(-)
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Krystian Hebel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51084 )
Change subject: sb/amd/sb800: Remove unused assignment
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File src/southbridge/amd/cimx/sb800/bootblock.c:
https://review.coreboot.org/c/coreboot/+/51084/comment/4621c2c3_a2bd2a6d
PS1, Line 35: pci_s_read_config16(dev, 0x6c);
> You drop this line I think.
Agreed, no reason to read it.
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Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51176 )
Change subject: src/drivers/i2c/rx6110sa: Add official ACPI ID
......................................................................
src/drivers/i2c/rx6110sa: Add official ACPI ID
In commit 2609eaaa8f (src/drivers/i2c/rx6110sa: Omit _HID temporarily)
the randomly assigned and therefore wrong ACPI ID for RTC RX6110SA was
removed. In the meantime Seiko-Epson did a great job and registered an
official vendor ID in the ACPI database [1]. Further on, Seiko-Epson
has now assigned the unique Product Identifier for the RX6110SA, which
is '6110'. The assignment of the Product Identifier is controlled by
the vendor and there is no official database where this ID is stored
in. It is up to the vendor to make sure that this ID stays unique.
This patch adds this new vendor and product ID to the driver. Together
with a pending Linux patch this RTC is now useable as ACPI device in
Linux.
[1] https://uefi.org/ACPI_ID_List?search=SECC
Change-Id: I45838162f014a760520692c6dcaae329ad98547d
Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51176
Reviewed-by: Andy Shevchenko <andy.shevchenko(a)gmail.com>
Reviewed-by: Johannes Hahn <johannes-hahn(a)siemens.com>
Reviewed-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/drivers/i2c/rx6110sa/rx6110sa.c
M src/drivers/i2c/rx6110sa/rx6110sa.h
2 files changed, 2 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Paul Menzel: Looks good to me, but someone else must approve
Mario Scheithauer: Looks good to me, approved
Johannes Hahn: Looks good to me, but someone else must approve
Andy Shevchenko: Looks good to me, but someone else must approve
diff --git a/src/drivers/i2c/rx6110sa/rx6110sa.c b/src/drivers/i2c/rx6110sa/rx6110sa.c
index 210444e..2b8b9b2 100644
--- a/src/drivers/i2c/rx6110sa/rx6110sa.c
+++ b/src/drivers/i2c/rx6110sa/rx6110sa.c
@@ -198,6 +198,7 @@
/* Device */
acpigen_write_scope(scope);
acpigen_write_device(acpi_device_name(dev));
+ acpigen_write_name_string("_HID", RX6110SA_HID_NAME);
acpigen_write_name_string("_DDN", RX6110SA_HID_DESC);
acpigen_write_STA(acpi_device_status(dev));
diff --git a/src/drivers/i2c/rx6110sa/rx6110sa.h b/src/drivers/i2c/rx6110sa/rx6110sa.h
index fc0109d..5be6be7 100644
--- a/src/drivers/i2c/rx6110sa/rx6110sa.h
+++ b/src/drivers/i2c/rx6110sa/rx6110sa.h
@@ -4,6 +4,7 @@
#define _I2C_RX6110SA_H_
#define RX6110SA_ACPI_NAME "ERX6"
+#define RX6110SA_HID_NAME "SECC6110"
#define RX6110SA_HID_DESC "Real Time Clock"
/* Register layout */
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