coreboot-gerrit February 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/common/block/acpi/pm_state: add missing include
by HAOUAS Elyes (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50266 ) Change subject: soc/amd/common/block/acpi/pm_state: add missing include ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/50266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22862c2d29f130c741b4817dac00287ecfc71fa2 Gerrit-Change-Number: 50266 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 03 Feb 2021 19:24:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: console/printk.c: Prevent recursion in print functions
by Nico Huber (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Patrick Rudolph, Angel Pons, Julius Werner, Kyösti Mälkki. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49942 ) Change subject: console/printk.c: Prevent recursion in print functions ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > This problem isn't new. It happened a few times in the past already. […] Maybe we should start by defining what the bug is. * Is it that we use printk() in init code that may or may not be needed for the console (depending on platform, Kconfigs etc.)? * Or is it that we allow implicit initializations during printk()? I think the latter is easier to fix by design, e.g. everything used by printk() should already be initialized before or during console_init(). For the last problem that led to this patch, that could be done by introducing an init function to the monotonic timer API (as a fall-back, timer_monotonic_get() could still call it if necessary). In case we are still hit by a recursion (a printk() on the wrong path can always happen, no matter how well we are prepared), we could still print something very simple, using console_tx_byte() directly? -- To view, visit https://review.coreboot.org/c/coreboot/+/49942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I742e4087bffa64897e9ffa47531d37e42fb2c63e Gerrit-Change-Number: 49942 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 03 Feb 2021 19:22:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: oc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment
by HAOUAS Elyes (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Patrick Rudolph. HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50269 ) Change subject: oc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment ...................................................................... oc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment Change-Id: Ifbe012a9867a6814f64abcfe336e5edca19df879 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/skylake/acpi/irqlinks.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/50269/1 diff --git a/src/soc/intel/skylake/acpi/irqlinks.asl b/src/soc/intel/skylake/acpi/irqlinks.asl index da82523..483be59 100644 --- a/src/soc/intel/skylake/acpi/irqlinks.asl +++ b/src/soc/intel/skylake/acpi/irqlinks.asl @@ -5,7 +5,7 @@ * * Due to what appears to be an ACPI interpreter bug we do not use * the PCRB() method here as it may not be defined yet because the method - * definiton depends on the order of the include files in pch.asl. + * definition depends on the order of the include files in pch.asl. * * https://bugs.acpica.org/show_bug.cgi?id=1201 */ -- To view, visit https://review.coreboot.org/c/coreboot/+/50269 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbe012a9867a6814f64abcfe336e5edca19df879 Gerrit-Change-Number: 50269 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: payloads/libpayload/arch/arm64/mmu.c: Fix typo in comment
by HAOUAS Elyes (Code Review) 03 Feb '21

03 Feb '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50268 ) Change subject: payloads/libpayload/arch/arm64/mmu.c: Fix typo in comment ...................................................................... payloads/libpayload/arch/arm64/mmu.c: Fix typo in comment Change-Id: Ieb10a881ef1d983f11318f0f6934491fd19fd0bf Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M payloads/libpayload/arch/arm64/mmu.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/50268/1 diff --git a/payloads/libpayload/arch/arm64/mmu.c b/payloads/libpayload/arch/arm64/mmu.c index bc4c233..4c8f8c1 100644 --- a/payloads/libpayload/arch/arm64/mmu.c +++ b/payloads/libpayload/arch/arm64/mmu.c @@ -389,7 +389,7 @@ /* * Func: mmu_is_range_free - * Desc: We need to ensure that the new range being allocated doesnt overlap + * Desc: We need to ensure that the new range being allocated doesn't overlap * with any used memory range. Basically: * 1. Memory ranges used by the payload (usedmem_ranges) * 2. Any area that falls below _end symbol in linker script (Kernel needs to be -- To view, visit https://review.coreboot.org/c/coreboot/+/50268 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieb10a881ef1d983f11318f0f6934491fd19fd0bf Gerrit-Change-Number: 50268 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/dedede: Create kracko variant
by Karthik Ramasubramanian (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Martin Roth, Tony Huang, Wisley Chen. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50255 ) Change subject: mb/google/dedede: Create kracko variant ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: Ideally the SPD Bin for memory parts and device tree configuration should be separate CLs of their own. This CL should just be created as is from the template. -- To view, visit https://review.coreboot.org/c/coreboot/+/50255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f8c7a4d4967e99896166ec9dd6b7381b7f6e5ed Gerrit-Change-Number: 50255 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 03 Feb 2021 19:17:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: add UPD for USB3 phy setting adjust
by chris wang (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Martin Roth. chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50240 ) Change subject: soc/amd/picasso: add UPD for USB3 phy setting adjust ...................................................................... Patch Set 7: (1 comment) File src/soc/amd/picasso/fsp_params.c: https://review.coreboot.org/c/coreboot/+/50240/comment/ed6e1cf6_46ae0d7d PS4, Line 131: memcpy(&scfg->usb_3_port0_phy_tune, &cfg->usb3_phy_tune_params[0], : sizeof(scfg->usb_3_port0_phy_tune[0])); > Right, I'm just wondering if the enable should be more. […] yes, The default value was given in both trembyle and dalboz devtree. and the value is refer to the AGESA. Also remove the if condition and let UPD use the default setting if no variant wants to override it. -- To view, visit https://review.coreboot.org/c/coreboot/+/50240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Gerrit-Change-Number: 50240 Gerrit-PatchSet: 7 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Wed, 03 Feb 2021 19:15:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: chris wang <Chris.Wang(a)amd.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: add UPD for USB3 phy setting adjust
by chris wang (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: chris wang. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Chris Wang, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50240 to look at the new patch set (#7). Change subject: soc/amd/picasso: add UPD for USB3 phy setting adjust ...................................................................... soc/amd/picasso: add UPD for USB3 phy setting adjust add UPD for USB3 phy setting adjust Usb 3.1 PHY Parameters: 1. RX_EQ_DELTA_IQ_OVRD_VAL -Override value for rx_eq_delta_iq. Range 0-0xF 2. RX_EQ_DELTA_IQ_OVRD_EN -Enable override value for rx_eq_delta_iq. Range 0-0x1 3. Override value for rx_vref_ctrl. Range 0 - 0x1F 4. Enable override value for rx_vref_ctrl. Range 0 - 0x1 5. Override value for tx_vboost_lvl: 0 - 0x7. 6. Enable override value for tx_vboost_lvl. Range: 0 - 0x1 7. Override value for rx_vref_ctrl. Range 0 - 0x1F 8. Enable override value for rx_vref_ctrl. Range 0 - 0x1 9. Override value for tx_vboost_lvl: 0 - 0x7. 10. Enable override value for tx_vboost_lvl. Range: 0 - 0x1 BUG=b:175192931 TEST=Build/verify the valule will been apply on dirinboz Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/fsp_params.c M src/vendorcode/amd/fsp/picasso/FspsUpd.h 5 files changed, 142 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/50240/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/50240 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d5f69e840952cc5171af1ce8597628d1bede5cb Gerrit-Change-Number: 50240 Gerrit-PatchSet: 7 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: chris wang <Chris.Wang(a)amd.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: intel: Turn `DEFAULT_RCBA` into a Kconfig symbol
by Nico Huber (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Damien Zammit, Angel Pons, Arthur Heymans, Alexander Couzens, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50036 ) Change subject: intel: Turn `DEFAULT_RCBA` into a Kconfig symbol ...................................................................... Patch Set 4: Code-Review+2 (1 comment) File src/southbridge/intel/common/rcba.h: https://review.coreboot.org/c/coreboot/+/50036/comment/53b5741f_922c544b PS4, Line 6: DEFAULT_RCBA Maybe rename to something meaningful? E.g. RCBA_POINTER? -- To view, visit https://review.coreboot.org/c/coreboot/+/50036 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I642958fbd6f02dbf54812d6a75d6bc3087acc77a Gerrit-Change-Number: 50036 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Damien Zammit Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 03 Feb 2021 19:02:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vc/intel/fsp/fsp2_0/alderlake: Add required macros into MemInfoHob.h
by Tim Wawrzynczak (Code Review) 03 Feb '21

03 Feb '21

Attention is currently required from: Furquan Shaikh, Subrata Banik, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50254 ) Change subject: vc/intel/fsp/fsp2_0/alderlake: Add required macros into MemInfoHob.h ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/50254/comment/bc2b2673_e93eac54 PS2, Line 9: 2017.00 > Does this also match the upcoming 2037 release? or is another update required? Yes they match, `git diff upstream/ADL.2017.00 upstream/ADL.2037.00 MemInfoHob.h` shows nothing -- To view, visit https://review.coreboot.org/c/coreboot/+/50254 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18370edca481bac5fdd483680cd7b05b216d10fc Gerrit-Change-Number: 50254 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 03 Feb 2021 19:00:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/zork: C-state IO base address aligment
by chris wang (Code Review) 03 Feb '21

03 Feb '21

Hello Chris Wang, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/44135 to review the following change. Change subject: mb/google/zork: C-state IO base address aligment ...................................................................... mb/google/zork: C-state IO base address aligment Align the C-state MSR value of BSP with AGESA. BUG=b:162705221 BRANCH=none TEST=Check the MSR value is correct and BSP can enter CC6 with AVT tool Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: Ib98d34af518439d338326446c20601867ad31690 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/include/soc/iomap.h 2 files changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/44135/1 diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 526900a..039e3c2 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -257,6 +257,12 @@ help Base address for the ACPI registers. +config PICASSO_CSTATE_IO_BASE_ADDR + hex + default 0x413 + help + Base address for the CC6 State. + config PICASSO_CONSOLE_UART bool "Use Picasso UART controller for console" default n diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h index 6b9ad2a..360b348 100644 --- a/src/soc/amd/picasso/include/soc/iomap.h +++ b/src/soc/amd/picasso/include/soc/iomap.h @@ -64,12 +64,12 @@ /* I/O Ranges */ #define ACPI_SMI_CTL_PORT 0xb2 #define PICASSO_ACPI_IO_BASE CONFIG_PICASSO_ACPI_IO_BASE +#define ACPI_CPU_CONTROL CONFIG_PICASSO_CSTATE_IO_BASE_ADDR #define ACPI_PM_EVT_BLK (PICASSO_ACPI_IO_BASE + 0x00) /* 4 bytes */ #define ACPI_PM1_STS (ACPI_PM_EVT_BLK + 0x00) /* 2 bytes */ #define ACPI_PM1_EN (ACPI_PM_EVT_BLK + 0x02) /* 2 bytes */ #define ACPI_PM1_CNT_BLK (PICASSO_ACPI_IO_BASE + 0x04) /* 2 bytes */ #define ACPI_PM_TMR_BLK (PICASSO_ACPI_IO_BASE + 0x08) /* 4 bytes */ -#define ACPI_CPU_CONTROL (PICASSO_ACPI_IO_BASE + 0x0c) /* 6 bytes */ /* doc says 0x14 for GPE0_BLK but FT5 only works with 0x20 */ #define ACPI_GPE0_BLK (PICASSO_ACPI_IO_BASE + 0x20) /* 8 bytes */ #define ACPI_GPE0_STS (ACPI_GPE0_BLK + 0x00) /* 4 bytes */ -- To view, visit https://review.coreboot.org/c/coreboot/+/44135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98d34af518439d338326446c20601867ad31690 Gerrit-Change-Number: 44135 Gerrit-PatchSet: 1 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit February 2021