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Change in coreboot[master]: sb/amd/agesa/hudson/acpi/fch.asl: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50325
) Change subject: sb/amd/agesa/hudson/acpi/fch.asl: Convert to ASL 2.0 ...................................................................... sb/amd/agesa/hudson/acpi/fch.asl: Convert to ASL 2.0 Change-Id: I8903450b505701e1fd62c1a70b896a4dfb37d5a1 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/amd/agesa/hudson/acpi/fch.asl 1 file changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/50325/1 diff --git a/src/southbridge/amd/agesa/hudson/acpi/fch.asl b/src/southbridge/amd/agesa/hudson/acpi/fch.asl index 321796e..7777d72 100644 --- a/src/southbridge/amd/agesa/hudson/acpi/fch.asl +++ b/src/southbridge/amd/agesa/hudson/acpi/fch.asl @@ -7,13 +7,13 @@ Method(_OSC,4) { /* Check for proper PCI/PCIe UUID */ - If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + If(Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { /* Let OS control everything */ Return (Arg3) } Else { CreateDWordField(Arg3,0,CDW1) - Or(CDW1,4,CDW1) // Unrecognized UUID + CDW1 |= 4 // Unrecognized UUID Return(Arg3) } } @@ -124,10 +124,10 @@ * 32bit (0x00000000 - TOM1) will wrap and give the same * result as 64bit (0x100000000 - TOM1). */ - Store(TOM1, MM1B) - ShiftLeft(0x10000000, 4, Local0) - Subtract(Local0, TOM1, Local0) - Store(Local0, MM1L) + MM1B = TOM1 + Local0 = 0x10000000 << 4 + Local0 -= TOM1 + MM1L = Local0 Return(CRES) /* note to change the Name buffer */ } /* end of Method(_SB.PCI0._CRS) */ @@ -170,20 +170,20 @@ Method(OSFL, 0){ - if (LNotEqual(OSVR, Ones)) {Return(OSVR)} /* OS version was already detected */ + if (OSVR != Ones) {Return(OSVR)} /* OS version was already detected */ if (CondRefOf(\_OSI)) { - Store(1, OSVR) /* Assume some form of XP */ + OSVR = 1 /* Assume some form of XP */ if (\_OSI("Windows 2006")) /* Vista */ { - Store(2, OSVR) + OSVR = 2 } } else { If(WCMP(\_OS,"Linux")) { - Store(3, OSVR) /* Linux */ + OSVR = 3 /* Linux */ } Else { - Store(4, OSVR) /* Gotta be WinCE */ + OSVR = 4 /* Gotta be WinCE */ } } Return(OSVR) -- To view, visit
https://review.coreboot.org/c/coreboot/+/50325
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8903450b505701e1fd62c1a70b896a4dfb37d5a1 Gerrit-Change-Number: 50325 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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Change in coreboot[master]: soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
Attention is currently required from: Patrick Rudolph. HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50324
) Change subject: soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0 ...................................................................... soc/intel/xeon_sp/include/soc/acpi_asl.h: Convert to ASL 2.0 Change-Id: Ie1d31b9d02584b97b85afe970894cfe557174733 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/xeon_sp/include/soc/acpi_asl.h 1 file changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/50324/1 diff --git a/src/soc/intel/xeon_sp/include/soc/acpi_asl.h b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h index e08e02b..befce2e 100644 --- a/src/soc/intel/xeon_sp/include/soc/acpi_asl.h +++ b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h @@ -44,22 +44,22 @@ IRQ (Level, ActiveLow, Shared) {} \ }) \ CreateWordField (RTLA, 1, IRQ0) \ - Store (Zero, IRQ0) \ + IRQ0 = 0 \ \ /* Set the bit from PIRQ Routing Register */ \ - ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ + IRQ0 = 1 << (^^PIR##id & ^^IREM) \ Return (RTLA) \ } \ Method (_SRS, 1, Serialized) \ { \ CreateWordField (Arg0, 1, IRQ0) \ FindSetRightBit (IRQ0, Local0) \ - Decrement (Local0) \ - Store (Local0, ^^PIR##id) \ + Local0-- \ + ^^PIR##id = Local0 \ } \ Method (_STA, 0, Serialized) \ { \ - If (And (^^PIR##id, ^^IREN)) { \ + If (^^PIR##id & ^^IREN) { \ Return (0x9) \ } Else { \ Return (0xb) \ @@ -67,7 +67,7 @@ } \ Method (_DIS, 0, Serialized) \ { \ - Or (^^PIR##id, ^^IREN, ^^PIR##id) \ + ^^PIR##id |= ^^IREN \ } \ } -- To view, visit
https://review.coreboot.org/c/coreboot/+/50324
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1d31b9d02584b97b85afe970894cfe557174733 Gerrit-Change-Number: 50324 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange
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Change in coreboot[master]: soc/amd/stoneyridge/acpi: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50323
) Change subject: soc/amd/stoneyridge/acpi: Convert to ASL 2.0 ...................................................................... soc/amd/stoneyridge/acpi: Convert to ASL 2.0 Change-Id: I71c296cdc0180a2832aeb51434de3302a54b5db8 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/amd/stoneyridge/acpi/pci_int.asl M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/50323/1 diff --git a/src/soc/amd/stoneyridge/acpi/pci_int.asl b/src/soc/amd/stoneyridge/acpi/pci_int.asl index 0074cf5..ae76655 100644 --- a/src/soc/amd/stoneyridge/acpi/pci_int.asl +++ b/src/soc/amd/stoneyridge/acpi/pci_int.asl @@ -109,7 +109,7 @@ { \_SB.CIRQ() } - Store(Arg0, PICM) + PICM = Arg0 } Method(CIRQ, 0x00, NotSerialized){ diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl index f302b04..2c4bdbf 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl @@ -583,7 +583,7 @@ Local1 = ~Arg0 Local0 &= Local1 } - Store(Local0, PGA3) + PGA3 = Local0 if (Arg0 == 0x20) { /* if SwUsb3SlpShutdown */ Local0 = PGA3 Local0 &= Arg0 -- To view, visit
https://review.coreboot.org/c/coreboot/+/50323
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71c296cdc0180a2832aeb51434de3302a54b5db8 Gerrit-Change-Number: 50323 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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Change in coreboot[master]: mb/lippert/frontrunner-af/acpi/sata.asl: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50322
) Change subject: mb/lippert/frontrunner-af/acpi/sata.asl: Convert to ASL 2.0 ...................................................................... mb/lippert/frontrunner-af/acpi/sata.asl: Convert to ASL 2.0 Change-Id: Ife718dcec765d3b2861bce16f9ca2b6355166800 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/lippert/frontrunner-af/acpi/sata.asl 1 file changed, 12 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/50322/1 diff --git a/src/mainboard/lippert/frontrunner-af/acpi/sata.asl b/src/mainboard/lippert/frontrunner-af/acpi/sata.asl index 7f305fb..5dd909a 100644 --- a/src/mainboard/lippert/frontrunner-af/acpi/sata.asl +++ b/src/mainboard/lippert/frontrunner-af/acpi/sata.asl @@ -35,7 +35,7 @@ Device(PMST) { Name(_ADR, 0) Method(_STA,0) { - if (LGreater(P0IS,0)) { + if (P0IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -48,7 +48,7 @@ { Name(_ADR, 1) Method(_STA,0) { - if (LGreater(P1IS,0)) { + if (P1IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -71,7 +71,7 @@ { Name(_ADR, 0) Method(_STA,0) { - if (LGreater(P2IS,0)) { + if (P2IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -84,7 +84,7 @@ { Name(_ADR, 1) Method(_STA,0) { - if (LGreater(P3IS,0)) { + if (P3IS > 0) { return (0x0F) /* sata is visible */ } else { @@ -98,35 +98,35 @@ Scope(\_GPE) { Method(_L1F,0x0,NotSerialized) { if (\_SB.P0PR) { - if (LGreater(\_SB.P0IS,0)) { + if (\_SB.P0IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P0PR) + \_SB.P0PR = 1 } if (\_SB.P1PR) { - if (LGreater(\_SB.P1IS,0)) { + if (\_SB.P1IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P1PR) + \_SB.P1PR = 1 } if (\_SB.P2PR) { - if (LGreater(\_SB.P2IS,0)) { + if (\_SB.P2IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P2PR) + \_SB.P2PR = 1 } if (\_SB.P3PR) { - if (LGreater(\_SB.P3IS,0)) { + if (\_SB.P3IS > 0) { sleep(32) } Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */ - store(one, \_SB.P3PR) + \_SB.P3PR = 1 } } } -- To view, visit
https://review.coreboot.org/c/coreboot/+/50322
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife718dcec765d3b2861bce16f9ca2b6355166800 Gerrit-Change-Number: 50322 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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Change in coreboot[master]: mb/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic...
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50321
) Change subject: mb/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl: Convert to ASL 2.0 ...................................................................... mb/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl: Convert to ASL 2.0 Change-Id: Ic3d0ea9893c3c25305e2da94681cb5ac466782fc Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl 1 file changed, 47 insertions(+), 48 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/50321/1 diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl index 842005a..4b1254d 100644 --- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl +++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl @@ -25,7 +25,7 @@ Method (PMOF, 0, Serialized) { /* Make Sure all PMIC outputs are off. */ - If (LEqual (VSIC, Zero)) { + If (VSIC == 0) { CTXS(EN_PP3300_DX_CAM) } } @@ -39,7 +39,7 @@ Method (_ON, 0, Serialized) { PMON() /* Do not reset PMIC across S3 and S0ix cycle */ - if (Lequal (RSTO, 1)) { + if (RSTO == 1) { CTXS(EN_CAM_PMIC_RST_L) Sleep(1) STXS(EN_CAM_PMIC_RST_L) @@ -64,46 +64,45 @@ Name (AVB3, Zero) Method (_REG, 2, NotSerialized) { - If (LEqual (Arg0, 0x08)) + If (Arg0 == 0x08) { /* Marks the availability of GeneralPurposeIO * 0x08: opregion space for GeneralPurposeIO */ - Store (Arg1, AVGP) + AVGP = Arg1 } - If (LEqual (Arg0, 0xB0)) + If (Arg0 == 0xb0) { /* Marks the availability of * TI_PMIC_POWER_OPREGION_ID */ - Store (Arg1, AVB0) + AVB0 = Arg1 } - If (LEqual (Arg0, 0xB1)) + If (Arg0 == 0xb1) { /* Marks the availability of * TI_PMIC_VR_VAL_OPREGION_ID */ - Store (Arg1, AVB1) + AVB1 = Arg1 } - If (LEqual (Arg0, 0xB2)) + If (Arg0 == 0xb2) { /* Marks the availability of * TI_PMIC_CLK_OPREGION_ID */ - Store (Arg1, AVB2) + AVB2 = Arg1 } - If (LEqual (Arg0, 0xB3)) + If (Arg0 == 0xb3) { /* Marks the availability of * TI_PMIC_CLK_FREQ_OPREGION_ID */ - Store (Arg1, AVB3) + AVB3 = Arg1 } - If (LAnd (AVGP, LAnd (LAnd (AVB0, AVB1), - LAnd(AVB2, AVB3)))) + If (AVGP && AVB0 && AVB1 && AVB2 && AVB3) { /* Marks the availability of all opregions */ - Store (1, AVBL) + AVBL = 1 } Else { - Store (0, AVBL) + AVBL = 0 } } @@ -314,7 +313,7 @@ } Method (CLK, 1, Serialized) { - If (LEqual (Arg0, Zero)) { + If (Arg0 == 0) { BODI = 0 BUDI = 0 PSWR = 0 @@ -328,7 +327,7 @@ CFG1 = 0 PCTL = 0 Sleep(1) - } ElseIf (LEqual (Arg0, 1)) { + } ElseIf (Arg0 == 1) { /* Set boost clock divider */ BODI = 3 /* Set buck clock divider */ @@ -364,37 +363,37 @@ Name (VSIC, 0) Method (DOVD, 1, Serialized) { /* Turn off VSIO */ - If (LEqual (Arg0, Zero)) { + If (Arg0 == 0) { /* Decrement only if VSIC > 0 */ - if (LGreater (VSIC, 0)) { - Decrement (VSIC) - If (LEqual (VSIC, Zero)) { + if (VSIC > 0) { + VSIC-- + If (VSIC == 0) { VSIO = 0 Sleep(1) PMOF() } } - } ElseIf (LEqual (Arg0, 1)) { + } ElseIf (Arg0 == 1) { /* Increment only if VSIC < 4 */ - If (LLess (VSIC, 4)) { + If (VSIC < 4) { /* Turn on VSIO */ - If (LEqual (VSIC, Zero)) { + If (VSIC == 0) { PMON() VSIO = 3 - if (LNotEqual (IOVA, 52)) { + if (IOVA != 52) { /* Set VSIO value as 1.8006 V */ IOVA = 52 } - if (LNotEqual (SIOV, 52)) { + if (SIOV != 52) { /* Set VSIO value as 1.8006 V */ SIOV = 52 } Sleep(3) } - Increment (VSIC) + VSIC++ } } } @@ -403,8 +402,8 @@ PowerResource (OVCM, 0, 0) { Name (STA, 0) Method (_ON, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 0)) { + If (AVBL == 1) { + If (STA == 0) { /* Enable VSIO regulator + daisy chain */ DOVD(1) @@ -415,8 +414,8 @@ } } Method (_OFF, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 1)) { + If (AVBL == 1) { + If (STA == 1) { CLK(0) Sleep(2) DOVD(0) @@ -434,8 +433,8 @@ Name (STA, 0) Method (_ON, 0, Serialized) { /* TODO: Read Voltage and Sleep values from Sensor Obj */ - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 0)) { + If (AVBL == 1) { + If (STA == 0) { \_SB.PCI0.I2C2.PMIC.CGP1() \_SB.PCI0.I2C2.PMIC.CGP2() @@ -467,8 +466,8 @@ } Method (_OFF, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 1)) { + If (AVBL == 1) { + If (STA == 1) { Sleep(2) \_SB.PCI0.I2C2.PMIC.CRST(0) Sleep(3) @@ -490,8 +489,8 @@ Name (STA, 0) Method (_ON, 0, Serialized) { /* TODO: Read Voltage and Sleep values from Sensor Obj */ - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 0)) { + If (AVBL == 1) { + If (STA == 0) { /* Set VAUX2 as 1.8006 V */ AX2V = 52 VAX2 = 1 /* Enable VAUX2 */ @@ -523,8 +522,8 @@ } Method (_OFF, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 1)) { + If (AVBL == 1) { + If (STA == 1) { Sleep(2) \_SB.PCI0.I2C2.PMIC.CGP5(0) Sleep(3) @@ -548,8 +547,8 @@ PowerResource (VCMP, 0, 0) { Name (STA, 0) Method (_ON, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 0)) { + If (AVBL == 1) { + If (STA == 0) { /* Enable VSIO regulator + daisy chain */ DOVD(1) @@ -566,8 +565,8 @@ } Method (_OFF, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 1)) { + If (AVBL == 1) { + If (STA == 1) { VCMC = 0 /* Disable regulator */ Sleep(1) DOVD(0) /* Disable regulator */ @@ -585,8 +584,8 @@ PowerResource (NVMP, 0, 0) { Name (STA, 0) Method (_ON, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 0)) { + If (AVBL == 1) { + If (STA == 0) { /* Enable VSIO regulator + daisy chain */ DOVD(1) @@ -596,8 +595,8 @@ } Method (_OFF, 0, Serialized) { - If (LEqual (AVBL, 1)) { - If (LEqual (STA, 1)) { + If (AVBL == 1) { + If (STA == 1) { DOVD(0) /* Disable regulator */ STA = 0 } -- To view, visit
https://review.coreboot.org/c/coreboot/+/50321
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3d0ea9893c3c25305e2da94681cb5ac466782fc Gerrit-Change-Number: 50321 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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Change in coreboot[master]: mb/cyan/variants/terra/include/variant/acpi: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50320
) Change subject: mb/cyan/variants/terra/include/variant/acpi: Convert to ASL 2.0 ...................................................................... mb/cyan/variants/terra/include/variant/acpi: Convert to ASL 2.0 Change-Id: Ice6158943c61b3e2156a2ebbf96aa73e7cf87a7e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/cyan/variants/terra/include/variant/acpi/charger.asl M src/mainboard/google/cyan/variants/terra/include/variant/acpi/cpu.asl 2 files changed, 19 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/50320/1 diff --git a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/charger.asl b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/charger.asl index 98e7b7d..601ca84 100644 --- a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/charger.asl +++ b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/charger.asl @@ -9,7 +9,7 @@ Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -19,7 +19,7 @@ /* Return charger performance states defined by Terra2 or Terra3 mainboard */ Method (PPSS) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (\_SB.CPT2) } Else { @@ -31,17 +31,17 @@ Method (PPPC) { /* Convert size of PPSS table to index */ - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { - Store (SizeOf (\_SB.CPT2), Local0) + Local0 = SizeOf (\_SB.CPT2) } Else { - Store (SizeOf (\_SB.CPT3), Local0) + Local0 = SizeOf (\_SB.CPT3) } - Decrement (Local0) + Local0-- /* Check if charging is disabled (AC removed) */ - If (LEqual (\_SB.PCI0.LPCB.EC0.ACEX, Zero)) { + If (\_SB.PCI0.LPCB.EC0.ACEX == 0) { /* Return last power state */ Return (Local0) } Else { @@ -57,13 +57,11 @@ { /* Retrieve Control (index 4) for specified PPSS level */ /* Convert size of PPSS table to index */ - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { - Store (DeRefOf (Index (DeRefOf (Index - (\_SB.CPT2, ToInteger (Arg0))), 4)), Local0) + Local0 = DeRefOf (DeRefOf (\_SB.CPT2 [ToInteger (Arg0)])[4]) } Else { - Store (DeRefOf (Index (DeRefOf (Index - (\_SB.CPT3, ToInteger (Arg0))), 4)), Local0) + Local0 = DeRefOf (DeRefOf (\_SB.CPT3 [ToInteger (Arg0)])[4]) } /* Pass Control value to EC to limit charging */ diff --git a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/cpu.asl b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/cpu.asl index 7ec48a3..ec02670 100644 --- a/src/mainboard/google/cyan/variants/terra/include/variant/acpi/cpu.asl +++ b/src/mainboard/google/cyan/variants/terra/include/variant/acpi/cpu.asl @@ -40,7 +40,7 @@ Method (_STA) { - If (LEqual (\DPTE, One)) { + If (\DPTE == 1) { Return (0xF) } Else { Return (0x0) @@ -100,8 +100,8 @@ Method (_TDL) { If (CondRefOf (\_SB.CP00._TSS)) { - Store (SizeOf (\_SB.CP00._TSS ()), Local0) - Decrement (Local0) + Local0 = SizeOf (\_SB.CP00._TSS ()) + Local0-- Return (Local0) } Else { Return (0) @@ -119,7 +119,7 @@ Method (SPPC, 1) { - Store (Arg0, \PPCM) + \PPCM = Arg0 /* Notify OS to re-read _PPC limit on each CPU */ \PPCN () @@ -143,8 +143,8 @@ If (CondRefOf (\_SB.MPDL)) { Return (\_SB.MPDL) } ElseIf (CondRefOf (\_SB.CP00._PSS)) { - Store (SizeOf (\_SB.CP00._PSS ()), Local0) - Decrement (Local0) + Local0 = SizeOf (\_SB.CP00._PSS ()) + Local0-- Return (Local0) } Else { Return (0) @@ -154,7 +154,7 @@ /* Return PPCC table defined by Terra2 or Terra3 mainboard */ Method (PPCC) { - If (LEqual (\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (\_SB.PPT2) } Else { @@ -165,7 +165,7 @@ /* Return critical thermal point defined by Terra2 or Terra3 mainboard */ Method (_CRT) { - If (Lequal(\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (\_SB.DPTF.CTOK(DPTF_TERRA2_CPU_CRITICAL)) } Else { @@ -176,7 +176,7 @@ /* Return passive thermal point defined by Terra2 or Terra3 mainboard */ Method (_PSV) { - If (Lequal(\_SB.GPID, TERRA2_PROJECT_ID)) + If (\_SB.GPID == TERRA2_PROJECT_ID) { Return (\_SB.DPTF.CTOK(DPTF_TERRA2_CPU_PASSIVE)) } Else { -- To view, visit
https://review.coreboot.org/c/coreboot/+/50320
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice6158943c61b3e2156a2ebbf96aa73e7cf87a7e Gerrit-Change-Number: 50320 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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Change in coreboot[master]: mb/google/cyan/variants/terra/include/variant/acpi/charger.asl: Conve...
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50319
) Change subject: mb/google/cyan/variants/terra/include/variant/acpi/charger.asl: Convert to ASL 2.0 ...................................................................... mb/google/cyan/variants/terra/include/variant/acpi/charger.asl: Convert to ASL 2.0 Change-Id: Ifd4e7b4dbdd51affb5d7696b8f3d50a7a93e767b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/50319/1 diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl index 4b0ac45..bb30c2e 100644 --- a/src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl +++ b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl @@ -94,7 +94,7 @@ Method (_DSW, 3, NotSerialized) { - Store (BUDDY_NIC_WAKE_GPIO, Local0) + Local0 = BUDDY_NIC_WAKE_GPIO If (Arg0 == 1) { // Enable GPIO as wake source -- To view, visit
https://review.coreboot.org/c/coreboot/+/50319
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifd4e7b4dbdd51affb5d7696b8f3d50a7a93e767b Gerrit-Change-Number: 50319 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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Change in coreboot[master]: src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50318
) Change subject: src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0 ...................................................................... src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0 Change-Id: I7cc47536b0c1e2c903df29402090abfccde82406 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/quanta/ene_kb3940q/acpi/battery.asl 1 file changed, 29 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/50318/1 diff --git a/src/ec/quanta/ene_kb3940q/acpi/battery.asl b/src/ec/quanta/ene_kb3940q/acpi/battery.asl index 09c1b29..3bf1de7 100644 --- a/src/ec/quanta/ene_kb3940q/acpi/battery.asl +++ b/src/ec/quanta/ene_kb3940q/acpi/battery.asl @@ -44,13 +44,13 @@ // Method to enable full battery workaround Method (BFWE) { - Store (One, BFWK) + BFWK = 1 } // Method to disable full battery workaround Method (BFWD) { - Store (Zero, BFWK) + BFWK = 0 } // Device insertion/removal control method that returns a device's status. @@ -68,18 +68,18 @@ Method (_BIF, 0, Serialized) { // Update fields from EC - Store (BDC0, Index (PBIF, 1)) // Batt Design Capacity - Store (BFC0, Index (PBIF, 2)) // Batt Last Full Charge Capacity - Store (BDV0, Index (PBIF, 4)) // Batt Design Voltage - Divide(BFC0, 0x64, , Local1) - Multiply(Local1, 0x0A, Local0) - Store(Local0, Index(PBIF, 5)) - Multiply(Local1, 0x05, Local0) - Store (Local0, Index (PBIF, 6)) - Store (ToString(Concatenate(BATD, 0x00)), Index (PBIF, 9)) // Model Number - Store (ToDecimalString(BSN0), Index (PBIF, 10)) // Serial Number - Store (ToString(Concatenate(BCHM, 0x00)), Index (PBIF, 11)) // Battery Type - Store (\BATV, Index (PBIF, 12)) // OEM information + PBIF [1] = BDC0 // Batt Design Capacity + PBIF [2] = BFC0 // Batt Last Full Charge Capacity + PBIF [4] = BDV0 // Batt Design Voltage + Local1 = BFC0 / 100 + Local0 = Local1 * 10 + PBIF [5] = Local0 + Local0 = Local1 * 5 + PBIF [6] = Local0 + PBIF [9] = ToString(Concatenate(BATD, 0x00)) // Model Number + PBIF [10] = ToDecimalString(BSN0) // Serial Number + PBIF [11] = ToString(Concatenate(BCHM, 0x00)) // Battery Type + PBIF [12] = \BATV // OEM information Return (PBIF) } @@ -95,45 +95,44 @@ // // Get battery state from EC - Store (BST0, Local0) - Store (Local0, Index (PBST, 0)) + Local0 = BST0 + PBST [0] = Local0 // // 1: BATTERY PRESENT RATE/CURRENT // - Store (BPC0, Local1) - If (LAnd (Local1, 0x8000)) { - Xor (Local1, 0xFFFF, Local1) - Increment (Local1) + Local1 = BPC0 + If (Local1 && 0x8000) { + Local1 ^= 0xffff + Local1++ } - Store (Local1, Index (PBST, 1)) + PBST [1] = Local1 // // 2: BATTERY REMAINING CAPACITY // - Store (BRC0, Local1) + Local1 = BRC0 - If (LAnd (BFWK, LAnd (ADPT, LNot (Local0)))) { + If (BFWK && ADPT && !Local0) { // On AC power and battery is neither charging // nor discharging. Linux expects a full battery // to report same capacity as last full charge. //
https://bugzilla.kernel.org/show_bug.cgi?id=12632
- Store (BFC0, Local2) + Local2 = BFC0 // See if within ~3% of full - ShiftRight (Local2, 5, Local3) - If (LAnd (LGreater (Local1, Subtract (Local2, Local3)), - LLess (Local1, Add (Local2, Local3)))) + Local3 = Local2 >> 5 + If (Local1 > (Local2 - Local3) && Local1 < (Local2 + Local3)) { - Store (Local2, Local1) + Local1 = Local2 } } - Store (Local1, Index (PBST, 2)) + PBST [2] = Local1 // // 3: BATTERY PRESENT VOLTAGE // - Store (BPV0, Index (PBST, 3)) + PBST [3] = BPV0 Return (PBST) } -- To view, visit
https://review.coreboot.org/c/coreboot/+/50318
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cc47536b0c1e2c903df29402090abfccde82406 Gerrit-Change-Number: 50318 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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Change in coreboot[master]: src/ec/lenovo/h8/acpi/battery.asl: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
Attention is currently required from: Alexander Couzens. HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50317
) Change subject: src/ec/lenovo/h8/acpi/battery.asl: Convert to ASL 2.0 ...................................................................... src/ec/lenovo/h8/acpi/battery.asl: Convert to ASL 2.0 Change-Id: I5de6c7da2440d682378a4ceb89b4bedd689dad60 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/lenovo/h8/acpi/battery.asl 1 file changed, 43 insertions(+), 41 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/50317/1 diff --git a/src/ec/lenovo/h8/acpi/battery.asl b/src/ec/lenovo/h8/acpi/battery.asl index 42b91b9..86026f5 100644 --- a/src/ec/lenovo/h8/acpi/battery.asl +++ b/src/ec/lenovo/h8/acpi/battery.asl @@ -80,7 +80,7 @@ */ Method(BPAG, 1, NotSerialized) { - Store(Arg0, PAGE) + PAGE = Arg0 #ifdef BATTERY_PAGE_DELAY_MS Sleep(BATTERY_PAGE_DELAY_MS) #endif @@ -94,32 +94,32 @@ Method(BSTA, 4, NotSerialized) { Acquire(ECLK, 0xffff) - Store(0, Local0) - ^BPAG(Or(1, Arg0)) - Store(BAMA, Local1) + Local0 = 0 + ^BPAG(Arg0 | 1) + Local1 = BAMA ^BPAG(Arg0) /* Battery dynamic information */ /* * Present rate is a 16bit signed int, positive while charging * and negative while discharging. */ - Store(BAPR, Local2) + Local2 = BAPR If (Arg2) // Charging { - Or(2, Local0, Local0) + Local0 |= 2 } Else { If (Arg3) // Discharging { - Or(1, Local0, Local0) + Local0 |= 1 // Negate present rate - Subtract(0x10000, Local2, Local2) + Local2 -= 0x10000 } Else // Full battery, force to 0 { - Store(0, Local2) + Local2 = 0 } } @@ -127,21 +127,21 @@ * The present rate value must be positive now, if it is not we have an * EC bug or inconsistency and force the value to 0. */ - If (LGreaterEqual (Local2, 0x8000)) { - Store(0, Local2) + If (Local2 > 0x8000) { + Local2 = 0 } - Store(Local0, Index(Arg1, 0x00)) + Arg1 [0] = Local0 if (Local1) { - Multiply (BARC, 10, Index(Arg1, 2)) - Multiply (Local2, BAVO, Local2) - Divide (Local2, 1000, , Index(Arg1, 1)) + Arg1 [2] = BARC * 10 + Local2 *= BAVO + Arg1 [1] = Local2 / 1000 } else { - Store(BARC, Index(Arg1, 2)) - Store(Local2, Index(Arg1, 1)) + Arg1 [2] = BARC + Arg1 [1] = Local2 } - Store(BAVO, Index(Arg1, 3)) + Arg1 [3] = BAVO Release(ECLK) Return (Arg1) } @@ -150,43 +150,45 @@ { Acquire(ECLK, 0xffff) ^BPAG(Or(1, Arg1)) /* Battery 0 static information */ - Xor(BAMA, 1, Index(Arg0, 0)) - Store(BAMA, Local0) + Arg0 [0] = BAMA ^ 1 + Local0 = BAMA ^BPAG(Arg1) - Store(BAFC, Local2) - ^BPAG(Or(2, Arg1)) - Store(BADC, Local1) + Local2 = BAFC + ^BPAG(Arg1 | 2) + Local1 = BADC if (Local0) { - Multiply (Local1, 10, Local1) - Multiply (Local2, 10, Local2) + Local1 *= 10 + Local2 *= 10 } - Store(Local1, Index(Arg0, 1)) // Design Capacity - Store(Local2, Index(Arg0, 2)) // Last full charge capacity - Store(BADV, Index(Arg0, 4)) // Design Voltage - Divide (Local2, 20, Local0, Index(Arg0, 5)) // Warning capacity + Arg0 [1] = Local1 // Design Capacity + Arg0 [2] = Local2 // Last full charge capacity + Arg0 [4] = BADV // Design Voltage + Local0 = Local2 % 20 // FIXME: Local0 not used + Arg0 [5] = Local2 / 20 // Warning capacity - Store (BASN, Local0) + Local0 = BASN Name (SERN, Buffer (0x06) { " " }) - Store (4, Local1) + Local1 = 4 While (Local0) { - Divide (Local0, 0x0A, Local2, Local0) - Add (Local2, 48, Index (SERN, Local1)) - Decrement (Local1) + Local2 = Local0 % 10 + Local0 /= 10 + SERN [Local1] = Local2 + 48 + Local1-- } - Store (SERN, Index (Arg0, 10)) // Serial Number + Arg0 [10] = SERN // Serial Number ^BPAG(Or(4, Arg1)) Name (TYPE, Buffer() { 0, 0, 0, 0, 0 }) - Store(BATY, TYPE) - Store(TYPE, Index (Arg0, 11)) // Battery type - ^BPAG(Or(5, Arg1)) - Store(BAOE, Index (Arg0, 12)) // OEM information - ^BPAG(Or(6, Arg1)) - Store(BANA, Index (Arg0, 9)) // Model number + TYPE = BATY + Arg0 [11] = TYPE // Battery type + ^BPAG(Arg1 | 5) + Arg0 [12] = BAOE // OEM information + ^BPAG(Arg1 | 6) + Arg0 [9] = BANA // Model number Release(ECLK) Return (Arg0) } -- To view, visit
https://review.coreboot.org/c/coreboot/+/50317
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5de6c7da2440d682378a4ceb89b4bedd689dad60 Gerrit-Change-Number: 50317 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange
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Change in coreboot[master]: src/ec/acpi/ec.asl: Convert to ASL 2.0
by HAOUAS Elyes (Code Review)
05 Feb '21
05 Feb '21
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/c/coreboot/+/50316
) Change subject: src/ec/acpi/ec.asl: Convert to ASL 2.0 ...................................................................... src/ec/acpi/ec.asl: Convert to ASL 2.0 Change-Id: I078ca86cf9e948d4dd4338fca842ae3e580228ef Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/acpi/ec.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/50316/1 diff --git a/src/ec/acpi/ec.asl b/src/ec/acpi/ec.asl index dd3efac..eae2ef7 100644 --- a/src/ec/acpi/ec.asl +++ b/src/ec/acpi/ec.asl @@ -68,7 +68,7 @@ { Local0 = WAIT_EC_SC (EC_IBF, 0) If (!Local0) { - Store (Arg0, EC_SC) + EC_SC = Arg0 } Return (Local0) } -- To view, visit
https://review.coreboot.org/c/coreboot/+/50316
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I078ca86cf9e948d4dd4338fca842ae3e580228ef Gerrit-Change-Number: 50316 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange
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