coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: tests/Makefile.inc: Add data attribute
by Jakub Czapiga (Code Review) 03 Dec '21

03 Dec '21

Jakub Czapiga has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/57554 ) Change subject: tests/Makefile.inc: Add data attribute ...................................................................... Abandoned Not necessary anymore -- To view, visit https://review.coreboot.org/c/coreboot/+/57554 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d0491228c19735f0382ac90d605ed6cc00157d4 Gerrit-Change-Number: 57554 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3
by Subrata Banik (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Cliff Huang, Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59855 ) Change subject: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3 ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: LGTM -- To view, visit https://review.coreboot.org/c/coreboot/+/59855 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I19cb05a74acfa3ded7867b1cac32c161a83b4f7d Gerrit-Change-Number: 59855 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 06:08:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Define soc_get_pcie_rp_type
by Subrata Banik (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59854 ) Change subject: soc/intel/alderlake: Define soc_get_pcie_rp_type ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/alderlake/pcie_rp.c: https://review.coreboot.org/c/coreboot/+/59854/comment/ace3751b_79e9747e PS1, Line 64: if (is_part_of_group(dev, cpu_rp_groups)) @Tim, just a point for discussion, ADL-N doesn't have CPU RPs hence should it be like this ? if (CONFIG_MAX_CPU_ROOT_PORTS) if (is_part_of_group(dev, cpu_rp_groups)) return PCIE_RP_CPU; -- To view, visit https://review.coreboot.org/c/coreboot/+/59854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7438513e10b7cea8dac678b97a901b710247c188 Gerrit-Change-Number: 59854 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 06:05:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Define soc_get_pcie_rp_type
by Subrata Banik (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59854 ) Change subject: soc/intel/alderlake: Define soc_get_pcie_rp_type ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7438513e10b7cea8dac678b97a901b710247c188 Gerrit-Change-Number: 59854 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 06:02:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Define soc_get_pcie_rp_type
by Subrata Banik (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59853 ) Change subject: soc/intel/tigerlake: Define soc_get_pcie_rp_type ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/soc/intel/common/block/include/intelblocks/pcie_rp.h: https://review.coreboot.org/c/coreboot/+/59853/comment/48393eea_d38babd9 PS1, Line 120: /* : * For PCIe RTD3 support, each SoC that uses it must implement this function. : */ nit ? /* For PCIe RTD3 support, each SoC that uses it must implement this function. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/59853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3f7d3f2fc12ae2b53604cd8f8b694a7674c3620 Gerrit-Change-Number: 59853 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 06:01:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Move enum pcie_rp_type to intelblocks/pcie_rp.h
by Subrata Banik (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59852 ) Change subject: soc/intel: Move enum pcie_rp_type to intelblocks/pcie_rp.h ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ccf0ed9504dbf6c60e521a45ea4b916d3dcbeda Gerrit-Change-Number: 59852 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 05:54:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: acpi: Add #define for Mutex "no timeout" value
by Subrata Banik (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59851 ) Change subject: acpi: Add #define for Mutex "no timeout" value ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59851/comment/e643685b_3ccde391 PS1, Line 8: nit: may be just call out why we need this? even if further CL is going to use this macro, still its okay to just mention what for we have added this macro IMO. -- To view, visit https://review.coreboot.org/c/coreboot/+/59851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16bc9f3f04dd1e3dc0f3eca3e56377e6f48132b2 Gerrit-Change-Number: 59851 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 05:54:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cbfs: Remove deprecated APIs
by Werner Zeh (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Christian Walter, Julius Werner. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59682 ) Change subject: cbfs: Remove deprecated APIs ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Patchset: PS2: > Ah great, that is good news. […] Yes, I am OK with this patch and I will have a look at the MTRR thing on Elkhart Lake. Since this is the root cause it needs to be fixed anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/59682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1cec0ca2d9d311626a087318d1d78163243bfc3c Gerrit-Change-Number: 59682 Gerrit-PatchSet: 4 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 05:45:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/var/gimble: Set PsysPmax to 143 W
by Chia-Ling Hou (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Paul Menzel. Chia-Ling Hou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59797 ) Change subject: mb/var/gimble: Set PsysPmax to 143 W ...................................................................... Patch Set 2: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59797/comment/3842bae1_771662f6 PS1, Line 2: Jolin > Chia-Ling Hou? […] Done https://review.coreboot.org/c/coreboot/+/59797/comment/b2780c6c_03c10db0 PS1, Line 7: Add PsysPmax setting to 143W > Set PsysPmax to 143 W Done https://review.coreboot.org/c/coreboot/+/59797/comment/cd274368_5bd04582 PS1, Line 7: gimble > brya/var/gimble Done https://review.coreboot.org/c/coreboot/+/59797/comment/16fb1af1_645e90dd PS1, Line 9: 143w > 143 W Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59797 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id6a203f05ecfcc1020a422850d35fa3fa64e01d0 Gerrit-Change-Number: 59797 Gerrit-PatchSet: 2 Gerrit-Owner: Chia-Ling Hou <chia-ling.hou(a)intel.corp-partner.google.com> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 03 Dec 2021 05:39:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/var/gimble: Set PsysPmax to 143 W
by Chia-Ling Hou (Code Review) 03 Dec '21

03 Dec '21

Attention is currently required from: Chia-Ling Hou. Hello build bot (Jenkins), Tim Wawrzynczak, Ryan Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59797 to look at the new patch set (#2). Change subject: mb/var/gimble: Set PsysPmax to 143 W ...................................................................... mb/var/gimble: Set PsysPmax to 143 W This patch adds the setting of PsysPmax to 143 W according to gimble board design. BUG=b:206990759 TEST=emerge-brya coreboot chromeos-bootimage & ensure the value is passed to FSP by enabling FSP log & Boot into the OS Change-Id: Id6a203f05ecfcc1020a422850d35fa3fa64e01d0 Signed-off-by: Chia-Ling Hou <chia-ling.hou(a)intel.corp-partner.google.com> --- M src/mainboard/google/brya/variants/gimble/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/59797/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59797 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id6a203f05ecfcc1020a422850d35fa3fa64e01d0 Gerrit-Change-Number: 59797 Gerrit-PatchSet: 2 Gerrit-Owner: Chia-Ling Hou <chia-ling.hou(a)intel.corp-partner.google.com> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Chia-Ling Hou <chia-ling.hou(a)intel.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2021