coreboot-gerrit December 2021

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Change in coreboot[master]: soc/amd/cezanne: FSP: Add UPD entry for eDP tuning
by Bao Zheng (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59918 to look at the new patch set (#5). Change subject: soc/amd/cezanne: FSP: Add UPD entry for eDP tuning ...................................................................... soc/amd/cezanne: FSP: Add UPD entry for eDP tuning The document about eDP tuning is attached in issue tracker of this ticket, at the link: https://partnerissuetracker.corp.google.com/issues/203061533#comment6 BUG=b:203061533 Change-Id: I9b85faac4f2fa1fb2c14bb85b615346d4379baac Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/cezanne/chip.h M src/soc/amd/cezanne/fsp_m_params.c M src/vendorcode/amd/fsp/cezanne/FspmUpd.h 3 files changed, 31 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/59918/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b85faac4f2fa1fb2c14bb85b615346d4379baac Gerrit-Change-Number: 59918 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek: add support for tracker version one
by Rex-BC Chen (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Hung-Te Lin, Xi Chen, Paul Menzel. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59989 ) Change subject: soc/mediatek: add support for tracker version one ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb146974da118b1cf5a349370bf7b2fa13f1aba8 Gerrit-Change-Number: 59989 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 13 Dec 2021 06:28:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: set up open-drain ChromeOS pins
by Rex-BC Chen (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60002 to look at the new patch set (#5). Change subject: mb/google/corsola: set up open-drain ChromeOS pins ...................................................................... mb/google/corsola: set up open-drain ChromeOS pins Set open-drain GPIOs for ChromeOS as input and high-z mode. After apply this patch, we can measure these pins from 1.0V to correct voltage (1.8V) to prevent wrong judgement of low/high. Reference document: MT8186_SoC_Pinmux_V1_1 BUG=b:209342636 TEST=measure pins voltage 1.8V on kingler board Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ib55a773bb63404a1b952f7e7645eb7aba6638b00 --- M src/mainboard/google/corsola/bootblock.c M src/mainboard/google/corsola/chromeos.c M src/mainboard/google/corsola/gpio.h 3 files changed, 46 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/60002/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib55a773bb63404a1b952f7e7645eb7aba6638b00 Gerrit-Change-Number: 60002 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8186: add tracker dump
by Rex-BC Chen (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59990 to look at the new patch set (#4). Change subject: soc/mediatek/mt8186: add tracker dump ...................................................................... soc/mediatek/mt8186: add tracker dump Tracker is a debugging tool, and MT8186 only supports AP tracker. When bus timeout occurs, the system reboots and latches some values which could be used for debugging. This function will be triggered only trigger when it encounters the bug hanging issue. BUG=b:202871018 TEST=range of registers are dumped as expected. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ie023de2a6f7421a16b2516baa0bf0bf6fff589e2 --- M src/soc/mediatek/common/tracker.c M src/soc/mediatek/mt8186/Makefile.inc M src/soc/mediatek/mt8186/bootblock.c M src/soc/mediatek/mt8186/include/soc/addressmap.h A src/soc/mediatek/mt8186/include/soc/tracker.h 5 files changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/59990/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie023de2a6f7421a16b2516baa0bf0bf6fff589e2 Gerrit-Change-Number: 59990 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/corsola: set up open-drain ChromeOS pins
by Yu-Ping Wu (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60002 ) Change subject: mb/google/corsola: set up open-drain ChromeOS pins ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/corsola/chromeos.c: https://review.coreboot.org/c/coreboot/+/60002/comment/9570eb0f_b99c0171 PS4, Line 29: GPO > GPO os GPIO? GPO or GPIO? -- To view, visit https://review.coreboot.org/c/coreboot/+/60002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib55a773bb63404a1b952f7e7645eb7aba6638b00 Gerrit-Change-Number: 60002 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 13 Dec 2021 06:16:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: set up open-drain ChromeOS pins
by Yu-Ping Wu (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60002 ) Change subject: mb/google/corsola: set up open-drain ChromeOS pins ...................................................................... Patch Set 4: (3 comments) File src/mainboard/google/corsola/chromeos.c: https://review.coreboot.org/c/coreboot/+/60002/comment/d9bd5e0b_fa1cba65 PS4, Line 12: Setup Set up (Setup is a noun.) https://review.coreboot.org/c/coreboot/+/60002/comment/85fc45b2_bc9b8a03 PS4, Line 29: GPO GPO os GPIO? https://review.coreboot.org/c/coreboot/+/60002/comment/57f38a93_c8fbdd96 PS4, Line 29: Setup Set up -- To view, visit https://review.coreboot.org/c/coreboot/+/60002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib55a773bb63404a1b952f7e7645eb7aba6638b00 Gerrit-Change-Number: 60002 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 13 Dec 2021 06:16:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: add tracker dump
by Yu-Ping Wu (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59990 ) Change subject: soc/mediatek/mt8186: add tracker dump ...................................................................... Patch Set 3: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59990/comment/a83394c2_1f27de19 PS3, Line 11: values could be moved to the previous line. https://review.coreboot.org/c/coreboot/+/59990/comment/648cb4b2_e4f86045 PS3, Line 11: debug debugging https://review.coreboot.org/c/coreboot/+/59990/comment/599f6a94_45c50606 PS3, Line 13: issues of bus hanged the bug hanging issue https://review.coreboot.org/c/coreboot/+/59990/comment/34081d40_4efc9515 PS3, Line 13: only be trigger will be triggered only https://review.coreboot.org/c/coreboot/+/59990/comment/17648e83_d5c275af PS3, Line 14: we confirm the range of registers are what we want to know. I'm not sure what you mean by this. Maybe just remove this sentence? -- To view, visit https://review.coreboot.org/c/coreboot/+/59990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie023de2a6f7421a16b2516baa0bf0bf6fff589e2 Gerrit-Change-Number: 59990 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 13 Dec 2021 06:13:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Separate signed amdfw
by Kangheui Won (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel, Karthik Ramasubramanian, Felix Held. Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59867 ) Change subject: soc/amd/cezanne: Separate signed amdfw ...................................................................... Patch Set 3: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59867/comment/57ae564e_6ea74523 PS2, Line 13: which means : faster boot time > I’d mention the 60 ms here too. […] I've removed mainboard part here and working on other patches before we enable feature for specific mainboard(guybrush). I think numbers might change, I'll specify details on the future mainboard CL. File src/mainboard/google/guybrush/Kconfig: https://review.coreboot.org/c/coreboot/+/59867/comment/b15f91f5_ffa39bd7 PS2, Line 59: y > We don't want to enable this until we are passing the hash table to the PSP and it is verifying it. Done File src/soc/amd/cezanne/Kconfig: https://review.coreboot.org/c/coreboot/+/59867/comment/25b1470d_ee02b94d PS2, Line 464: amd > AMD Done https://review.coreboot.org/c/coreboot/+/59867/comment/ccaa306c_903d1fe9 PS2, Line 465: them and > Comma after *them*? Done https://review.coreboot.org/c/coreboot/+/59867/comment/fafcb102_c7910ab5 PS2, Line 465: rely on AMD's verification > … in PSP? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59867 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4fd3cff11a38d82afb8c5ce379f1d1b5b9adfbf Gerrit-Change-Number: 59867 Gerrit-PatchSet: 3 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 13 Dec 2021 06:10:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02
by Nick Vaccaro (Code Review) 13 Dec '21

13 Dec '21

Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59757 ) Change subject: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02 ...................................................................... vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02 The headers added are generated as per FSP v2471_02. Previous FSP version was v2422_01. Changes Include: - UPDs description update in FspsUpd.h - Adjust UPD Offset in FspmUpd.h and FspsUpd.h BUG=b:208336249 BRANCH=None TEST=Build and boot brya Change-Id: I4d04652c06a1c1823d3859be209710c273a2ae8c Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59757 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h 2 files changed, 8 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h index 271e01c..191ef27 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h @@ -3164,7 +3164,7 @@ /** Offset 0x0AA8 - Reserved **/ - UINT8 Reserved45[104]; + UINT8 Reserved45[136]; } FSP_M_CONFIG; /** Fsp M UPD Configuration @@ -3183,11 +3183,11 @@ **/ FSP_M_CONFIG FspmConfig; -/** Offset 0x0B10 +/** Offset 0x0B30 **/ - UINT8 UnusedUpdSpace31[6]; + UINT8 UnusedUpdSpace34[6]; -/** Offset 0x0B16 +/** Offset 0x0B36 **/ UINT16 UpdTerminator; } FSPM_UPD; diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h index ddf6ca8..a73fe59 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h @@ -3380,8 +3380,7 @@ UINT8 ProcHotLock; /** Offset 0x0CF3 - Configuration for boot TDP selection - Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP - Up;0xFF : Deactivate + Deprecated. Move to premem. **/ UINT8 ConfigTdpLevel; @@ -3869,7 +3868,7 @@ /** Offset 0x0FD5 - Reserved **/ - UINT8 Reserved56[19]; + UINT8 Reserved56[123]; } FSP_S_CONFIG; /** Fsp S UPD Configuration @@ -3888,11 +3887,11 @@ **/ FSP_S_CONFIG FspsConfig; -/** Offset 0x0FE8 +/** Offset 0x1050 **/ UINT8 UnusedUpdSpace42[6]; -/** Offset 0x0FEE +/** Offset 0x1056 **/ UINT16 UpdTerminator; } FSPS_UPD; -- To view, visit https://review.coreboot.org/c/coreboot/+/59757 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d04652c06a1c1823d3859be209710c273a2ae8c Gerrit-Change-Number: 59757 Gerrit-PatchSet: 2 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02
by Nick Vaccaro (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Ronak Kanabar, Patrick Rudolph. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59757 ) Change subject: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59757 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d04652c06a1c1823d3859be209710c273a2ae8c Gerrit-Change-Number: 59757 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 13 Dec 2021 06:08:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021