coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: vc/eltan/security/verified_boot/vboot_check.c: Add cbfs_map_compressed()
by Frans Hendriks (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Felix Singer, Michał Żygowski, Julius Werner, Arthur Heymans, Wim Vervoorn. Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52025 ) Change subject: vc/eltan/security/verified_boot/vboot_check.c: Add cbfs_map_compressed() ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > Sorry, but you're just... breaking every assumption of how CBFS is supposed to be used with this. […] We are working to have the current solution (still)working. Changing behavoir of functions might result in building binaries, but not garanty run-time functionality. You point to CONFIG_CBFS_VERIFICATION, but the help mentioned work in progress. Do not use (yet). Does VBOOT contain function to hash unconpressed CBFS part? -- To view, visit https://review.coreboot.org/c/coreboot/+/52025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc799f49ee198100deab1ecf66336831d9aed415 Gerrit-Change-Number: 52025 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Mon, 13 Dec 2021 13:18:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/amd/agesa/family14/model_14_init.c: create correct MTRR solution
by Arthur Heymans (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Michał Żygowski, Michał Kopeć. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52781 ) Change subject: cpu/amd/agesa/family14/model_14_init.c: create correct MTRR solution ...................................................................... Patch Set 7: (2 comments) File src/cpu/amd/agesa/family14/model_14_init.c: https://review.coreboot.org/c/coreboot/+/52781/comment/9de9ef51_5ad8ee56 PS7, Line 24: if (acpi_is_wakeup_s3()) { : restore_mtrr(); This will result in different MTRR solutions at resume. https://review.coreboot.org/c/coreboot/+/52781/comment/2b2272ad_0b48ca3a PS7, Line 32: /* : * Enable ROM caching on BSP we just lost when creating MTRR solution, for : * faster execution : */ : if (boot_cpu()) { : mtrr_use_temp_range(OPTIMAL_CACHE_ROM_BASE, OPTIMAL_CACHE_ROM_SIZE, : MTRR_TYPE_WRPROT); : } code is not executed from ROM at this point. -- To view, visit https://review.coreboot.org/c/coreboot/+/52781 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If706f8851ed0b1d45729e81175d82abb1d9193be Gerrit-Change-Number: 52781 Gerrit-PatchSet: 7 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Comment-Date: Mon, 13 Dec 2021 13:15:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Add PSP_S0I3_RESUME_VERSTAGE Kconfig option
by Nico Huber (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60024 ) Change subject: mb/google/guybrush: Add PSP_S0I3_RESUME_VERSTAGE Kconfig option ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Just the verstage portion of coreboot is run again. It initializes eSPI and TPM then exits early. […] Ah, so there's hardware init because verstage runs before the bootblock, I guess. If the TPM is reset, doesn't that imply, for instance, that all measure- ments are lost just when the OS idled? or is S0i3 only entered on explicit request? -- To view, visit https://review.coreboot.org/c/coreboot/+/60024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c185f787c1e77bd09f6cbbb1f47deb665ed0c79 Gerrit-Change-Number: 60024 Gerrit-PatchSet: 2 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 13 Dec 2021 13:08:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Add PSP_S0I3_RESUME_VERSTAGE Kconfig option
by Rob Barnes (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Jason Glenesk, Nico Huber, Raul Rangel, Marshall Dawson, Felix Held. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60024 ) Change subject: mb/google/guybrush: Add PSP_S0I3_RESUME_VERSTAGE Kconfig option ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Out of curiosity, what is it verifying and why? Is coreboot run again? Just the verstage portion of coreboot is run again. It initializes eSPI and TPM then exits early. This is required because RESET_L is asserted in S0i3 which causes the TPM to be reset, so it needs to be reinitialized during S0i3 resume. -- To view, visit https://review.coreboot.org/c/coreboot/+/60024 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c185f787c1e77bd09f6cbbb1f47deb665ed0c79 Gerrit-Change-Number: 60024 Gerrit-PatchSet: 2 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 13 Dec 2021 12:59:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cannonlake: Configure common FSP memory settings only once
by Felix Singer (Code Review) 13 Dec '21

13 Dec '21

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60058 ) Change subject: soc/intel/cannonlake: Configure common FSP memory settings only once ...................................................................... soc/intel/cannonlake: Configure common FSP memory settings only once `meminit_memcfg()` does common memory configuration, which is not specific to each DIMM. Thus, move it out of the for-loop and call it once. Change-Id: If74875b45cd0d7a759883eaf564505ebf281bed5 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60058 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/cannonlake/cnl_memcfg_init.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/soc/intel/cannonlake/cnl_memcfg_init.c b/src/soc/intel/cannonlake/cnl_memcfg_init.c index a9f9e95..448e56c 100644 --- a/src/soc/intel/cannonlake/cnl_memcfg_init.c +++ b/src/soc/intel/cannonlake/cnl_memcfg_init.c @@ -136,7 +136,7 @@ default: die("no valid way to read mem info"); } - - meminit_memcfg(mem_cfg, cnl_cfg); } + + meminit_memcfg(mem_cfg, cnl_cfg); } -- To view, visit https://review.coreboot.org/c/coreboot/+/60058 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If74875b45cd0d7a759883eaf564505ebf281bed5 Gerrit-Change-Number: 60058 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Revert "util/crossgcc: Update gcc to 11.2"
by Paul Menzel (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Nico Huber, Branden Waldner, Idwer Vollering, Mike Banon, Arthur Heymans, Jacob Garber, Werner Zeh, Iru Cai, Harshit Sharma. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59636 ) Change subject: Revert "util/crossgcc: Update gcc to 11.2" ...................................................................... Patch Set 1: (2 comments) Patchset: PS1: > I'd like to warn you about GCC upgrade 8.3.0 --> 11. […] Please provide at least the logs, and build configuration, so it’s clear what payloads and so on are used. It sounds to me like, some payload broke and not coreboot per se, as you see all logs? PS1: Are there other Lenovo G505 users, who can reproduce the regression? -- To view, visit https://review.coreboot.org/c/coreboot/+/59636 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09a789f9ccb284ac7cad32b12bbf60ecb82efb44 Gerrit-Change-Number: 59636 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Reviewer: Harshit Sharma <harshitsharmajs(a)gmail.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Michal Zygowski <miczyg94(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Attention: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Attention: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Attention: Harshit Sharma <harshitsharmajs(a)gmail.com> Gerrit-Comment-Date: Mon, 13 Dec 2021 12:41:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/cse: Update help text for CSE_OEMP_FILE
by Paul Menzel (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Tim Wawrzynczak, Ravindra, Nick Vaccaro, Subrata Banik, Sridhar Siricilla, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60020 ) Change subject: soc/intel/common/cse: Update help text for CSE_OEMP_FILE ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id52b51ab1c910d70b7897eb31add8287b5b0166f Gerrit-Change-Number: 60020 Gerrit-PatchSet: 3 Gerrit-Owner: Ravindra <ravindra(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.bmg(a)gmail.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ravindra <ravindra(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 13 Dec 2021 12:32:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taniks: Configure DRIVER_TPM_I2C_BUS for taniks
by Paul Menzel (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Felix Singer, Joey Peng, Tim Wawrzynczak, YH Lin. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60077 ) Change subject: mb/google/brya/var/taniks: Configure DRIVER_TPM_I2C_BUS for taniks ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60077/comment/9f197d41_91a10ad5 PS2, Line 7: for taniks Remove, as it’s already part of the prefix? -- To view, visit https://review.coreboot.org/c/coreboot/+/60077 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b1719c3140c13f67e7cb0e6a69257774884bd4d Gerrit-Change-Number: 60077 Gerrit-PatchSet: 2 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-Comment-Date: Mon, 13 Dec 2021 12:29:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table
by Paul Menzel (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Kevin Chiu, Bhanu Prakash Maiya, Eric Peers. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60075 ) Change subject: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60075/comment/a25f09ff_b5d11fb9 PS1, Line 9: Hynix H54G56CYRBX247 : Hynix H54G46CYRBX267 Make it a list? 1. Hynix H54G56CYRBX247 2. Hynix H54G46CYRBX267 File src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt: https://review.coreboot.org/c/coreboot/+/60075/comment/d4a852e3_d18bdfc7 PS1, Line 11: H54G46CYRBX267 Already there? File src/mainboard/google/guybrush/variants/nipperkin/memory/Makefile.inc: https://review.coreboot.org/c/coreboot/+/60075/comment/69b64b21_d25ed3c7 PS1, Line 8: H54G46CYRBX267 Already there? -- To view, visit https://review.coreboot.org/c/coreboot/+/60075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99bed32025d10f62e63ace8f7f23e7cc3a740e93 Gerrit-Change-Number: 60075 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Comment-Date: Mon, 13 Dec 2021 12:29:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: FSP: Add UPD entry for eDP tuning
by Nico Huber (Code Review) 13 Dec '21

13 Dec '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59918 ) Change subject: soc/amd/cezanne: FSP: Add UPD entry for eDP tuning ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59918/comment/590c784a_98b0bce7 PS5, Line 11: https://partnerissuetracker.corp.google.com/issues/203061533#comment6 That link doesn't seem public. What's the log-in? -- To view, visit https://review.coreboot.org/c/coreboot/+/59918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b85faac4f2fa1fb2c14bb85b615346d4379baac Gerrit-Change-Number: 59918 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 13 Dec 2021 12:25:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2021