coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya/var/vell: update memory settings
by Shon Wang (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Kevin Chiu, YH Lin, Paul Menzel, Tim Wawrzynczak, Nick Vaccaro, Robert Chen, Patrick Rudolph. Shon Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59334 ) Change subject: mb/google/brya/var/vell: update memory settings ...................................................................... Patch Set 20: (1 comment) File src/mainboard/google/brya/variants/vell/memory.c: https://review.coreboot.org/c/coreboot/+/59334/comment/d9aa19d6_69486cbb PS12, Line 68: > Still no change? Hi Tim we don't see other variants add this flag, not sure its necessary or not. Should i add `.LpDdrDqDqsReTraining = 1` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/59334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0bbac5eaebc77639be6c1bc399658ac90e72fbb Gerrit-Change-Number: 59334 Gerrit-PatchSet: 20 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 03:25:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Bill XIE (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Arthur Heymans, Nico Huber, Patrick Rudolph, Angel Pons, Julius Werner, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin. Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51671 ) Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time ...................................................................... Patch Set 35: (1 comment) File src/arch/x86/Kconfig: https://review.coreboot.org/c/coreboot/+/51671/comment/565471f8_2fd267c4 PS29, Line 357: config ECFW_PTR_SIZE : int : help : Size of reserved space for EC firmware pointer > > Exactly that. And ECFW_PTR_ADDR is a Kconfig, so we kind of have to expect that it might change. […] I move the assert into bootblock.ld now. -- To view, visit https://review.coreboot.org/c/coreboot/+/51671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Gerrit-Change-Number: 51671 Gerrit-PatchSet: 35 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 03:05:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build ...
by Bill XIE (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Arthur Heymans, Nico Huber, Patrick Rudolph, Angel Pons, Julius Werner, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin. Hello build bot (Jenkins), Nico Huber, Patrick Rudolph, Angel Pons, Julius Werner, Arthur Heymans, Michael Niewöhner, Kyösti Mälkki, Aaron Durbin, Iru Cai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51671 to look at the new patch set (#36). Change subject: arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time ...................................................................... arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time According to util/kbc1126/README.md, for these ECs to work, the address and size of their two firmware should be written to $s-0x100` (`$s` means the image size, done with kbc1126_ec_insert), which means that every existing section (especially those used to store code) should not overlap this address, otherwise the bootblock will get damaged when inserting firmwares of the EC. In this commit, ecfw_ptr is a structure initialized at build time according to CONFIG_KBC1126_FW1_OFFSET and CONFIG_KBC1126_FW2_OFFSET (to do so, they should be redefined as hex), and linked to CONFIG_ECFW_PTR_ADDR within bootblock, so kbc1126_ec_insert is not needed at build time any more. Test passed on Elitebook Folio 9470m. Signed-off-by: Bill XIE <persmule(a)hardenedlinux.org> Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e --- M src/arch/x86/Kconfig M src/arch/x86/bootblock.ld M src/ec/hp/kbc1126/Kconfig M src/ec/hp/kbc1126/Makefile.inc A src/ec/hp/kbc1126/ecfw_ptr.c A src/ec/hp/kbc1126/ecfw_ptr.h 6 files changed, 75 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/51671/36 -- To view, visit https://review.coreboot.org/c/coreboot/+/51671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f0de0c4d7283e630242fbe84a46e0547783c49e Gerrit-Change-Number: 51671 Gerrit-PatchSet: 36 Gerrit-Owner: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush/dewatt: update DRAM ID table
by Kenneth Chan (Code Review) 14 Dec '21

14 Dec '21

Kenneth Chan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60090 ) Change subject: mb/google/guybrush/dewatt: update DRAM ID table ...................................................................... mb/google/guybrush/dewatt: update DRAM ID table 1.Samsung LPDDR4X 4266 4G K4UBE3D4AB-MGCL 2.Hynix LPDDR4X 4266 4G H54G56CYRBX247 BUG=b:203014978 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage Signed-off-by: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Change-Id: Ie5ece849a86c75be5af9bc0393090b5f1e33bfed --- M src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc M src/mainboard/google/guybrush/variants/dewatt/memory/dram_id.generated.txt M src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt 3 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/60090/1 diff --git a/src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc b/src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc index 26f27d5..089153e 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc +++ b/src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc @@ -7,4 +7,4 @@ SPD_SOURCES += spd/lp4x/set-1/spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 1(0b0001) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE, MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, K4U6E3S4AB-MGCL, H54G46CYRBX267, MT53E512M32D1NP-046 WT:B SPD_SOURCES += spd/lp4x/set-1/spd-9.hex # ID = 2(0b0010) Parts = NT6AP256T32AV-J1 -SPD_SOURCES += spd/lp4x/set-1/spd-3.hex # ID = 3(0b0011) Parts = MT53E1G32D2NP-046 WT:B, H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR +SPD_SOURCES += spd/lp4x/set-1/spd-3.hex # ID = 3(0b0011) Parts = MT53E1G32D2NP-046 WT:B, H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR, K4UBE3D4AB-MGCL, H54G56CYRBX247 diff --git a/src/mainboard/google/guybrush/variants/dewatt/memory/dram_id.generated.txt b/src/mainboard/google/guybrush/variants/dewatt/memory/dram_id.generated.txt index 6a7b18b..3346e8f 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/memory/dram_id.generated.txt +++ b/src/mainboard/google/guybrush/variants/dewatt/memory/dram_id.generated.txt @@ -13,6 +13,8 @@ K4U6E3S4AA-MGCR 1 (0001) H9HCNNNCPMMLXR-NEE 3 (0011) K4UBE3D4AA-MGCR 3 (0011) +K4UBE3D4AB-MGCL 3 (0011) K4U6E3S4AB-MGCL 1 (0001) H54G46CYRBX267 1 (0001) +H54G56CYRBX247 3 (0011) MT53E512M32D1NP-046 WT:B 1 (0001) diff --git a/src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt b/src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt index a91017c..9c8475f 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt +++ b/src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt @@ -7,6 +7,8 @@ K4U6E3S4AA-MGCR H9HCNNNCPMMLXR-NEE K4UBE3D4AA-MGCR +K4UBE3D4AB-MGCL K4U6E3S4AB-MGCL H54G46CYRBX267 +H54G56CYRBX247 MT53E512M32D1NP-046 WT:B -- To view, visit https://review.coreboot.org/c/coreboot/+/60090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5ece849a86c75be5af9bc0393090b5f1e33bfed Gerrit-Change-Number: 60090 Gerrit-PatchSet: 1 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table
by Rob Barnes (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Kevin Chiu, Bhanu Prakash Maiya, Paul Menzel. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60075 ) Change subject: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99bed32025d10f62e63ace8f7f23e7cc3a740e93 Gerrit-Change-Number: 60075 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 02:39:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table
by Kevin Chiu (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Bhanu Prakash Maiya, Paul Menzel. Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60075 ) Change subject: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table ...................................................................... Patch Set 2: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60075/comment/f46aef3b_db686512 PS1, Line 9: Hynix H54G56CYRBX247 : Hynix H54G46CYRBX267 > Make it a list? […] Done File src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt: https://review.coreboot.org/c/coreboot/+/60075/comment/31146429_5eed8ef7 PS1, Line 11: H54G46CYRBX267 > Already there? Done File src/mainboard/google/guybrush/variants/nipperkin/memory/Makefile.inc: https://review.coreboot.org/c/coreboot/+/60075/comment/19abe872_d754642a PS1, Line 8: H54G46CYRBX267 > Already there? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/60075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99bed32025d10f62e63ace8f7f23e7cc3a740e93 Gerrit-Change-Number: 60075 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 14 Dec 2021 02:39:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table
by Kevin Chiu (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Kevin Chiu, Bhanu Prakash Maiya. Hello build bot (Jenkins), Bhanu Prakash Maiya, Rob Barnes, Eric Peers, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60075 to look at the new patch set (#2). Change subject: mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table ...................................................................... mb/google/guybrush/var/nipperkin: update LPDDR4X DRAM table add Hynix H54G56CYRBX247 support BUG=b:210365851 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage power on successfully Change-Id: I99bed32025d10f62e63ace8f7f23e7cc3a740e93 Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com> --- M src/mainboard/google/guybrush/variants/guybrush/memory/mem_parts_used.txt M src/mainboard/google/guybrush/variants/nipperkin/memory/Makefile.inc M src/mainboard/google/guybrush/variants/nipperkin/memory/dram_id.generated.txt 3 files changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/60075/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99bed32025d10f62e63ace8f7f23e7cc3a740e93 Gerrit-Change-Number: 60075 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/cezanne: FSP: Add UPD entry for eDP tuning
by Patrick Huang (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Bao Zheng, Jason Glenesk, Nico Huber, Marshall Dawson, Zheng Bao, Felix Held. Patrick Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59918 ) Change subject: soc/amd/cezanne: FSP: Add UPD entry for eDP tuning ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b85faac4f2fa1fb2c14bb85b615346d4379baac Gerrit-Change-Number: 59918 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Huang <patrick.huang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 14 Dec 2021 02:28:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: enhance U2 driving strength
by Kevin Chiu (Code Review) 14 Dec '21

14 Dec '21

Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60089 ) Change subject: mb/google/guybrush/var/nipperkin: enhance U2 driving strength ...................................................................... mb/google/guybrush/var/nipperkin: enhance U2 driving strength BUG=b:203049656 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage Change-Id: If5a6563e93bfa6beb529a5593fcc9124ce62d77f Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com> --- M src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb 1 file changed, 133 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/60089/1 diff --git a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb index 2d3b162..cee3556 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb @@ -27,6 +27,139 @@ end chip soc/amd/cezanne + + register "usb_phy_custom" = "1" + register "usb_phy" = "{ + /* Left USB C0 Port */ + .Usb2PhyPort[0] = { + .compdstune = 5, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 1, + .txpreemppulsetune = 0, + .txrisetune = 1, + .txvreftune = 9, + .txhsxvtune = 3, + .txrestune = 1, + }, + /* Left USB A0 Port or WWAN */ + .Usb2PhyPort[1] = { + .compdstune = 5, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 1, + .txpreemppulsetune = 0, + .txrisetune = 1, + .txvreftune = 9, + .txhsxvtune = 3, + .txrestune = 1, + }, + /* User facing camera */ + .Usb2PhyPort[2] = { + .compdstune = 1, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 2, + .txpreemppulsetune = 0, + .txrisetune = 2, + .txvreftune = 3, + .txhsxvtune = 3, + .txrestune = 2, + }, + /* World facing camera */ + .Usb2PhyPort[3] = { + .compdstune = 1, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 2, + .txpreemppulsetune = 0, + .txrisetune = 2, + .txvreftune = 3, + .txhsxvtune = 3, + .txrestune = 2, + }, + /* Right USB C1 Port */ + .Usb2PhyPort[4] = { + .compdstune = 6, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 1, + .txpreemppulsetune = 0, + .txrisetune = 1, + .txvreftune = 0xe, + .txhsxvtune = 3, + .txrestune = 1, + }, + /* Right USB A1 Port */ + .Usb2PhyPort[5] = { + .compdstune = 5, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 1, + .txpreemppulsetune = 0, + .txrisetune = 1, + .txvreftune = 9, + .txhsxvtune = 3, + .txrestune = 1, + }, + /* WiFi / Bluetooth */ + .Usb2PhyPort[6] = { + .compdstune = 1, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 2, + .txpreemppulsetune = 0, + .txrisetune = 2, + .txvreftune = 3, + .txhsxvtune = 3, + .txrestune = 2, + }, + /* Smart Card */ + .Usb2PhyPort[7] = { + .compdstune = 1, + .sqrxtune = 3, + .txfslstune = 3, + .txpreempamptune = 2, + .txpreemppulsetune = 0, + .txrisetune = 2, + .txvreftune = 3, + .txhsxvtune = 3, + .txrestune = 2, + }, + /* Left USB C0 Port */ + .Usb3PhyPort[0] = { + .tx_term_ctrl=2, + .rx_term_ctrl=2, + .tx_vboost_lvl_en=1, + .tx_vboost_lvl=5, + }, + /* Left USB A0 Port or WWAN */ + .Usb3PhyPort[1] = { + .tx_term_ctrl=2, + .rx_term_ctrl=2, + .tx_vboost_lvl_en=1, + .tx_vboost_lvl=5, + }, + /* Right USB C1 Port */ + .Usb3PhyPort[2] = { + .tx_term_ctrl=2, + .rx_term_ctrl=2, + .tx_vboost_lvl_en=1, + .tx_vboost_lvl=5, + }, + /* Right USB A1 Port */ + .Usb3PhyPort[3] = { + .tx_term_ctrl=2, + .rx_term_ctrl=2, + .tx_vboost_lvl_en=1, + .tx_vboost_lvl=5, + }, + .ComboPhyStaticConfig[0] = 0, + .ComboPhyStaticConfig[1] = 0, + .BatteryChargerEnable = 0, + .PhyP3CpmP4Support = 0, + }" + device domain 0 on device ref gpp_bridge_2 on # Required so the NVMe gets placed into D3 when entering S0i3. -- To view, visit https://review.coreboot.org/c/coreboot/+/60089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If5a6563e93bfa6beb529a5593fcc9124ce62d77f Gerrit-Change-Number: 60089 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/corsola: move USB3 HUB reset funtion to bootblock
by Rex-BC Chen (Code Review) 14 Dec '21

14 Dec '21

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60088 ) Change subject: mb/google/corsola: move USB3 HUB reset funtion to bootblock ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60088 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I92feb2316302fda32478b24c014bcd380d0ac55d Gerrit-Change-Number: 60088 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 14 Dec 2021 02:10:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021