coreboot-gerrit December 2021

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Change in coreboot[master]: mb/google/glados: Move selects from Kconfig.name to Kconfig
by Tim Wawrzynczak (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Felix Singer. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60060 ) Change subject: mb/google/glados: Move selects from Kconfig.name to Kconfig ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Patchset: PS3: > > Is there a treewide switch to Kconfig / Kconfig.name? […] Might take me some getting used to, but it just makes sense to keep all of the config options in one file 👍 -- To view, visit https://review.coreboot.org/c/coreboot/+/60060 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifccf2b3521d84f6a678872bbccf9bf390c25ce37 Gerrit-Change-Number: 60060 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Comment-Date: Wed, 15 Dec 2021 19:02:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/madoo: Generate new SPD ID for new memory parts
by 9elements QA (Code Review) 15 Dec '21

15 Dec '21

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59991 ) Change subject: mb/google/dedede/var/madoo: Generate new SPD ID for new memory parts ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 7 / 1 / 8 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/84762 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/84761 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/84760 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/84759 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/84758 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/84757 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/84756 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/84755 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/59991 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b2f447a610a0a857e819ede257ac89cfd817018 Gerrit-Change-Number: 59991 Gerrit-PatchSet: 3 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 19:00:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/hatch/var/scout: improve USB2 port 4 strengh
by Tim Wawrzynczak (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Rehan Ghori, Kenneth Chan. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60131 ) Change subject: mb/google/hatch/var/scout: improve USB2 port 4 strengh ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/hatch/variants/scout/overridetree.cb: https://review.coreboot.org/c/coreboot/+/60131/comment/c67795cd_2fda031c PS1, Line 50: ,, this is causing a compilation failure -- To view, visit https://review.coreboot.org/c/coreboot/+/60131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8163b2be6c9094eaf08efc0325cf211235556dc8 Gerrit-Change-Number: 60131 Gerrit-PatchSet: 1 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Joe Tessler <jrt(a)google.com> Gerrit-Reviewer: Rehan Ghori <rehang(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rehan Ghori <rehang(a)google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 18:10:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Enable PSP_S0I3_RESUME_VERSTAGE
by Raul Rangel (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Rob Barnes, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60139 ) Change subject: mb/google/guybrush: Enable PSP_S0I3_RESUME_VERSTAGE ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d64fe92ffc67a421be6d5e013e636332ce86dd5 Gerrit-Change-Number: 60139 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 17:42:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Enable PSP_S0I3_RESUME_VERSTAGE
by Rob Barnes (Code Review) 15 Dec '21

15 Dec '21

Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60139 ) Change subject: mb/google/guybrush: Enable PSP_S0I3_RESUME_VERSTAGE ...................................................................... mb/google/guybrush: Enable PSP_S0I3_RESUME_VERSTAGE Enable PSP_S0I3_RESUME_VERSTAGE for all guybrush based boards. This will cause verstage to run during s0i3 resume. The TPM will be reinitialized in verstage during s0i3 resume BUG=b:200578885 BRANCH=None TEST=TPM initialized after s0i3 Change-Id: I9d64fe92ffc67a421be6d5e013e636332ce86dd5 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/guybrush/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/60139/1 diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig index 7d9cd3d..a26e14d 100644 --- a/src/mainboard/google/guybrush/Kconfig +++ b/src/mainboard/google/guybrush/Kconfig @@ -39,6 +39,7 @@ select PCIEXP_COMMON_CLOCK select PCIEXP_L1_SUB_STATE select PSP_DISABLE_POSTCODES + select PSP_S0I3_RESUME_VERSTAGE select SOC_AMD_CEZANNE select SOC_AMD_COMMON_BLOCK_GRAPHICS_ATIF select SOC_AMD_COMMON_BLOCK_USE_ESPI -- To view, visit https://review.coreboot.org/c/coreboot/+/60139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d64fe92ffc67a421be6d5e013e636332ce86dd5 Gerrit-Change-Number: 60139 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya/variants/brask: Disable autonomous GPIO power management
by Paul Menzel (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Nick Vaccaro, Zhuohao Lee. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60100 ) Change subject: mb/google/brya/variants/brask: Disable autonomous GPIO power management ...................................................................... Patch Set 2: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60100/comment/c179294c_e64b0162 PS2, Line 9: found that experienced? https://review.coreboot.org/c/coreboot/+/60100/comment/aec713c7_b3a53381 PS2, Line 10: cr50 : firmware to the 0.6.70. Was this firmware supposed to fix it? https://review.coreboot.org/c/coreboot/+/60100/comment/d79aec6f_a5dc8888 PS2, Line 12: So, we submitted : this patch to disable the gpio power management. Please describe the problem, and why this fix. Also shorter: Disable the GPIO power management to fix the issue. File src/mainboard/google/brya/variants/brask/overridetree.cb: https://review.coreboot.org/c/coreboot/+/60100/comment/c69f3657_1c28cdcb PS2, Line 2: disabled disables -- To view, visit https://review.coreboot.org/c/coreboot/+/60100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f18fea5bc28493107c6d4951805de640a0b8ae5 Gerrit-Change-Number: 60100 Gerrit-PatchSet: 2 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Wed, 15 Dec 2021 17:12:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/hatch/var/scout: improve USB2 port 4 strengh
by Paul Menzel (Code Review) 15 Dec '21

15 Dec '21

Attention is currently required from: Tim Wawrzynczak, Rehan Ghori, Kenneth Chan. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60131 ) Change subject: mb/google/hatch/var/scout: improve USB2 port 4 strengh ...................................................................... Patch Set 1: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60131/comment/b1e6afc9_fd31ee57 PS1, Line 7: strengh strength https://review.coreboot.org/c/coreboot/+/60131/comment/8545ebe3_42217d0f PS1, Line 8: What is the problem? What devices do not work? https://review.coreboot.org/c/coreboot/+/60131/comment/85fe02fc_c2e1765a PS1, Line 9: to 15mv From what value? (What was it before?) Why 15 mV? How did you determine that? https://review.coreboot.org/c/coreboot/+/60131/comment/cdfaba17_585ff92e PS1, Line 9: mv mV -- To view, visit https://review.coreboot.org/c/coreboot/+/60131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8163b2be6c9094eaf08efc0325cf211235556dc8 Gerrit-Change-Number: 60131 Gerrit-PatchSet: 1 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Joe Tessler <jrt(a)google.com> Gerrit-Reviewer: Rehan Ghori <rehang(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rehan Ghori <rehang(a)google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 15 Dec 2021 17:09:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: tests/lib/lzma-test: Fix uninitialized array error
by Felix Held (Code Review) 15 Dec '21

15 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60112 ) Change subject: tests/lib/lzma-test: Fix uninitialized array error ...................................................................... tests/lib/lzma-test: Fix uninitialized array error Change-Id: I5b10eef3dd82068f97d4d875f3da813a5aca07a7 Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Reported-by: Paul Fagerburg <pfagerburg(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60112 Reviewed-by: Paul Fagerburg <pfagerburg(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M tests/lib/lzma-test.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Fagerburg: Looks good to me, approved diff --git a/tests/lib/lzma-test.c b/tests/lib/lzma-test.c index 3918890..8ae9ced 100644 --- a/tests/lib/lzma-test.c +++ b/tests/lib/lzma-test.c @@ -130,7 +130,7 @@ static void test_ulzman_input_too_small(void **state) { - uint8_t in_buf[32]; + uint8_t in_buf[32] = {0}; uint8_t out_buf[32]; assert_int_equal(0, ulzman(in_buf, LZMA_PROPERTIES_SIZE, out_buf, sizeof(out_buf))); -- To view, visit https://review.coreboot.org/c/coreboot/+/60112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b10eef3dd82068f97d4d875f3da813a5aca07a7 Gerrit-Change-Number: 60112 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/guybrush: Set TPM to to be kernel power managed.
by Felix Held (Code Review) 15 Dec '21

15 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60081 ) Change subject: mb/google/guybrush: Set TPM to to be kernel power managed. ...................................................................... mb/google/guybrush: Set TPM to to be kernel power managed. Set TPM power_managed_mode to TPM_KERNEL_POWER_MANAGED. This will cause the TPM kernel driver to send a shutdown command before s0i3 entry. This change depends on S0i3 verstage running and reinitializing the TPM. BUG=b:200578885 BRANCH=None TEST=TPM shutdown sent during s0i3 entry on guybrush Change-Id: I206022cc2a29690186206966c5d45bd55c303248 Signed-off-by: Rob Barnes <robbarnes(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60081 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index 7fb3c7e..ac2856e 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb @@ -342,6 +342,8 @@ register "hid" = ""GOOG0005"" register "desc" = ""Cr50 TPM"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_85)" + register "power_managed_mode" = "CONFIG(PSP_S0I3_RESUME_VERSTAGE) ? + TPM_KERNEL_POWER_MANAGED : TPM_DEFAULT_POWER_MANAGED" device i2c 50 alias cr50 on end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/60081 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I206022cc2a29690186206966c5d45bd55c303248 Gerrit-Change-Number: 60081 Gerrit-PatchSet: 5 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/dedede/var/madoo: Generate new SPD ID for new memory parts
by Felix Held (Code Review) 15 Dec '21

15 Dec '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59991 ) Change subject: mb/google/dedede/var/madoo: Generate new SPD ID for new memory parts ...................................................................... mb/google/dedede/var/madoo: Generate new SPD ID for new memory parts Add new memory parts in the mem_list_variant.txt and generate the SPD ID for the parts. The memory parts being added are: 1. Micron MT53E512M32D1NP-046 WT:B 2. Samsung K4U6E3S4AB-MGCL 3. Hynix H54G46CYRBX267 BUG=b:209889645 BRANCH=dedede TEST=FW_NAME=madoo emerge-dedede coreboot chromeos-bootimage Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Change-Id: I0b2f447a610a0a857e819ede257ac89cfd817018 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59991 Reviewed-by: Shou-Chieh Hsu <shouchieh(a)google.com> Reviewed-by: Henry Sun <henrysun(a)google.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc M src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt 3 files changed, 7 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Henry Sun: Looks good to me, but someone else must approve Shou-Chieh Hsu: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc b/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc index 36d713a..05cb4ed 100644 --- a/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc @@ -4,4 +4,4 @@ # util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/madoo/memory src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = H9HCNNNBKMMLXR-NEE, MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = H9HCNNNBKMMLXR-NEE, MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B, K4U6E3S4AB-MGCL, H54G46CYRBX267 diff --git a/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt index e7b8668..14cf74e 100644 --- a/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt @@ -7,3 +7,6 @@ H9HCNNNBKMMLXR-NEE 0 (0000) MT53E512M32D2NP-046 WT:E 0 (0000) K4U6E3S4AA-MGCR 0 (0000) +MT53E512M32D1NP-046 WT:B 0 (0000) +K4U6E3S4AB-MGCL 0 (0000) +H54G46CYRBX267 0 (0000) diff --git a/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt index 2b339b6..17188e3 100644 --- a/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt @@ -1,3 +1,6 @@ H9HCNNNBKMMLXR-NEE MT53E512M32D2NP-046 WT:E K4U6E3S4AA-MGCR +MT53E512M32D1NP-046 WT:B +K4U6E3S4AB-MGCL +H54G46CYRBX267 -- To view, visit https://review.coreboot.org/c/coreboot/+/59991 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b2f447a610a0a857e819ede257ac89cfd817018 Gerrit-Change-Number: 59991 Gerrit-PatchSet: 3 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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coreboot-gerrit December 2021