coreboot-gerrit December 2021

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Change in coreboot[master]: soc/intel/jsl: Add CdClock config
by Paul Menzel (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Jamie Chen, Simon Yang, Kane Chen, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60009 ) Change subject: soc/intel/jsl: Add CdClock config ...................................................................... Patch Set 8: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60009/comment/488e5b2c_b66b0fee PS7, Line 9: Jasperlake Jasper Lake. https://review.coreboot.org/c/coreboot/+/60009/comment/0540350d_b86b0289 PS7, Line 10: Why set it to 0xff? -- To view, visit https://review.coreboot.org/c/coreboot/+/60009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I917c2f10b130b0cd54f60e2ba98eb971d5ec3c97 Gerrit-Change-Number: 60009 Gerrit-PatchSet: 8 Gerrit-Owner: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 17 Dec 2021 09:36:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/crossgcc: Update binutils to 2.37
by Iru Cai (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Patrick Georgi. Iru Cai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54049 ) Change subject: util/crossgcc: Update binutils to 2.37 ...................................................................... Patch Set 14: (1 comment) Patchset: PS14: > If you run `make V=1` it should show you the command line that results in this […] This is already fixed in https://review.coreboot.org/c/coreboot/+/56490 -- To view, visit https://review.coreboot.org/c/coreboot/+/54049 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia68d4d9f836ad23fb8f6a7203a78b4ea40c7c43b Gerrit-Change-Number: 54049 Gerrit-PatchSet: 14 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-CC: Iru Cai <mytbk920423(a)gmail.com> Gerrit-CC: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-CC: xin hua wang <xinhuawang0101(a)gmail.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Comment-Date: Fri, 17 Dec 2021 08:24:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: xin hua wang <xinhuawang0101(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Initialize display signals on user mode
by build bot (Jenkins) (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Henry Sun, Edward Doan, Karthik Ramasubramanian. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60190 ) Change subject: mb/google/dedede/var/bugzzy: Initialize display signals on user mode ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/dedede/variants/bugzzy/ramstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-135743): https://review.coreboot.org/c/coreboot/+/60190/comment/f96e4696_cfc5d6df PS1, Line 16: /* trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/60190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa4d16deb932f43ae1ab33ff5b4e74120ab670db Gerrit-Change-Number: 60190 Gerrit-PatchSet: 1 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Edward Doan <edoan(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 17 Dec 2021 08:23:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/acpimmio/print_reset_status: add missing status bit
by Jason Glenesk (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Marshall Dawson, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60184 ) Change subject: soc/amd/common/block/acpimmio/print_reset_status: add missing status bit ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60184 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida8b13fe62b16c18fc9924520b83220e73eca624 Gerrit-Change-Number: 60184 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 17 Dec 2021 07:57:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/fch: disable 48MHz output in S0i3
by Jason Glenesk (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Raul Rangel, Marshall Dawson, Paul Menzel, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60125 ) Change subject: soc/amd/cezanne/fch: disable 48MHz output in S0i3 ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If445f5825dc7b795c95d73c061156cc485421ada Gerrit-Change-Number: 60125 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 17 Dec 2021 07:56:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne/acpi: Add support for RTC workaround
by Jason Glenesk (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Raul Rangel, Marshall Dawson, Karthik Ramasubramanian, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60172 ) Change subject: soc/amd/cezanne/acpi: Add support for RTC workaround ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60172 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f14d14df5d30d48d244416f2ec8c10ac5c8040e Gerrit-Change-Number: 60172 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mario Limonciello <mario.limonciello(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 17 Dec 2021 07:54:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/zork/var/vilboz: Add new memory K4AAG165WB-BCWE
by Frank Wu (Code Review) 17 Dec '21

17 Dec '21

Frank Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60191 ) Change subject: mb/google/zork/var/vilboz: Add new memory K4AAG165WB-BCWE ...................................................................... mb/google/zork/var/vilboz: Add new memory K4AAG165WB-BCWE Add new ram_id:1100 for memory part K4AAG165WB-BCWE. BUG= TEST=Generate new spd file and build coreboot. Then boot from the DUT with new memory K4AAG165WB-BCWE Signed-off-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Change-Id: I4e409a5a5a3b3d1b0013d2c020eeb4c0aeec51ba --- M src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc M src/mainboard/google/zork/variants/vilboz/spd/dram_id.generated.txt M src/mainboard/google/zork/variants/vilboz/spd/mem_parts_used.txt 3 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/60191/1 diff --git a/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc b/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc index 1e02efa..7853c15 100644 --- a/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc @@ -16,3 +16,4 @@ SPD_SOURCES += spd/ddr4/set-0/spd-9.hex # ID = 9(0b1001) Parts = H5ANAG6NCJR-XNC SPD_SOURCES += spd/ddr4/set-0/spd-1.hex # ID = 10(0b1010) Parts = MT40A512M16TB-062E:R SPD_SOURCES += spd/ddr4/set-0/spd-1.hex # ID = 11(0b1011) Parts = 4JQA-0622AD +SPD_SOURCES += spd/ddr4/set-0/spd-9.hex # ID = 12(0b1100) Parts = K4AAG165WB-BCWE diff --git a/src/mainboard/google/zork/variants/vilboz/spd/dram_id.generated.txt b/src/mainboard/google/zork/variants/vilboz/spd/dram_id.generated.txt index 73f315e..f3bd888 100644 --- a/src/mainboard/google/zork/variants/vilboz/spd/dram_id.generated.txt +++ b/src/mainboard/google/zork/variants/vilboz/spd/dram_id.generated.txt @@ -14,3 +14,4 @@ H5ANAG6NCJR-XNC 9 (1001) MT40A512M16TB-062E:R 10 (1010) 4JQA-0622AD 11 (1011) +K4AAG165WB-BCWE 12 (1100) diff --git a/src/mainboard/google/zork/variants/vilboz/spd/mem_parts_used.txt b/src/mainboard/google/zork/variants/vilboz/spd/mem_parts_used.txt index 1be55f7..9947953 100644 --- a/src/mainboard/google/zork/variants/vilboz/spd/mem_parts_used.txt +++ b/src/mainboard/google/zork/variants/vilboz/spd/mem_parts_used.txt @@ -17,3 +17,4 @@ H5ANAG6NCJR-XNC, 9 MT40A512M16TB-062E:R, 10 4JQA-0622AD, 11 +K4AAG165WB-BCWE, 12 -- To view, visit https://review.coreboot.org/c/coreboot/+/60191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e409a5a5a3b3d1b0013d2c020eeb4c0aeec51ba Gerrit-Change-Number: 60191 Gerrit-PatchSet: 1 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: commonlib: Add new TS for CSE firmware Sync
by Maulik V Vaghela (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Sridhar Siricilla, Subrata Banik. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59668 ) Change subject: commonlib: Add new TS for CSE firmware Sync ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59668 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ed82c5358eb94b5e7c91b9fd783c5e09189b77a Gerrit-Change-Number: 59668 Gerrit-PatchSet: 5 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Fri, 17 Dec 2021 07:29:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Initialize display signals on user mode
by SH Kim (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: Henry Sun, Edward Doan, Karthik Ramasubramanian. SH Kim has uploaded a new patch set (#3) to the change originally created by shkim. ( https://review.coreboot.org/c/coreboot/+/60190 ) Change subject: mb/google/dedede/var/bugzzy: Initialize display signals on user mode ...................................................................... mb/google/dedede/var/bugzzy: Initialize display signals on user mode Bugzzy uses panel-built-in touch screen, it needs to set panel power and reset signal to high for touch screen to work. On user mode, coreboot doesn't initialize graphics since there is no screen display before OS. So we would add a WA to initialize required signals on user mode. BUG=b:205496327 BRANCH=dedede TEST=Verified touch screen worked with test coreboot and new touch screen firmware Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> Change-Id: Iaa4d16deb932f43ae1ab33ff5b4e74120ab670db --- M src/mainboard/google/dedede/variants/bugzzy/Makefile.inc A src/mainboard/google/dedede/variants/bugzzy/ramstage.c 2 files changed, 81 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/60190/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa4d16deb932f43ae1ab33ff5b4e74120ab670db Gerrit-Change-Number: 60190 Gerrit-PatchSet: 3 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Edward Doan <edoan(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Initialize display signals on user mode
by SH Kim (Code Review) 17 Dec '21

17 Dec '21

Attention is currently required from: SH Kim. SH Kim has uploaded a new patch set (#2) to the change originally created by shkim. ( https://review.coreboot.org/c/coreboot/+/60190 ) Change subject: mb/google/dedede/var/bugzzy: Initialize display signals on user mode ...................................................................... mb/google/dedede/var/bugzzy: Initialize display signals on user mode Bugzzy uses panel-built-in touch screen, it needs to set panel power and reset signal to high for touch screen to work. On user mode, coreboot doesn't initialize graphics since there is no screen display before OS. So we would add a WA to initialize required signals on user mode. BUG=b:205496327 BRANCH=dedede TEST=built firmware and verified touch screen worked. Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> Change-Id: Iaa4d16deb932f43ae1ab33ff5b4e74120ab670db --- M src/mainboard/google/dedede/variants/bugzzy/Makefile.inc A src/mainboard/google/dedede/variants/bugzzy/ramstage.c 2 files changed, 81 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/60190/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa4d16deb932f43ae1ab33ff5b4e74120ab670db Gerrit-Change-Number: 60190 Gerrit-PatchSet: 2 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2021