coreboot-gerrit December 2021

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Change in coreboot[master]: soc/mediatek/mt8186: Add DRAM full calibration support
by build bot (Jenkins) (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60318 ) Change subject: soc/mediatek/mt8186: Add DRAM full calibration support ...................................................................... Patch Set 3: Verified-1 (19 comments) File src/soc/mediatek/mt8186/include/soc/dramc_soc.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/5582d40e_991077e9 PS3, Line 7: CHANNEL_A = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/034f9252_5bff7ff1 PS3, Line 8: CHANNEL_B, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/336dde0f_3f2d96c5 PS3, Line 9: CHANNEL_MAX, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/30838127_312cd5cc PS3, Line 13: RANK_0 = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/a1776f0a_023fcd65 PS3, Line 14: RANK_1, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/35bd45bb_d85af5bf PS3, Line 15: RANK_MAX, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/9ebc0c58_ee9c372c PS3, Line 20: DRAM_DFS_SHUFFLE_1 = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/e1c10261_edd5a85c PS3, Line 21: DRAM_DFS_SHUFFLE_2, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/6979c0c8_01cfc07a PS3, Line 22: DRAM_DFS_SHUFFLE_3, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/b6028f57_798f4b68 PS3, Line 23: DRAM_DFS_SHUFFLE_4, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/a4c4bcca_f45c815e PS3, Line 24: DRAM_DFS_SHUFFLE_5, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/36385ddd_e045f372 PS3, Line 25: DRAM_DFS_SHUFFLE_6, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/c2a45f83_09139776 PS3, Line 26: DRAM_DFS_SHUFFLE_7, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/b84c9031_1aa6acb4 PS3, Line 27: DRAM_DFS_SHUFFLE_8, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/2090b697_ee240213 PS3, Line 28: DRAM_DFS_SHUFFLE_9, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/5ee5d522_7af2d005 PS3, Line 29: DRAM_DFS_SHUFFLE_10, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/0862d9b7_a181c505 PS3, Line 30: DRAM_DFS_SHUFFLE_MAX, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/ed9f49f6_6c6d34d1 PS3, Line 41: CBT_NORMAL_MODE = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136078): https://review.coreboot.org/c/coreboot/+/60318/comment/bed82e82_7a885545 PS3, Line 42: CBT_BYTE_MODE1, please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/60318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1a1e04da0cce9aaf86588a94c64d2242e7cb4b7 Gerrit-Change-Number: 60318 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:51:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add DRAM full calibration support
by Rex-BC Chen (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60318 ) Change subject: soc/mediatek/mt8186: Add DRAM full calibration support ...................................................................... Patch Set 4: (19 comments) File src/soc/mediatek/mt8186/include/soc/dramc_soc.h: https://review.coreboot.org/c/coreboot/+/60318/comment/81387496_3f04710f PS2, Line 7: CHANNEL_A = 0, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/cd598631_b1aba3c1 PS2, Line 8: CHANNEL_B, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/10889dbc_bd92d8cb PS2, Line 9: CHANNEL_MAX, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/d98da4bb_bfb1408e PS2, Line 13: RANK_0 = 0, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/0d3fab92_d147d9cb PS2, Line 14: RANK_1, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/e33c1ad7_c210743e PS2, Line 15: RANK_MAX, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/b826c30b_f43234f2 PS2, Line 20: DRAM_DFS_SHUFFLE_1 = 0, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/19a9d66d_a9364af1 PS2, Line 21: DRAM_DFS_SHUFFLE_2, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/4ede738d_761c9c63 PS2, Line 22: DRAM_DFS_SHUFFLE_3, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/1d5a737e_80f684c6 PS2, Line 23: DRAM_DFS_SHUFFLE_4, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/812eb0cb_d37fce34 PS2, Line 24: DRAM_DFS_SHUFFLE_5, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/5fd02559_2cb569fe PS2, Line 25: DRAM_DFS_SHUFFLE_6, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/56887494_a892b88a PS2, Line 26: DRAM_DFS_SHUFFLE_7, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/ec293511_128a8e53 PS2, Line 27: DRAM_DFS_SHUFFLE_8, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/8567092c_626434d2 PS2, Line 28: DRAM_DFS_SHUFFLE_9, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/a7ce3133_4734306c PS2, Line 29: DRAM_DFS_SHUFFLE_10, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/8323100f_82f5459c PS2, Line 30: DRAM_DFS_SHUFFLE_MAX, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/dee67d4b_6c451620 PS2, Line 41: CBT_NORMAL_MODE = 0, > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/60318/comment/6c91247d_18f8855d PS2, Line 42: CBT_BYTE_MODE1, > please, no spaces at the start of a line Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/60318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1a1e04da0cce9aaf86588a94c64d2242e7cb4b7 Gerrit-Change-Number: 60318 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:46:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add DRAM full calibration support
by Rex-BC Chen (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Ryan Chuang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60318 to look at the new patch set (#4). Change subject: soc/mediatek/mt8186: Add DRAM full calibration support ...................................................................... soc/mediatek/mt8186: Add DRAM full calibration support Initialize and calibrate DRAM in romstage. We remove emi.h because emi.h is defined in common/include/soc. TEST=DRAM full calibration pass. BUG=b:202871018 Signed-off-by: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Change-Id: Ie1a1e04da0cce9aaf86588a94c64d2242e7cb4b7 --- M src/mainboard/google/corsola/Makefile.inc M src/mainboard/google/corsola/romstage.c A src/mainboard/google/corsola/sdram_configs.c M src/soc/mediatek/mt8186/Kconfig M src/soc/mediatek/mt8186/Makefile.inc M src/soc/mediatek/mt8186/emi.c A src/soc/mediatek/mt8186/include/soc/dramc_param.h A src/soc/mediatek/mt8186/include/soc/dramc_soc.h D src/soc/mediatek/mt8186/include/soc/emi.h 9 files changed, 239 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/60318/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/60318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1a1e04da0cce9aaf86588a94c64d2242e7cb4b7 Gerrit-Change-Number: 60318 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8186: Add devapc basic drivers
by build bot (Jenkins) (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60317 ) Change subject: soc/mediatek/mt8186: Add devapc basic drivers ...................................................................... Patch Set 3: (9 comments) File src/soc/mediatek/mt8186/include/soc/devapc.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/cf456489_2aed11e1 PS3, Line 68: #define DAPC_PERM_ATTR_4(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/e3bcf115_865c98a7 PS3, Line 73: #define DAPC_PERM_ATTR_8(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/217087fb_e593b3ea PS3, Line 81: #define DAPC_PERM_ATTR_16(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/f0f391e5_d97b11cc PS3, Line 95: #define FORBIDDEN3 FORBIDDEN, FORBIDDEN, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/eddebbe7_f725b7c9 PS3, Line 96: #define FORBIDDEN4 FORBIDDEN3, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/ca65357a_ceb2b628 PS3, Line 97: #define FORBIDDEN5 FORBIDDEN4, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/c926d979_e0c7e63d PS3, Line 98: #define FORBIDDEN6 FORBIDDEN5, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/f98fbd31_18d2b6bb PS3, Line 99: #define FORBIDDEN7 FORBIDDEN6, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136077): https://review.coreboot.org/c/coreboot/+/60317/comment/fc643189_5cc55a32 PS3, Line 101: #define NO_PROTECTION4 NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/60317 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7 Gerrit-Change-Number: 60317 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:44:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add devapc basic drivers
by Rex-BC Chen (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60317 ) Change subject: soc/mediatek/mt8186: Add devapc basic drivers ...................................................................... Patch Set 3: (2 comments) File src/soc/mediatek/mt8186/devapc.c: https://review.coreboot.org/c/coreboot/+/60317/comment/f5ca177d_a07e8fc1 PS2, Line 23: DAPC_INFRA_AO_SYS0_ATTR("INFRA_AO_SLEEP_CONTROLER", > 'CONTROLER' may be misspelled - perhaps 'CONTROLLER'? Please fix. File src/soc/mediatek/mt8186/include/soc/devapc.h: https://review.coreboot.org/c/coreboot/+/60317/comment/84f95bc5_6d187214 PS2, Line 123: DEFINE_BIT(SCP_SSPM_SEC,21) > space required after that ',' (ctx:VxV) Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/60317 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7 Gerrit-Change-Number: 60317 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:42:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add devapc basic drivers
by Rex-BC Chen (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Hello Hung-Te Lin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60317 to look at the new patch set (#3). Change subject: soc/mediatek/mt8186: Add devapc basic drivers ...................................................................... soc/mediatek/mt8186: Add devapc basic drivers Add basic devapc (device access permission control) drivers. DAPC driver is used to set up bus fabric security and data protection among hardwares. DAPC driver groups the master hardwares into different domains and gives secure and non-secure property. The slave hardware can configure different access permissions for different domains via DAPC driver. 1. Initialize devapc. 2. Set master domain and secure side band. 3. Set default permission. BUG=b:202871018 TEST=build pass Signed-off-by: Runyang Chen <runyang.chen(a)mediatek.corp-partner.google.com> Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7 --- M src/soc/mediatek/mt8186/Makefile.inc A src/soc/mediatek/mt8186/devapc.c A src/soc/mediatek/mt8186/include/soc/devapc.h M src/soc/mediatek/mt8186/soc.c 4 files changed, 1,452 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/60317/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60317 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7 Gerrit-Change-Number: 60317 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/primus: Fix some GPIO programming
by Felix Singer (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Ariel Fang, Tim Wawrzynczak, Casper Chang. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60104 ) Change subject: mb/google/brya/var/primus: Fix some GPIO programming ...................................................................... Patch Set 17: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60104/comment/c7cb9ae8_7b655d88 PS17, Line 13:  This too https://review.coreboot.org/c/coreboot/+/60104/comment/77721fb7_d95450bd PS17, Line 14:  This https://review.coreboot.org/c/coreboot/+/60104/comment/35496343_4921742f PS17, Line 15:  This -- To view, visit https://review.coreboot.org/c/coreboot/+/60104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e269bc6fb6eda7b2de57e1a9c900864d3e86e98 Gerrit-Change-Number: 60104 Gerrit-PatchSet: 17 Gerrit-Owner: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:37:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add DRAM full calibration support
by build bot (Jenkins) (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60318 ) Change subject: soc/mediatek/mt8186: Add DRAM full calibration support ...................................................................... Patch Set 2: Verified-1 (19 comments) File src/soc/mediatek/mt8186/include/soc/dramc_soc.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/66bc6378_ab4e3f08 PS2, Line 7: CHANNEL_A = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/7b1c8337_48b3ccc6 PS2, Line 8: CHANNEL_B, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/3de040c6_be3fe8d2 PS2, Line 9: CHANNEL_MAX, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/f75d2aed_15d32f2b PS2, Line 13: RANK_0 = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/2d7322eb_f8b1e13b PS2, Line 14: RANK_1, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/e49060d8_c9756bd6 PS2, Line 15: RANK_MAX, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/429049df_7e06b291 PS2, Line 20: DRAM_DFS_SHUFFLE_1 = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/fe04becd_65a48461 PS2, Line 21: DRAM_DFS_SHUFFLE_2, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/69f47cec_4f184ec8 PS2, Line 22: DRAM_DFS_SHUFFLE_3, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/4fdff863_77590c16 PS2, Line 23: DRAM_DFS_SHUFFLE_4, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/5b288dd0_aed57608 PS2, Line 24: DRAM_DFS_SHUFFLE_5, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/75cd109f_fb7ebaf5 PS2, Line 25: DRAM_DFS_SHUFFLE_6, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/89610a7e_2f84e943 PS2, Line 26: DRAM_DFS_SHUFFLE_7, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/395fa9b4_6caa4109 PS2, Line 27: DRAM_DFS_SHUFFLE_8, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/83b2c048_30710862 PS2, Line 28: DRAM_DFS_SHUFFLE_9, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/457d2437_05047f37 PS2, Line 29: DRAM_DFS_SHUFFLE_10, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/3717852f_a86e40a5 PS2, Line 30: DRAM_DFS_SHUFFLE_MAX, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/9e42f924_c612062e PS2, Line 41: CBT_NORMAL_MODE = 0, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136075): https://review.coreboot.org/c/coreboot/+/60318/comment/2d097dc0_e39ea927 PS2, Line 42: CBT_BYTE_MODE1, please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/60318 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1a1e04da0cce9aaf86588a94c64d2242e7cb4b7 Gerrit-Change-Number: 60318 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:36:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Add devapc basic drivers
by build bot (Jenkins) (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60317 ) Change subject: soc/mediatek/mt8186: Add devapc basic drivers ...................................................................... Patch Set 2: Verified-1 (11 comments) File src/soc/mediatek/mt8186/devapc.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/e23c7602_9024e628 PS2, Line 23: DAPC_INFRA_AO_SYS0_ATTR("INFRA_AO_SLEEP_CONTROLER", 'CONTROLER' may be misspelled - perhaps 'CONTROLLER'? File src/soc/mediatek/mt8186/include/soc/devapc.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/c3ebb7e2_4f11bf97 PS2, Line 66: #define DAPC_PERM_ATTR_4(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/cf614894_5d6c8fce PS2, Line 71: #define DAPC_PERM_ATTR_8(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/493c4778_3a6ac32b PS2, Line 79: #define DAPC_PERM_ATTR_16(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/cde07f87_71949bf6 PS2, Line 93: #define FORBIDDEN3 FORBIDDEN, FORBIDDEN, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/5e42f9e8_6a6c1975 PS2, Line 94: #define FORBIDDEN4 FORBIDDEN3, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/c19db11a_6431f264 PS2, Line 95: #define FORBIDDEN5 FORBIDDEN4, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/adf1af5a_1c9b0786 PS2, Line 96: #define FORBIDDEN6 FORBIDDEN5, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/bcf95a20_0674bc73 PS2, Line 97: #define FORBIDDEN7 FORBIDDEN6, FORBIDDEN Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/cf0732f7_bd843d89 PS2, Line 99: #define NO_PROTECTION4 NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136074): https://review.coreboot.org/c/coreboot/+/60317/comment/c4cfbba0_79f0d45b PS2, Line 123: DEFINE_BIT(SCP_SSPM_SEC,21) space required after that ',' (ctx:VxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/60317 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7 Gerrit-Change-Number: 60317 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:35:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/primus: Fix some GPIO programming
by Ariel Fang (Code Review) 23 Dec '21

23 Dec '21

Attention is currently required from: Felix Singer, Tim Wawrzynczak, Casper Chang. Ariel Fang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60104 ) Change subject: mb/google/brya/var/primus: Fix some GPIO programming ...................................................................... Patch Set 17: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60104/comment/d8b268b0_066fee92 PS14, Line 7: Fix > Add a space before that Done https://review.coreboot.org/c/coreboot/+/60104/comment/ac67c17f_b7bcd7cc PS14, Line 9: - > Remove dash Done https://review.coreboot.org/c/coreboot/+/60104/comment/d87f68c7_dad3b2e9 PS14, Line 12:  > Please only use ASCII characters. I would just remove these and leave it as it is. Done https://review.coreboot.org/c/coreboot/+/60104/comment/84d50e43_fee1ca29 PS14, Line 14: > Remove space Done File src/mainboard/google/brya/variants/primus4es/gpio.c: https://review.coreboot.org/c/coreboot/+/60104/comment/ee577226_7829ec03 PS14, Line 39: /* D3 : ISH_GP3 ==> M2_SSD_PLN_L */ : PAD_CFG_GPO(GPP_D3, 1, PLTRST), > Remove this one? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/60104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e269bc6fb6eda7b2de57e1a9c900864d3e86e98 Gerrit-Change-Number: 60104 Gerrit-PatchSet: 17 Gerrit-Owner: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Thu, 23 Dec 2021 04:35:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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coreboot-gerrit December 2021