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I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek/mt8186: Add header files to support DRAM calibration
......................................................................
soc/mediatek/mt8186: Add header files to support DRAM calibration
Remove emi.h because emi.h is defined in common/include/soc.
Add dramc_param.h and dramc_soc.h to prepare for implementation of
DRAM full calibration.
TEST=build pass.
BUG=b:202871018
Signed-off-by: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com>
Change-Id: If8662ed43088ea5aa1fe6cb5b2c4bda2338c4387
---
M src/soc/mediatek/mt8186/emi.c
A src/soc/mediatek/mt8186/include/soc/dramc_param.h
A src/soc/mediatek/mt8186/include/soc/dramc_soc.h
D src/soc/mediatek/mt8186/include/soc/emi.h
4 files changed, 209 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/60385/3
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: soc/mediatek/mt8186: Add devapc basic drivers
......................................................................
soc/mediatek/mt8186: Add devapc basic drivers
Add basic devapc (device access permission control) drivers.
DAPC driver is used to set up bus fabric security and data protection
among hardwares. DAPC driver groups the master hardwares into different
domains and gives secure and non-secure property. The slave hardware can
configure different access permissions for different domains via DAPC
driver.
1. Initialize devapc.
2. Set master domain and secure side band.
3. Set default permission.
BUG=b:202871018
TEST=build pass
Signed-off-by: Runyang Chen <runyang.chen(a)mediatek.corp-partner.google.com>
Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7
---
M src/soc/mediatek/mt8186/Makefile.inc
A src/soc/mediatek/mt8186/devapc.c
A src/soc/mediatek/mt8186/include/soc/devapc.h
M src/soc/mediatek/mt8186/soc.c
4 files changed, 1,421 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/60317/7
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Change subject: soc/mediatek/mt8186: Add DRAM full calibration support
......................................................................
Patch Set 10:
(1 comment)
Patchset:
PS10:
> Without fast-k support, what will happen with this patch? On the second boot (where parameters have […]
yes, we will always run full-k.
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Change subject: soc/mediatek: Prevent passing NULL MIPI commands
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60392/comment/c0bd093d_be5b636d
PS1, Line 9: (before CB:56965)
> Please also add the git commit hash (and commit message summary), as that is what git operates with.
Done
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Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60392
to look at the new patch set (#2).
Change subject: soc/mediatek: Prevent passing NULL MIPI commands
......................................................................
soc/mediatek: Prevent passing NULL MIPI commands
Previously (before CB:56965 [1]) mtk_dsi_send_init_command() would
ignore NULL initialization commands passed to it. However, in the
current code mipi_panel_parse_init_commands() doesn't check that (see
CB:57150 [2]), so we should check it on the caller side from
mtk_dsi_init().
[1] b2a1480191 device: Move MIPI panel library from
mainboard/google/kukui into common
[2] 4757a7ea33 mipi: Make panel init callback work directly on DSI
transaction types
BUG=b:202871018, b:209930699
TEST=emerge-corsola coreboot
BRANCH=none
Change-Id: I8196e3b135da273325e2e121523abb7fb230a49c
Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org>
---
M src/soc/mediatek/common/dsi.c
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/60392/2
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Change subject: mb/google/corsola: Add DRAM full calibration support
......................................................................
Patch Set 2: Code-Review+2
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Change subject: soc/mediatek/mt8186: Add header files to support DRAM calibration
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
PS2:
IMO CB:60318 could be merged into this patch.
File src/soc/mediatek/mt8186/include/soc/dramc_param.h:
https://review.coreboot.org/c/coreboot/+/60385/comment/65fa70ec_03d4f225
PS2, Line 59: struct dramc_param_header {
> I think we can upstream this version first, which is used for DRAM full calibration. […]
Okay, but please add the 'config' field here first. Otherwise there will be incompatible changes.
https://review.coreboot.org/c/coreboot/+/60385/comment/d110b417_54bb220e
PS2, Line 149: int validate_dramc_param(const void *blob);
: int is_valid_dramc_param(const void *blob);
These 2 don't exist in common/dramc_param.c, and they are not called either.
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Change subject: soc/mediatek/mt8186: Add DRAM full calibration support
......................................................................
Patch Set 10:
(1 comment)
Patchset:
PS10:
Without fast-k support, what will happen with this patch? On the second boot (where parameters have been saved to flash), because mt_set_emi() isn't implemented, mt_mem_test() will always fail, and we will fall back to running full-k again. Is that right?
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Change subject: mb/google/brya/var/vell: Add AMP driver setting
......................................................................
Patch Set 3: Verified+1
(5 comments)
File src/drivers/i2c/cs35l53/cs35l53.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136293):
https://review.coreboot.org/c/coreboot/+/60331/comment/d6ae121e_60219003
PS3, Line 70: if ((config->boost_peak_milliamp > 4500) ||
that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136293):
https://review.coreboot.org/c/coreboot/+/60331/comment/3b67602f_0fba76ab
PS3, Line 83: acpi_dp_add_integer(dsd, "cirrus,gpio1-polarity-invert", config->gpio1_polarity_invert ? 1 : 0);
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136293):
https://review.coreboot.org/c/coreboot/+/60331/comment/f2b343c4_34a92300
PS3, Line 84: acpi_dp_add_integer(dsd, "cirrus,gpio1-output-enable", config->gpio1_output_enable ? 1 : 0);
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136293):
https://review.coreboot.org/c/coreboot/+/60331/comment/45723b02_32c96f5f
PS3, Line 86: acpi_dp_add_integer(dsd, "cirrus,gpio2-polarity-invert", config->gpio2_polarity_invert ? 1 : 0);
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136293):
https://review.coreboot.org/c/coreboot/+/60331/comment/a679ad6a_a691db45
PS3, Line 87: acpi_dp_add_integer(dsd, "cirrus,gpio2-output-enable", config->gpio2_output_enable ? 1 : 0);
line over 96 characters
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