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Change in coreboot[master]: src/sb: Remove unused <string.h>
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Patrick Rudolph. HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60554 ) Change subject: src/sb: Remove unused <string.h> ...................................................................... src/sb: Remove unused <string.h> Change-Id: Idc0cd9d6865cd9c1b95e6c838795cce9dbc643a3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/intel/bd82x6x/early_me.c M src/southbridge/intel/bd82x6x/early_me_mrc.c M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_smm.c M src/southbridge/intel/common/acpi_pirq_gen.c M src/southbridge/intel/lynxpoint/early_me.c 6 files changed, 2 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/60554/1 diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c index a47991c..34e0c99 100644 --- a/src/southbridge/intel/bd82x6x/early_me.c +++ b/src/southbridge/intel/bd82x6x/early_me.c @@ -8,7 +8,6 @@ #include <device/pci_def.h> #include <halt.h> #include <southbridge/intel/common/me.h> -#include <string.h> #include <timestamp.h> #include "me.h" #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_me_mrc.c b/src/southbridge/intel/bd82x6x/early_me_mrc.c index 9d46897..2582abb 100644 --- a/src/southbridge/intel/bd82x6x/early_me_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_me_mrc.c @@ -7,7 +7,7 @@ #include <device/pci_def.h> #include <halt.h> #include <southbridge/intel/common/me.h> -#include <string.h> + #include "me.h" #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 0148905..0e932a3 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci_ids.h> #include <device/pci_def.h> -#include <string.h> #include <delay.h> #include <elog.h> #include <halt.h> diff --git a/src/southbridge/intel/bd82x6x/me_smm.c b/src/southbridge/intel/bd82x6x/me_smm.c index e1eb900..c7a7f45 100644 --- a/src/southbridge/intel/bd82x6x/me_smm.c +++ b/src/southbridge/intel/bd82x6x/me_smm.c @@ -6,7 +6,6 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <stdint.h> -#include <string.h> #include "me.h" #include "pch.h" diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c index 102bcb1..1dadc8e 100644 --- a/src/southbridge/intel/common/acpi_pirq_gen.c +++ b/src/southbridge/intel/common/acpi_pirq_gen.c @@ -4,7 +4,6 @@ #include <acpi/acpigen_pci.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <string.h> #include "acpi_pirq_gen.h" diff --git a/src/southbridge/intel/lynxpoint/early_me.c b/src/southbridge/intel/lynxpoint/early_me.c index 9f47740..6c73c33 100644 --- a/src/southbridge/intel/lynxpoint/early_me.c +++ b/src/southbridge/intel/lynxpoint/early_me.c @@ -5,7 +5,7 @@ #include <console/console.h> #include <delay.h> #include <halt.h> -#include <string.h> + #include "me.h" #include "pch.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/60554 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc0cd9d6865cd9c1b95e6c838795cce9dbc643a3 Gerrit-Change-Number: 60554 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/intel: Remove unused <string.h>
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60553 ) Change subject: soc/intel: Remove unused <string.h> ...................................................................... soc/intel: Remove unused <string.h> Change-Id: Iae90ff482f534d8de2a519619c20a019d054e700 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/alderlake/acpi.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/common/block/irq/irq.c M src/soc/intel/elkhartlake/acpi.c M src/soc/intel/elkhartlake/fsp_params.c M src/soc/intel/elkhartlake/romstage/fsp_params.c M src/soc/intel/icelake/acpi.c M src/soc/intel/jasperlake/acpi.c M src/soc/intel/jasperlake/romstage/fsp_params.c M src/soc/intel/tigerlake/acpi.c 10 files changed, 0 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/60553/1 diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index ab25646..1595534 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -18,7 +18,6 @@ #include <soc/pm.h> #include <soc/soc_chip.h> #include <soc/systemagent.h> -#include <string.h> #include <types.h> /* diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index fa84ea8..d5a0a17 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -17,7 +17,6 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/systemagent.h> -#include <string.h> #include "chip.h" diff --git a/src/soc/intel/common/block/irq/irq.c b/src/soc/intel/common/block/irq/irq.c index 00aff62..aa73e2e 100644 --- a/src/soc/intel/common/block/irq/irq.c +++ b/src/soc/intel/common/block/irq/irq.c @@ -11,7 +11,6 @@ #include <soc/pci_devs.h> #include <southbridge/intel/common/acpi_pirq_gen.h> #include <stdlib.h> -#include <string.h> #include <types.h> #define MIN_SHARED_IRQ 16 diff --git a/src/soc/intel/elkhartlake/acpi.c b/src/soc/intel/elkhartlake/acpi.c index 44387ea..59a9adb 100644 --- a/src/soc/intel/elkhartlake/acpi.c +++ b/src/soc/intel/elkhartlake/acpi.c @@ -18,7 +18,6 @@ #include <soc/pm.h> #include <soc/soc_chip.h> #include <soc/systemagent.h> -#include <string.h> /* * List of supported C-states in this processor. diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index f30bb1e..ff7222d 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -14,7 +14,6 @@ #include <soc/pci_devs.h> #include <soc/ramstage.h> #include <soc/soc_chip.h> -#include <string.h> #include <types.h> /* SATA DEVSLP idle timeout default values */ diff --git a/src/soc/intel/elkhartlake/romstage/fsp_params.c b/src/soc/intel/elkhartlake/romstage/fsp_params.c index ecb6304..402b134 100644 --- a/src/soc/intel/elkhartlake/romstage/fsp_params.c +++ b/src/soc/intel/elkhartlake/romstage/fsp_params.c @@ -9,7 +9,6 @@ #include <soc/pci_devs.h> #include <soc/romstage.h> #include <soc/soc_chip.h> -#include <string.h> static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_elkhartlake_config *config) diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index d11f3ca..26c5aba 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -15,7 +15,6 @@ #include <soc/pm.h> #include <soc/soc_chip.h> #include <soc/systemagent.h> -#include <string.h> /* * List of supported C-states in this processor. diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c index ad6a79c..a877e1a 100644 --- a/src/soc/intel/jasperlake/acpi.c +++ b/src/soc/intel/jasperlake/acpi.c @@ -18,7 +18,6 @@ #include <soc/pm.h> #include <soc/soc_chip.h> #include <soc/systemagent.h> -#include <string.h> /* * List of supported C-states in this processor. diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c index fd59e4e..43a8c70 100644 --- a/src/soc/intel/jasperlake/romstage/fsp_params.c +++ b/src/soc/intel/jasperlake/romstage/fsp_params.c @@ -9,7 +9,6 @@ #include <soc/pci_devs.h> #include <soc/romstage.h> #include <soc/soc_chip.h> -#include <string.h> static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_jasperlake_config *config) diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c index 36fb679..6314d1c 100644 --- a/src/soc/intel/tigerlake/acpi.c +++ b/src/soc/intel/tigerlake/acpi.c @@ -18,7 +18,6 @@ #include <soc/pm.h> #include <soc/soc_chip.h> #include <soc/systemagent.h> -#include <string.h> /* * List of supported C-states in this processor. -- To view, visit https://review.coreboot.org/c/coreboot/+/60553 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae90ff482f534d8de2a519619c20a019d054e700 Gerrit-Change-Number: 60553 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/drivers: Remove unused <string.h>
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Patrick Rudolph. HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60552 ) Change subject: src/drivers: Remove unused <string.h> ...................................................................... src/drivers: Remove unused <string.h> Change-Id: I2a6c5b67af1d2544159e92d4b8c06cc1f5504bd2 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/drivers/acpi/thermal_zone/thermal_zone.c M src/drivers/amd/i2s_machine_dev/i2s_machine_dev.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/i2c/generic/generic.c M src/drivers/i2c/gpiomux/bus/bus.c M src/drivers/i2c/gpiomux/mux/mux.c M src/drivers/i2c/hid/hid.c M src/drivers/i2c/sx9310/sx9310.c M src/drivers/i2c/sx9324/sx9324.c M src/drivers/intel/gma/acpi.c M src/drivers/intel/usb4/retimer/retimer.c M src/drivers/spi/acpi/acpi.c M src/drivers/uart/acpi/acpi.c M src/drivers/wifi/generic/smbios.c 14 files changed, 9 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/60552/1 diff --git a/src/drivers/acpi/thermal_zone/thermal_zone.c b/src/drivers/acpi/thermal_zone/thermal_zone.c index 1a52997..2afe1d4 100644 --- a/src/drivers/acpi/thermal_zone/thermal_zone.c +++ b/src/drivers/acpi/thermal_zone/thermal_zone.c @@ -6,7 +6,6 @@ #include <console/console.h> #include <device/device.h> #include <stdlib.h> -#include <string.h> #include "chip.h" diff --git a/src/drivers/amd/i2s_machine_dev/i2s_machine_dev.c b/src/drivers/amd/i2s_machine_dev/i2s_machine_dev.c index 7bd256d..0bb7b17 100644 --- a/src/drivers/amd/i2s_machine_dev/i2s_machine_dev.c +++ b/src/drivers/amd/i2s_machine_dev/i2s_machine_dev.c @@ -3,7 +3,6 @@ #include <acpi/acpi_device.h> #include <acpi/acpigen.h> #include <device/device.h> -#include <string.h> #include "chip.h" #include <console/console.h> diff --git a/src/drivers/generic/gpio_keys/gpio_keys.c b/src/drivers/generic/gpio_keys/gpio_keys.c index 75ce09f..fc53645 100644 --- a/src/drivers/generic/gpio_keys/gpio_keys.c +++ b/src/drivers/generic/gpio_keys/gpio_keys.c @@ -4,7 +4,6 @@ #include <acpi/acpigen.h> #include <device/device.h> #include <device/path.h> -#include <string.h> #include "chip.h" diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c index 656b9e6..ce0b87c 100644 --- a/src/drivers/i2c/generic/generic.c +++ b/src/drivers/i2c/generic/generic.c @@ -7,7 +7,7 @@ #include <device/device.h> #include <device/path.h> #include <gpio.h> -#include <string.h> + #include "chip.h" #if CONFIG(HAVE_ACPI_TABLES) diff --git a/src/drivers/i2c/gpiomux/bus/bus.c b/src/drivers/i2c/gpiomux/bus/bus.c index 0bcf36a..7530e54 100644 --- a/src/drivers/i2c/gpiomux/bus/bus.c +++ b/src/drivers/i2c/gpiomux/bus/bus.c @@ -6,7 +6,7 @@ #include <device/device.h> #include <device/path.h> #include <stdlib.h> -#include <string.h> + #include "chip.h" static const char *i2c_gpiomux_bus_acpi_name(const struct device *dev) diff --git a/src/drivers/i2c/gpiomux/mux/mux.c b/src/drivers/i2c/gpiomux/mux/mux.c index c1ae758..0730536 100644 --- a/src/drivers/i2c/gpiomux/mux/mux.c +++ b/src/drivers/i2c/gpiomux/mux/mux.c @@ -6,7 +6,7 @@ #include <device/device.h> #include <device/path.h> #include <stdlib.h> -#include <string.h> + #include "chip.h" static const char *i2c_gpiomux_mux_acpi_name(const struct device *dev) diff --git a/src/drivers/i2c/hid/hid.c b/src/drivers/i2c/hid/hid.c index 8705c1e..4007427 100644 --- a/src/drivers/i2c/hid/hid.c +++ b/src/drivers/i2c/hid/hid.c @@ -4,7 +4,6 @@ #include <acpi/acpi_device.h> #include <assert.h> #include <device/device.h> -#include <string.h> #include "chip.h" #include <gpio.h> #include <console/console.h> diff --git a/src/drivers/i2c/sx9310/sx9310.c b/src/drivers/i2c/sx9310/sx9310.c index d9e5a14..50dc281 100644 --- a/src/drivers/i2c/sx9310/sx9310.c +++ b/src/drivers/i2c/sx9310/sx9310.c @@ -6,7 +6,7 @@ #include <device/i2c_simple.h> #include <device/device.h> #include <device/path.h> -#include <string.h> + #include "chip.h" #define I2C_SX9310_ACPI_ID "STH9310" diff --git a/src/drivers/i2c/sx9324/sx9324.c b/src/drivers/i2c/sx9324/sx9324.c index 2ca9f36..77d4b9f 100644 --- a/src/drivers/i2c/sx9324/sx9324.c +++ b/src/drivers/i2c/sx9324/sx9324.c @@ -6,7 +6,7 @@ #include <device/i2c_simple.h> #include <device/device.h> #include <device/path.h> -#include <string.h> + #include "chip.h" #define I2C_SX9324_ACPI_ID "STH9324" diff --git a/src/drivers/intel/gma/acpi.c b/src/drivers/intel/gma/acpi.c index 4a89bb9..66209b1 100644 --- a/src/drivers/intel/gma/acpi.c +++ b/src/drivers/intel/gma/acpi.c @@ -2,7 +2,7 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <string.h> + #include "i915.h" void diff --git a/src/drivers/intel/usb4/retimer/retimer.c b/src/drivers/intel/usb4/retimer/retimer.c index 8a20ebe..b364ace 100644 --- a/src/drivers/intel/usb4/retimer/retimer.c +++ b/src/drivers/intel/usb4/retimer/retimer.c @@ -8,7 +8,7 @@ #include <device/path.h> #include <drivers/usb/acpi/chip.h> #include <gpio.h> -#include <string.h> + #include "chip.h" #include "retimer.h" diff --git a/src/drivers/spi/acpi/acpi.c b/src/drivers/spi/acpi/acpi.c index abebd88..5564611 100644 --- a/src/drivers/spi/acpi/acpi.c +++ b/src/drivers/spi/acpi/acpi.c @@ -7,7 +7,7 @@ #include <device/path.h> #include <device/spi.h> #include <spi-generic.h> -#include <string.h> + #include "chip.h" static int spi_acpi_get_bus(const struct device *dev) diff --git a/src/drivers/uart/acpi/acpi.c b/src/drivers/uart/acpi/acpi.c index 3081182..08928eb 100644 --- a/src/drivers/uart/acpi/acpi.c +++ b/src/drivers/uart/acpi/acpi.c @@ -4,7 +4,7 @@ #include <acpi/acpigen.h> #include <console/console.h> #include <device/path.h> -#include <string.h> + #include "chip.h" static bool uart_acpi_add_gpios_to_crs(struct drivers_uart_acpi_config *config) diff --git a/src/drivers/wifi/generic/smbios.c b/src/drivers/wifi/generic/smbios.c index db22de9..9c83df6 100644 --- a/src/drivers/wifi/generic/smbios.c +++ b/src/drivers/wifi/generic/smbios.c @@ -3,7 +3,6 @@ #include <device/device.h> #include <device/pci_ids.h> #include <smbios.h> -#include <string.h> #include "wifi_private.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/60552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a6c5b67af1d2544159e92d4b8c06cc1f5504bd2 Gerrit-Change-Number: 60552 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: src/mb: Remove unused <string.h>
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60551 ) Change subject: src/mb: Remove unused <string.h> ...................................................................... src/mb: Remove unused <string.h> Change-Id: I5f2710b2034882a24a041d99e37ec364193d85e6 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/emulation/qemu-i440fx/northbridge.c M src/mainboard/google/brya/variants/brya0/gpio.c M src/mainboard/google/brya/variants/brya4es/gpio.c M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/gru/sdram_configs.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/kukui/mainboard.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/poppy/variants/nautilus/mainboard.c M src/mainboard/google/poppy/variants/rammus/mainboard.c M src/mainboard/google/reef/mainboard.c M src/mainboard/google/slippy/variants/falco/romstage.c M src/mainboard/google/slippy/variants/leon/romstage.c M src/mainboard/google/slippy/variants/peppy/romstage.c M src/mainboard/google/slippy/variants/wolf/romstage.c M src/mainboard/google/zork/variants/dalboz/variant.c M src/mainboard/intel/adlrvp/mainboard.c M src/mainboard/intel/shadowmountain/romstage.c M src/mainboard/intel/tglrvp/mainboard.c M src/mainboard/kontron/986lcd-m/mainboard.c M src/mainboard/ocp/deltalake/uartio_vpd.c M src/mainboard/pcengines/apu1/mainboard.c M src/mainboard/pcengines/apu2/mainboard.c M src/mainboard/prodrive/hermes/smbios.c M src/mainboard/samsung/lumpy/mainboard.c 25 files changed, 0 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/60551/1 diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index e1765fa..06aa83a 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -10,7 +10,6 @@ #include <arch/ioapic.h> #include <device/device.h> #include <stdlib.h> -#include <string.h> #include <smbios.h> #include <types.h> #include "memory.h" diff --git a/src/mainboard/google/brya/variants/brya0/gpio.c b/src/mainboard/google/brya/variants/brya0/gpio.c index c3cfc0c..95151bc 100644 --- a/src/mainboard/google/brya/variants/brya0/gpio.c +++ b/src/mainboard/google/brya/variants/brya0/gpio.c @@ -4,7 +4,6 @@ #include <boardid.h> #include <console/console.h> #include <soc/gpio.h> -#include <string.h> static const struct pad_config board_id0_1_overrides[] = { /* B2 : VRALERT# ==> NC */ diff --git a/src/mainboard/google/brya/variants/brya4es/gpio.c b/src/mainboard/google/brya/variants/brya4es/gpio.c index c3cfc0c..95151bc 100644 --- a/src/mainboard/google/brya/variants/brya4es/gpio.c +++ b/src/mainboard/google/brya/variants/brya4es/gpio.c @@ -4,7 +4,6 @@ #include <boardid.h> #include <console/console.h> #include <soc/gpio.h> -#include <string.h> static const struct pad_config board_id0_1_overrides[] = { /* B2 : VRALERT# ==> NC */ diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index 13bc9b7..87f8796 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -15,7 +15,6 @@ #include <soc/gpio.h> #include <soc/pci_devs.h> #include <soc/nhlt.h> -#include <string.h> #include <timer.h> #include <variant/gpio.h> diff --git a/src/mainboard/google/gru/sdram_configs.c b/src/mainboard/google/gru/sdram_configs.c index 2aceb9f..1683f45 100644 --- a/src/mainboard/google/gru/sdram_configs.c +++ b/src/mainboard/google/gru/sdram_configs.c @@ -5,7 +5,6 @@ #include <console/console.h> #include <gpio.h> #include <soc/sdram.h> -#include <string.h> #include <types.h> static const char *sdram_configs[] = { diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index 2cd88b8..4c57037 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <string.h> #include <console/console.h> #include <device/device.h> #include <device/mmio.h> diff --git a/src/mainboard/google/kukui/mainboard.c b/src/mainboard/google/kukui/mainboard.c index 9357b67..ef0ba8f 100644 --- a/src/mainboard/google/kukui/mainboard.c +++ b/src/mainboard/google/kukui/mainboard.c @@ -19,7 +19,6 @@ #include <soc/mtcmos.h> #include <soc/spm.h> #include <soc/usb.h> -#include <string.h> #include "gpio.h" #include "panel.h" diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c index a29b9f3..8f3f9ef 100644 --- a/src/mainboard/google/poppy/variants/nami/mainboard.c +++ b/src/mainboard/google/poppy/variants/nami/mainboard.c @@ -13,7 +13,6 @@ #include <intelblocks/power_limit.h> #include <smbios.h> #include <soc/ramstage.h> -#include <string.h> #include <variant/sku.h> #define PL2_I7_SKU 44 diff --git a/src/mainboard/google/poppy/variants/nautilus/mainboard.c b/src/mainboard/google/poppy/variants/nautilus/mainboard.c index 7350fb0..b09a708 100644 --- a/src/mainboard/google/poppy/variants/nautilus/mainboard.c +++ b/src/mainboard/google/poppy/variants/nautilus/mainboard.c @@ -6,7 +6,6 @@ #include <device/device.h> #include <device/pci_ops.h> #include <smbios.h> -#include <string.h> #include <variant/sku.h> #define R_PCH_OC_WDT_CTL 0x54 diff --git a/src/mainboard/google/poppy/variants/rammus/mainboard.c b/src/mainboard/google/poppy/variants/rammus/mainboard.c index 9892dda..d2fdd93 100644 --- a/src/mainboard/google/poppy/variants/rammus/mainboard.c +++ b/src/mainboard/google/poppy/variants/rammus/mainboard.c @@ -3,7 +3,6 @@ #include <baseboard/variants.h> #include <ec/google/chromeec/ec.h> #include <smbios.h> -#include <string.h> #include <sar.h> #define SKU_UNKNOWN 0xFFFFFFFF diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c index 8cae959..d62e7f8 100644 --- a/src/mainboard/google/reef/mainboard.c +++ b/src/mainboard/google/reef/mainboard.c @@ -11,7 +11,6 @@ #include <smbios.h> #include <soc/gpio.h> #include <soc/nhlt.h> -#include <string.h> #include <variant/ec.h> #include <variant/gpio.h> diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c index 9ab7629..b391d81 100644 --- a/src/mainboard/google/slippy/variants/falco/romstage.c +++ b/src/mainboard/google/slippy/variants/falco/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <string.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> #include <southbridge/intel/lynxpoint/lp_gpio.h> diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c index 6911c25..50a1b73 100644 --- a/src/mainboard/google/slippy/variants/leon/romstage.c +++ b/src/mainboard/google/slippy/variants/leon/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <string.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> #include <southbridge/intel/lynxpoint/lp_gpio.h> diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c index efbbc7f..32fdd97 100644 --- a/src/mainboard/google/slippy/variants/peppy/romstage.c +++ b/src/mainboard/google/slippy/variants/peppy/romstage.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <string.h> #include <ec/google/chromeec/ec.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c index 4c67afe..7c1bff0 100644 --- a/src/mainboard/google/slippy/variants/wolf/romstage.c +++ b/src/mainboard/google/slippy/variants/wolf/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <string.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> #include <southbridge/intel/lynxpoint/lp_gpio.h> diff --git a/src/mainboard/google/zork/variants/dalboz/variant.c b/src/mainboard/google/zork/variants/dalboz/variant.c index b4e5bcc..4b23ed5 100644 --- a/src/mainboard/google/zork/variants/dalboz/variant.c +++ b/src/mainboard/google/zork/variants/dalboz/variant.c @@ -5,7 +5,6 @@ #include <device/device.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/i2c_tunnel/chip.h> -#include <string.h> #define DALBOZ_DB_HDMI 0x1 diff --git a/src/mainboard/intel/adlrvp/mainboard.c b/src/mainboard/intel/adlrvp/mainboard.c index f929b10..42488f4 100644 --- a/src/mainboard/intel/adlrvp/mainboard.c +++ b/src/mainboard/intel/adlrvp/mainboard.c @@ -8,7 +8,6 @@ #include <soc/gpio.h> #include <smbios.h> #include <stdint.h> -#include <string.h> #include "board_id.h" #include <fw_config.h> diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c index 3aacf38..dffdcdc 100644 --- a/src/mainboard/intel/shadowmountain/romstage.c +++ b/src/mainboard/intel/shadowmountain/romstage.c @@ -4,7 +4,6 @@ #include <fsp/api.h> #include <soc/romstage.h> #include <spd_bin.h> -#include <string.h> #include <soc/meminit.h> #include <baseboard/variants.h> #include <cbfs.h> diff --git a/src/mainboard/intel/tglrvp/mainboard.c b/src/mainboard/intel/tglrvp/mainboard.c index bbce927..fd10b30 100644 --- a/src/mainboard/intel/tglrvp/mainboard.c +++ b/src/mainboard/intel/tglrvp/mainboard.c @@ -6,7 +6,6 @@ #include <ec/ec.h> #include <soc/gpio.h> #include <smbios.h> -#include <string.h> const char *smbios_system_sku(void) { diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c index f621f9b..0c0e5c6 100644 --- a/src/mainboard/kontron/986lcd-m/mainboard.c +++ b/src/mainboard/kontron/986lcd-m/mainboard.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <string.h> #include <types.h> #include <device/device.h> #include <console/console.h> diff --git a/src/mainboard/ocp/deltalake/uartio_vpd.c b/src/mainboard/ocp/deltalake/uartio_vpd.c index d2e052f..8303472 100644 --- a/src/mainboard/ocp/deltalake/uartio_vpd.c +++ b/src/mainboard/ocp/deltalake/uartio_vpd.c @@ -3,7 +3,6 @@ #include <console/console.h> #include <drivers/vpd/vpd.h> #include <console/uart.h> -#include <string.h> #include "vpd.h" diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c index f7b34f0..1dd6dad 100644 --- a/src/mainboard/pcengines/apu1/mainboard.c +++ b/src/mainboard/pcengines/apu1/mainboard.c @@ -9,7 +9,6 @@ #include <device/pci_def.h> #include <southbridge/amd/common/amd_pci_util.h> #include <smbios.h> -#include <string.h> #include <southbridge/amd/cimx/sb800/pci_devs.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/family14/pci_devs.h> diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c index 9371ee9..044918c 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c @@ -15,7 +15,6 @@ #include <southbridge/amd/common/amd_pci_util.h> #include <superio/nuvoton/nct5104d/nct5104d.h> #include <smbios.h> -#include <string.h> #include <AGESA.h> #include "gpio_ftns.h" diff --git a/src/mainboard/prodrive/hermes/smbios.c b/src/mainboard/prodrive/hermes/smbios.c index c1325d4..77c1551 100644 --- a/src/mainboard/prodrive/hermes/smbios.c +++ b/src/mainboard/prodrive/hermes/smbios.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <smbios.h> -#include <string.h> #include <types.h> #include "eeprom.h" diff --git a/src/mainboard/samsung/lumpy/mainboard.c b/src/mainboard/samsung/lumpy/mainboard.c index 9bf3b96..0605b5f 100644 --- a/src/mainboard/samsung/lumpy/mainboard.c +++ b/src/mainboard/samsung/lumpy/mainboard.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <types.h> -#include <string.h> #include <device/device.h> #include <drivers/intel/gma/int15.h> #include <acpi/acpi.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/60551 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f2710b2034882a24a041d99e37ec364193d85e6 Gerrit-Change-Number: 60551 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek: Add PCIe support
by build bot (Jenkins) (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hung-Te Lin, Furquan Shaikh, Paul Menzel. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 ) Change subject: soc/mediatek: Add PCIe support ...................................................................... Patch Set 7: (2 comments) File src/soc/mediatek/common/pcie.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136708): https://review.coreboot.org/c/coreboot/+/56791/comment/94abbeb3_1a185d66 PS7, Line 69: static const char *ltssm_str[] = { static const char * array should probably be static const char * const Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136708): https://review.coreboot.org/c/coreboot/+/56791/comment/a7778b67_768ea1f1 PS7, Line 155: "Unknow state" : ltssm_str[PCIE_LTSSM_STATE(val)]; 'Unknow' may be misspelled - perhaps 'Unknown'? -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 7 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 31 Dec 2021 07:18:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek: Enable PCIe support for mt8195
by Jianjun Wang (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hung-Te Lin. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56793 to look at the new patch set (#7). Change subject: soc/mediatek: Enable PCIe support for mt8195 ...................................................................... soc/mediatek: Enable PCIe support for mt8195 Enable PCIe support for mt8195. TEST=Build pass and boot up to kernel successfully via SSD on Cherry board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x1987 PCI SSVID : 0x1987 SN : 28F40713077B0012602 MN : Phison ESE1A043-X28 RAB : 0x1 AERL : 0x3 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model Phison ESE1A043-X28 BUG=b:178565024 Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: I314572955f1021abe9f2f0f4635670135ed08fff --- M src/soc/mediatek/mt8195/Kconfig M src/soc/mediatek/mt8195/Makefile.inc M src/soc/mediatek/mt8195/soc.c 3 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/56793/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/56793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314572955f1021abe9f2f0f4635670135ed08fff Gerrit-Change-Number: 56793 Gerrit-PatchSet: 7 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek/mt8195: Add driver to configure PCIe
by Jianjun Wang (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hung-Te Lin, Paul Menzel. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56792 to look at the new patch set (#7). Change subject: soc/mediatek/mt8195: Add driver to configure PCIe ...................................................................... soc/mediatek/mt8195: Add driver to configure PCIe Add a new function 'mtk_pcie_prepare' to configure and initialize PCIe bus. TEST=Build pass and boot up to kernel successfully via SSD on Cherry board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x1987 PCI SSVID : 0x1987 SN : 28F40713077B0012602 MN : Phison ESE1A043-X28 RAB : 0x1 AERL : 0x3 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model Phison ESE1A043-X28 BUG=b:178565024 Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: If6799c53b03a33be91157ea088d829beb4272976 --- A src/soc/mediatek/mt8195/include/soc/pcie.h A src/soc/mediatek/mt8195/pcie.c 2 files changed, 84 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/56792/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/56792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6799c53b03a33be91157ea088d829beb4272976 Gerrit-Change-Number: 56792 Gerrit-PatchSet: 7 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek: Add PCIe support
by Jianjun Wang (Code Review) 30 Dec '21

30 Dec '21

Attention is currently required from: Hung-Te Lin, Furquan Shaikh, Paul Menzel, Jianjun Wang. Hello Shelley Chen, Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56791 to look at the new patch set (#7). Change subject: soc/mediatek: Add PCIe support ...................................................................... soc/mediatek: Add PCIe support Add PCIe support for MediaTek platform. Reference: - MT8195 Register Map V0.3-2, Chapter 3.18 PCIe controller (Page 1250) - linux/drivers/pci/controller/pcie-mediatek-gen3.c This code is based on MT8195 platform, but it should be common in each platform with the same PCIe IP in the future. TEST=Build pass and boot up to kernel successfully via SSD on Cherry board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x1987 PCI SSVID : 0x1987 SN : 28F40713077B0012602 MN : Phison ESE1A043-X28 RAB : 0x1 AERL : 0x3 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model Phison ESE1A043-X28 BUG=b:178565024 Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com> Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 --- A src/soc/mediatek/common/include/soc/pcie_common.h A src/soc/mediatek/common/pcie.c 2 files changed, 370 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/56791/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/56791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 Gerrit-Change-Number: 56791 Gerrit-PatchSet: 7 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: security/memory/memory.c: Include 'stdbool' instead of 'stdint'
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60550 ) Change subject: security/memory/memory.c: Include 'stdbool' instead of 'stdint' ...................................................................... security/memory/memory.c: Include 'stdbool' instead of 'stdint' Change-Id: I4eac157c8b48c1c10178bb84822b6462c245deca Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/security/memory/memory.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/60550/1 diff --git a/src/security/memory/memory.c b/src/security/memory/memory.c index ff4cd15..c4f3bdd 100644 --- a/src/security/memory/memory.c +++ b/src/security/memory/memory.c @@ -1,7 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <security/intel/txt/txt.h> +#include <stdbool.h> + #include "memory.h" /** -- To view, visit https://review.coreboot.org/c/coreboot/+/60550 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4eac157c8b48c1c10178bb84822b6462c245deca Gerrit-Change-Number: 60550 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: src: Remove unused 'stdint.h'
by HAOUAS Elyes (Code Review) 30 Dec '21

30 Dec '21

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60549 ) Change subject: src: Remove unused 'stdint.h' ...................................................................... src: Remove unused 'stdint.h' Change-Id: I1df255d55b8f43a711d836c2565c367bd988098a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asrock/b85m_pro4/romstage.c M src/mainboard/asrock/h81m-hds/romstage.c M src/mainboard/google/beltino/romstage.c M src/mainboard/hp/folio_9480m/romstage.c M src/mainboard/intel/baskingridge/romstage.c M src/mainboard/msi/h81m-p33/romstage.c M src/mainboard/supermicro/x10slm-f/romstage.c M src/northbridge/intel/gm45/early_init.c M src/soc/intel/baytrail/modphy_table.c M src/southbridge/intel/i82801gx/early_init.c 10 files changed, 0 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/60549/1 diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c index 75efb9e..25b157d 100644 --- a/src/mainboard/asrock/b85m_pro4/romstage.c +++ b/src/mainboard/asrock/b85m_pro4/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c index cc9a04f..3573d69 100644 --- a/src/mainboard/asrock/h81m-hds/romstage.c +++ b/src/mainboard/asrock/h81m-hds/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c index a818d87..ecf5490 100644 --- a/src/mainboard/google/beltino/romstage.c +++ b/src/mainboard/google/beltino/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/hp/folio_9480m/romstage.c b/src/mainboard/hp/folio_9480m/romstage.c index f1df3ef..fa7cba1 100644 --- a/src/mainboard/hp/folio_9480m/romstage.c +++ b/src/mainboard/hp/folio_9480m/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c index 07a0083..936703b 100644 --- a/src/mainboard/intel/baskingridge/romstage.c +++ b/src/mainboard/intel/baskingridge/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/msi/h81m-p33/romstage.c b/src/mainboard/msi/h81m-p33/romstage.c index 5a8f479..f4db2644 100644 --- a/src/mainboard/msi/h81m-p33/romstage.c +++ b/src/mainboard/msi/h81m-p33/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c index f7711c0..01dab69 100644 --- a/src/mainboard/supermicro/x10slm-f/romstage.c +++ b/src/mainboard/supermicro/x10slm-f/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c index 6e3ea2c..e911064 100644 --- a/src/northbridge/intel/gm45/early_init.c +++ b/src/northbridge/intel/gm45/early_init.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <device/pci_ops.h> #include <southbridge/intel/i82801ix/i82801ix.h> #include "gm45.h" diff --git a/src/soc/intel/baytrail/modphy_table.c b/src/soc/intel/baytrail/modphy_table.c index f028c8f..ebda700 100644 --- a/src/soc/intel/baytrail/modphy_table.c +++ b/src/soc/intel/baytrail/modphy_table.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <soc/modphy_table.h> struct modphy_entry reva0_modphy_table[] = { /* SOC stepping A0/A1 */ diff --git a/src/southbridge/intel/i82801gx/early_init.c b/src/southbridge/intel/i82801gx/early_init.c index c8a6117..4647bf1 100644 --- a/src/southbridge/intel/i82801gx/early_init.c +++ b/src/southbridge/intel/i82801gx/early_init.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <console/console.h> #include <device/pci_ops.h> #include <device/smbus_host.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/60549 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1df255d55b8f43a711d836c2565c367bd988098a Gerrit-Change-Number: 60549 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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coreboot-gerrit December 2021