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Change subject: soc/amd/psp_verstage: Init TPM on S0i3 resume
......................................................................
Patch Set 7:
(1 comment)
File src/vendorcode/google/chromeos/Kconfig:
https://review.coreboot.org/c/coreboot/+/58870/comment/0fcb20c5_485f5a46
PS3, Line 47: depends on TPM2 && RESUME_PATH_SAME_AS_BOOT
> I think the depends on is here because otherwise the code doesn't do anything: […]
Another option is to broaden RESUME_PATH_SAME_AS_BOOT depends to be ACPI_RESUME || PSP_INIT_TPM_ON_S0I3_RESUME. Another option would be to be to disable platform hierarchy unconditionally when PSP_INIT_TPM_ON_S0I3_RESUME is set. Andrey, is there a scenario where we wouldn't disable platform hierarchy after the tpm was reset?
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Change subject: soc/intel/elkhartlake: Introduce Intel PSE
......................................................................
Patch Set 52:
(1 comment)
File src/soc/intel/elkhartlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/55367/comment/241fb711_5ec4cb1c
PS49, Line 127: m_cfg->PchPseEnable = CONFIG(PSE_ENABLE);
> I don't know what OK means on your scale. You outrank me anyway, so
> there is no point in asking me for permission and it's not a technical
> matter anyway.
I have always and will continue to value your input Nico, please do not get it wrong. And it is not my intention to outrank you. I guess the best would be to step down a bit and release the time pressure. I will have to cherry-pick this patch private for the time we need to work this out properly and do not insist on merging this patch yet,
Hopefully, in the meantime there will be some result from the talks with Intel that I can use here.
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Change subject: soc/intel/elkhartlake: Introduce Intel PSE
......................................................................
Patch Set 52:
(1 comment)
File src/soc/intel/elkhartlake/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/55367/comment/d59733e3_0fa371ee
PS52, Line 52: CONFIG_ADD_PSE_IMAGE_TO_CBFS
We usually show a warning at the end of the build if a file is missing, cf. CB:57368.
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Attention is currently required from: Jason Glenesk, Marshall Dawson, Julius Werner, Yu-Ping Wu, Andrey Pronin, Karthik Ramasubramanian, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Andrey Pronin, Raul Rangel, Marshall Dawson, Julius Werner, Yu-Ping Wu, Andrey Pronin, Karthik Ramasubramanian, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58870
to look at the new patch set (#7).
Change subject: soc/amd/psp_verstage: Init TPM on S0i3 resume
......................................................................
soc/amd/psp_verstage: Init TPM on S0i3 resume
Add option to initialize the TPM in PSP verstage during s0i3 resume.
This is needed if the TPM is reset in s0i3. FSDL is handling
restoring everything else, so only the minimum TPM initialization is done.
BUG=b:200578885,b:197965075
TEST=Multiple cycles of S0i3 suspend resume. 50-100ms of additional delay.
BRANCH=None
Change-Id: Ie511928da6a8b4be62621fd2c4c31a8d1e724d48
Signed-off-by: Rob Barnes <robbarnes(a)google.com>
---
M src/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/guybrush/variants/baseboard/gpio.c
M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/guybrush/verstage.c
M src/security/vboot/vboot_common.h
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/common/psp_verstage/include/psp_verstage.h
M src/soc/amd/common/psp_verstage/psp_verstage.c
9 files changed, 137 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/58870/7
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Hello build bot (Jenkins), Jason Glenesk, Andrey Pronin, Raul Rangel, Marshall Dawson, Julius Werner, Yu-Ping Wu, Andrey Pronin, Karthik Ramasubramanian, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58870
to look at the new patch set (#6).
Change subject: [WIP]soc/amd/psp_verstage: Init TPM on S0i3 resume
......................................................................
[WIP]soc/amd/psp_verstage: Init TPM on S0i3 resume
Add option to initialize the TPM in PSP verstage during s0i3 resume.
This is needed if the TPM is reset in s0i3. FSDL is handling
restoring everything else, so only the minimum TPM initialization is done.
BUG=b:200578885,b:197965075
TEST=Multiple cycles of S0i3 suspend resume. 50-100ms of additional delay.
BRANCH=None
Change-Id: Ie511928da6a8b4be62621fd2c4c31a8d1e724d48
Signed-off-by: Rob Barnes <robbarnes(a)google.com>
---
M src/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/guybrush/variants/baseboard/gpio.c
M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/guybrush/verstage.c
M src/security/vboot/vboot_common.h
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/common/psp_verstage/include/psp_verstage.h
M src/soc/amd/common/psp_verstage/psp_verstage.c
9 files changed, 137 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/58870/6
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Change subject: mb/google/dedede/var/bugzzy: Enable Wifi SAR
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/google/dedede/var/metaknight: Probe and enable amplifier operation mode
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
I believe AUDIO_AMP is defined in FW_CONFIG and not SSFC.
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