coreboot-gerrit November 2021

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Change in coreboot[master]: Makefile.inc: Add a master header pointer as a regular cbfs file
by Arthur Heymans (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Martin Roth, Arthur Heymans. Hello Arthur Heymans, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/59133 to review the following change. Change subject: Makefile.inc: Add a master header pointer as a regular cbfs file ...................................................................... Makefile.inc: Add a master header pointer as a regular cbfs file Change-Id: I99b8d4e2b4e9109b239804c86a1911ba916bd966 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc 1 file changed, 10 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/59133/1 diff --git a/Makefile.inc b/Makefile.inc index 723e34c..eae6868 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1139,17 +1139,16 @@ $(CBFSTOOL) $< write -u \ -r BOOTBLOCK \ -f $(objcbfs)/bootblock.bin - # make space for the CBFS master header pointer. "ptr_" is just - # arbitrary 4 bytes that will be overwritten by add-master-header. - printf "ptr_" > $@.tmp - $(CBFSTOOL) $< add \ - -f $@.tmp \ - -n "header pointer" \ - -t "cbfs header" \ - -b -4 \ - $(CBFSTOOL_ADD_CMD_OPTIONS) - rm -f $@.tmp -endif # ARCH_X86 + +$(obj)/header_pointer: + printf "ptr_" > $@ + +cbfs-files-y += header_pointer +header_pointer-file := $(obj)/header_pointer +header_pointer-position := -4 +header_pointer-type := "cbfs header" + +endif # !ARCH_X86 endif # UPDATE_IMAGE $(call add_intermediate, add_prebuild_files, $$(prebuilt-files)) -- To view, visit https://review.coreboot.org/c/coreboot/+/59133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99b8d4e2b4e9109b239804c86a1911ba916bd966 Gerrit-Change-Number: 59133 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: Makefile.inc: Move updating the master header pointer later
by Arthur Heymans (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Martin Roth, Arthur Heymans. Hello Arthur Heymans, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/59132 to review the following change. Change subject: Makefile.inc: Move updating the master header pointer later ...................................................................... Makefile.inc: Move updating the master header pointer later To keep the master header at the top of cbfs, add a placeholder. Change-Id: I3ba01be7da1f09a8cac287751497c18cda97d293 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc 1 file changed, 14 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/59132/1 diff --git a/Makefile.inc b/Makefile.inc index 860331e..e04a767 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1140,7 +1140,6 @@ -b -$(call file-size,$(objcbfs)/bootblock.bin) $(cbfs-autogen-attributes) \ $(TS_OPTIONS) \ $(CBFSTOOL_ADD_CMD_OPTIONS) - $(CBFSTOOL) $< add-master-header $(TS_OPTIONS) $(CBFSTOOL_ADD_CMD_OPTIONS) else $(call add_intermediate, add_bootblock, $(objcbfs)/bootblock.bin) printf " FMAP BOOTBLOCK adding bootblock\n" @@ -1157,13 +1156,26 @@ -b -4 \ $(CBFSTOOL_ADD_CMD_OPTIONS) rm -f $@.tmp - $(CBFSTOOL) $< add-master-header $(TS_OPTIONS) $(CBFSTOOL_ADD_CMD_OPTIONS) endif # ARCH_X86 endif # UPDATE_IMAGE $(call add_intermediate, add_prebuild_files, $$(prebuilt-files)) $(prebuild-files) true +$(obj)/placeholder: + dd if=/dev/zero of=$@ bs=32 count=1 + +cbfs-files-y += cbfs_master_header +cbfs_master_header-file := $(obj)/placeholder +cbfs_master_header-position := 0 +cbfs_master_header-type := "cbfs header" + +$(call add_intermediate, update_master_header, add_prebuild_files) + printf " CBFS Updating master header\n" + rm -f $(obj)/placeholder + $(CBFSTOOL) $< remove -n cbfs_master_header + $(CBFSTOOL) $< add-master-header $(TS_OPTIONS) $(CBFSTOOL_ADD_CMD_OPTIONS) + $(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $(IFITTOOL) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" # The full ROM may be larger than the CBFS part, so create an empty -- To view, visit https://review.coreboot.org/c/coreboot/+/59132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ba01be7da1f09a8cac287751497c18cda97d293 Gerrit-Change-Number: 59132 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: Makefile.inc: Add the x86 bootblock as a regular cbfs file
by Arthur Heymans (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Arthur Heymans, Martin Roth. Arthur Heymans has uploaded a new patch set (#2) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/56122 ) Change subject: Makefile.inc: Add the x86 bootblock as a regular cbfs file ...................................................................... Makefile.inc: Add the x86 bootblock as a regular cbfs file Files of type bootblock are now always top aligned. This assumes only x86 ever uses cbfs file type bootblock. As the cbfs header needs to be at a specific place and it can be updated only later on, use a placeholder cbfs file. Change-Id: I4de9d7fedf1ae5a37a3310dd42eb07b44c030930 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M src/arch/x86/Makefile.inc 2 files changed, 13 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/56122/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4de9d7fedf1ae5a37a3310dd42eb07b44c030930 Gerrit-Change-Number: 56122 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Makefile.inc: Split of image generation in multiple targets
by Arthur Heymans (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Martin Roth. Arthur Heymans has uploaded a new patch set (#4) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/56114 ) Change subject: Makefile.inc: Split of image generation in multiple targets ...................................................................... Makefile.inc: Split of image generation in multiple targets The big '$(obj)/coreboot.pre' target did a lot of things and made the build process inflexible. Split of much of the functionality in INTERMEDIATE targets that can have proper dependencies. Change-Id: If36aee0bd2f75f3941b3bc424a7ec6c775eb1353 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc 1 file changed, 41 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/56114/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/56114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If36aee0bd2f75f3941b3bc424a7ec6c775eb1353 Gerrit-Change-Number: 56114 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] drivers/mrc_cache: Drop get_write_protect_state() stubs
by Julius Werner (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Tim Wawrzynczak, Kyösti Mälkki, Andrey Petrov, Alexander Couzens, Patrick Rudolph, Yu-Ping Wu, Felix Held. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58968 ) Change subject: [WIP] drivers/mrc_cache: Drop get_write_protect_state() stubs ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/58968/comment/7c397ec0_c2c684cf PS3, Line 11: from soc/. > I think there may be some cases where developers will want to overwrite the entire SPI flash image i […] Okay, I mean I'm not against adding another Kconfig to let the user disable this manually if you think that's useful. We just can't lose the existing config to track whether the controller is capable of flash protection. Maybe we should move that one under src/security/lockdown/Kconfig and call it BOOTMEDIA_CONTROLLER_CAN_LOCK or something like that. -- To view, visit https://review.coreboot.org/c/coreboot/+/58968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8db0394645df1917b686339fa79432ccfc6960a2 Gerrit-Change-Number: 58968 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 10 Nov 2021 22:47:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/smp/spinlock: Fix threading when !STAGE_HAS_SPINLOCKS
by Julius Werner (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Tim Wawrzynczak, Kyösti Mälkki, Rob Barnes, Karthik Ramasubramanian. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59021 ) Change subject: arch/x86/smp/spinlock: Fix threading when !STAGE_HAS_SPINLOCKS ...................................................................... Patch Set 2: (1 comment) File src/arch/x86/include/arch/smp/spinlock.h: https://review.coreboot.org/c/coreboot/+/59021/comment/7c0900ac_6e8a7be5 PS2, Line 50: thread_coop_disable(); > I can tell you with certainty that AMD codebase has had places where __always_inline was mandatory. […] Can you explain why this __always_inline is needed? (Git says it has been here since 2005 and was added as part of a giant patch doing loads of other things where the commit message just says "1201_ht_bus0_dev0_fidvid_core.diff https://openbios.org/roundup/linuxbios/issue41 Lord have mercy upon us." ...so that is helpful. :/ ) I would have naively seconded Raul here that it probably doesn't need to be there and can just be replaced with a normal `inline` or something. If it actually is load-bearing then there needs to be a prominent comment explaining the issue next to it. FWIW, thread_coop_disable() is an inline no-op for !CONFIG(COOP_MULTITASKING), so this can still be fully inlined for all those boards not using that. For those that do, I think combining the two concepts makes a lot more sense than having to maintain two separate kinds of concurrency protection across coreboot. For 90% of the cases you'll always want to have both anyway, and making special cases to save one rdmsr() in the remainder doesn't seem worth it (unless you have a concrete example where this would really cause a notable issue). -- To view, visit https://review.coreboot.org/c/coreboot/+/59021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea621fcdad8f0367acce4f70be42a4e9a68da938 Gerrit-Change-Number: 59021 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 10 Nov 2021 22:37:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake/apci: Only use SCM for ChromeOS
by Tim Wawrzynczak (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Tim Crawford, Sean Rhodes, Jeremy Soller, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58798 ) Change subject: soc/intel/tigerlake/apci: Only use SCM for ChromeOS ...................................................................... Patch Set 12: Code-Review+2 (2 comments) File src/soc/intel/tigerlake/acpi/tcss.asl: https://review.coreboot.org/c/coreboot/+/58798/comment/2304c224_6c84b3c6 PS10, Line 156: Return (Arg3) > or even building on the below, would it also be correct to do something like […] decided to leave this as-is for now, will dig into a better solution later https://review.coreboot.org/c/coreboot/+/58798/comment/dda9b228_7233f160 PS10, Line 190: Local0 |= USB_TUNNELING | DISPLAY_PORT_TUNNELING | PCIE_TUNNELING | : INTER_DOMAIN_USB4_INTERNET_PROTOCOL > Up to you, Google has more TGL boards than us and System76 combined but... […] decided to leave this as-is for now, will dig into a better solution later -- To view, visit https://review.coreboot.org/c/coreboot/+/58798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib947c3c9cd843e54d4664509c15336178c0bc99e Gerrit-Change-Number: 58798 Gerrit-PatchSet: 12 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 10 Nov 2021 22:16:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Sean Rhodes <admin(a)starlabs.systems> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/lpc: Set FSP-S/M alignment to 64 when using SPI DMA
by Raul Rangel (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Arthur Heymans, Jason Glenesk, Marshall Dawson, Rob Barnes, Karthik Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59130 ) Change subject: soc/amd/common/block/lpc: Set FSP-S/M alignment to 64 when using SPI DMA ...................................................................... Patch Set 1: (1 comment) File src/soc/amd/common/block/lpc/Kconfig: https://review.coreboot.org/c/coreboot/+/59130/comment/088cad8d_70c826db PS1, Line 24: : config FSP_ALIGNMENT_FSP_S : int : default 64 if SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA : : config FSP_ALIGNMENT_FSP_M : int : default 64 if SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA > cbfs always has a 64 byte alignment. […] The metadata does, the actual payload doesn't though. -- To view, visit https://review.coreboot.org/c/coreboot/+/59130 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I282b9989d8e95c93603c6f69616a8f236a4e2e35 Gerrit-Change-Number: 59130 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 10 Nov 2021 21:59:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/block/lpc: Set FSP-S/M alignment to 64 when using SPI DMA
by Arthur Heymans (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes, Karthik Ramasubramanian, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59130 ) Change subject: soc/amd/common/block/lpc: Set FSP-S/M alignment to 64 when using SPI DMA ...................................................................... Patch Set 1: (1 comment) File src/soc/amd/common/block/lpc/Kconfig: https://review.coreboot.org/c/coreboot/+/59130/comment/1919d9fd_7f6319bf PS1, Line 24: : config FSP_ALIGNMENT_FSP_S : int : default 64 if SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA : : config FSP_ALIGNMENT_FSP_M : int : default 64 if SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA cbfs always has a 64 byte alignment. Is this needed? -- To view, visit https://review.coreboot.org/c/coreboot/+/59130 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I282b9989d8e95c93603c6f69616a8f236a4e2e35 Gerrit-Change-Number: 59130 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 10 Nov 2021 21:51:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/kano: Add thermal sensor settings
by Tim Wawrzynczak (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: David Wu, Sumeet R Pawnikar, Peter Ou. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59089 ) Change subject: mb/google/brya/var/kano: Add thermal sensor settings ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0da25f142149f94c83fdf7b2ba2cb8694cddb412 Gerrit-Change-Number: 59089 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Peter Ou <peter.ou(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Peter Ou <peter.ou(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 10 Nov 2021 21:40:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2021