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Change subject: mb/google/brya/var/brask: Make LAN driver to support RT8125
......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59086/comment/c26e1eae_d34f7ef4
PS2, Line 7: mb/google/brya/var/brask: Make LAN driver to support RT8125
suggestion:
`drivers/net/r8168: Add support for Realtek RT8125`
https://review.coreboot.org/c/coreboot/+/59086/comment/c1f13c44_f9dfbbb2
PS2, Line 8:
: Add new device id 0x8125 to the driver.
suggestion:
```
The Realtek RT8168 and RT8125 have a similar programming
interface, therefore add the PCI device ID for the RT8125
into driver for support
```
File src/drivers/net/r8168.c:
https://review.coreboot.org/c/coreboot/+/59086/comment/42692a0c_7c6e9c12
PS2, Line 364: 0x8168,
: 0x8125,
Now that there is more than one, should we add these to https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr… instead?
https://review.coreboot.org/c/coreboot/+/59086/comment/3fa02254_40456b85
PS2, Line 371: 0x10ec
While you're here, do you mind changing this to `PCI_VENDOR_ID_REALTEK` ?
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I'd like you to reexamine a change. Please visit
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Change subject: mb/system76/gaze16: Add System76 Gazelle 16
......................................................................
mb/system76/gaze16: Add System76 Gazelle 16
https://tech-docs.system76.com/models/gaze16/README.html
The gaze16 comes in 3 variants due to differences in the discrete GPU
and network controller used.
- NVIDIA RTX 3050, using Realtek Ethernet controller
- NVIDIA RTX 3060, using Realtek Ethernet controller
- NVIDIA RTX 3060, using onboard Intel I219-V Ethernet controller
Tested on the 3050 variant.
Tested with TianoCore (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- M.2 NVMe SSD
- M.2 SATA SSD
- 2.5" SSD
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- Internal microphone
- Internal speakers
- Combined headphone + mic 3.5mm audio*
- 3.5mm microphone input*
- S3 suspend/resume
- Booting to Pop!_OS Linux 21.04 and Windows 10 20H2
- Flashing with flashrom
Not working:
- Discrete/Hybrid graphics
- Mini DisplayPort output (requires NVIDIA GPU)
- 3.5mm audio input/output detection on Windows
Change-Id: Ifb90f9b73a10abf53a21738e2c466d539df9a37c
Signed-off-by: Jeremy Soller <jeremy(a)system76.com>
Signed-off-by: Tim Crawford <tcrawford(a)system76.com>
---
M Documentation/mainboard/index.md
A Documentation/mainboard/system76/gaze16.md
A src/mainboard/system76/gaze16/Kconfig
A src/mainboard/system76/gaze16/Kconfig.name
A src/mainboard/system76/gaze16/Makefile.inc
A src/mainboard/system76/gaze16/acpi/mainboard.asl
A src/mainboard/system76/gaze16/acpi/sleep.asl
A src/mainboard/system76/gaze16/board_info.txt
A src/mainboard/system76/gaze16/bootblock.c
A src/mainboard/system76/gaze16/cmos.default
A src/mainboard/system76/gaze16/cmos.layout
A src/mainboard/system76/gaze16/devicetree.cb
A src/mainboard/system76/gaze16/dsdt.asl
A src/mainboard/system76/gaze16/ramstage.c
A src/mainboard/system76/gaze16/romstage.c
A src/mainboard/system76/gaze16/variant.h
A src/mainboard/system76/gaze16/variants/3050/data.vbt
A src/mainboard/system76/gaze16/variants/3050/hda_verb.c
A src/mainboard/system76/gaze16/variants/3050/include/variant/gpio.h
A src/mainboard/system76/gaze16/variants/3050/overridetree.cb
A src/mainboard/system76/gaze16/variants/3050/ramstage.c
A src/mainboard/system76/gaze16/variants/3050/romstage.c
A src/mainboard/system76/gaze16/variants/3060/data.vbt
A src/mainboard/system76/gaze16/variants/3060/hda_verb.c
A src/mainboard/system76/gaze16/variants/3060/include/variant/gpio.h
A src/mainboard/system76/gaze16/variants/3060/overridetree.cb
A src/mainboard/system76/gaze16/variants/3060/ramstage.c
A src/mainboard/system76/gaze16/variants/3060/romstage.c
28 files changed, 1,365 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/56956/18
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Change subject: mb/google/brya/var/kano: Configure USB2 and USB3 port
......................................................................
Patch Set 2: Code-Review+2
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Change subject: Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"
......................................................................
Patch Set 6: Code-Review+1
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Change subject: Documentation/releases: Update index.md
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59058/comment/643d04e6_113dcb54
PS1, Line 9: upcoming
> That might be a little bit confusing. I would use 4. […]
Done
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Hello Felix Singer, build bot (Jenkins), Martin Roth,
I'd like you to reexamine a change. Please visit
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Change subject: Documentation/releases: Update index.md
......................................................................
Documentation/releases: Update index.md
Fix date for 4.16 release.
Change-Id: I6ff5849cb4b7bd3bc6c1d91637536b6e94d92a1a
Signed-off-by: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com>
---
M Documentation/releases/index.md
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/59058/2
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Change subject: Doc/releases: Fix coreboot 4.15 release notes
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
Thanks!
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59094 )
Change subject: [WIP,RFC] Clean up spinlocks
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59094/comment/da709b61_b372434b
PS2, Line 14: IMO commit a98d302fe9 x86/smp/spinlock: Disable thread coop when taking spinlock
: is wrong and should be reverted too.
I think there is a disconnect between spinlock and thread_mutex.
spinlock was made to prevent more than 1 CPU from executing. As you said, yielding here is bad...
thread_mutex was only meant to work with coop multi-threading to guard a resource. It is safe to yield while holding the mutex because a `thread_mutex_lock` will yield if it can't get the lock.
So we have two options:
1) Make a multi-cpu aware thread_mutex and replace all spin_locks.
2) Disable thread_yield() while holding a spin lock. This can happen one of two ways:
1) Provide thread_yield() some mechanism to determine if a spin lock is being held on the BSP.
2) Have spin_lock just disable coop-multi-threading.
Honestly, 2.2 is the easiest to grasp. If you want, I will rename `spin_lock` to `spin_lock_disable_coop` and `spin_unlock_enable_coop`.
> Now I am not going to -2 these threding and spinlock changes. Just understand your DMA performance currently relies on periodic context switches, and you really really should not rely on uart8250mem and printk() to satisfy that.
Right. In my case the DMA controller can perform 64 KiB transactions. Large things like the payload require being armed twice.
I'm not currently dependent on printk to satisfy that requirement. I'm adding more periodic yields to make it more predictable: https://review.coreboot.org/c/coreboot/+/58955
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Change subject: soc/amd/cezanne: enable LPC decodes if platform uses LPC
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/cezanne/early_fch.c:
https://review.coreboot.org/c/coreboot/+/59103/comment/b2ca7265_3af53c2f
PS2, Line 24: lpc_configure_decodes
> Maybe in the future we can add an lpc_config so the decodes can be specified: https://source. […]
I agree, and plan to do so since the EC decodes also have to be set up in the mainboard right now. It will come soon when the platform I am working on is booting.
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Change subject: Doc/releases/coreboot-4.16-relnotes.md: Fix typo
......................................................................
Patch Set 1: Code-Review+2
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