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Change subject: lib/thread: Start stopwatch after printk
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Change subject: mb/google/brya/var/kano: set power limits for thermal
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Change subject: mb/google/brya/var/felwinter: Enable SaGv
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Change subject: mb/google/brya/var/gimble: Disable active policy under dptf
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Patch Set 2:
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Commit Message:
https://review.coreboot.org/c/coreboot/+/59102/comment/a670a56d_72c2267c
PS2, Line 11: Critical Policy
`power limits`
File src/mainboard/google/brya/variants/gimble/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/59102/comment/12cbac0c_b0a1f880
PS2, Line 51: ## Disable Active Policy from baseboard
: register "policies.active" = "{[0] = {.target=DPTF_NONE}}"
This should not be required, there is no policy defined in the baseoboard. For brya, we decided to let each variant fully define its own policies; it led to too much confusion in previous programs
https://review.coreboot.org/c/coreboot/+/59102/comment/be8be82e_e98fce3d
PS2, Line 57: 53.8
Only integral degrees C are supported
https://review.coreboot.org/c/coreboot/+/59102/comment/5c8e24b5_a715bdbe
PS2, Line 79: 250
This could probably be 0, DPTF does not adjust PL2 currently
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Change subject: mb/google/guybrush: Define ACPI Power Resources for FPMCU
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Change subject: Doc/releases/coreboot-4.16-relnotes.md: Fix typo
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Change subject: Doc/releases: Fix coreboot 4.15 release notes
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Change subject: mb/google/brya/var/kano: Add thermal sensor settings
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Change subject: mb/google/brya/var/brask: Configurate the GPIOs of LAN
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Patch Set 6:
(1 comment)
File src/mainboard/google/brya/variants/brask/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/58105/comment/c1d1f403_f7265f90
PS5, Line 86: register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H22)"
> From 8125 spec., this pin will not disable wake-on-lan. We will double check it.
So this PowerResource will look sorta like this:
Method (_ON, 0)
{
// drive GPP_H22 high
// sleep for 12 ms
}
and this is the LAN's ISOLATE pin, which is active low, so I think this is right?
PERST is connected to PLTRST# and power is controlled by the S5 rails.
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