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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/redrix: De-assert SSD PERST# in romstage
......................................................................
mb/google/brya/var/redrix: De-assert SSD PERST# in romstage
After CB:57539 applied, it can support romstage GPIO table override.
We can move SSD PERST# de-assertion to romstage.
The reason for this is to give enough time after PERST#
deassertion so that the SSD has enough time to initialize before
the FSP scans the RPs for downstream devices.
BUG=b:199714453
TEST=build
Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com>
Change-Id: I242cb1517f564d9d135d523b1e7f95ac34d601f8
---
M src/mainboard/google/brya/variants/redrix/gpio.c
1 file changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/59269/2
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Change subject: mb/google/brya/var/redrix: Correct WWAN power sequence
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/redrix/gpio.c:
https://review.coreboot.org/c/coreboot/+/59267/comment/b637eb46_3cbe6fdf
PS2, Line 71: /* E0 : SATAXPCIE0 ==> WWAN_PERST_L */
> suggestion: add a comment here explaining that E0 is sequenced out-of-order here is so that PERST_L […]
Done
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Hello build bot (Jenkins), Tim Wawrzynczak, Wisley Chen,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/redrix: Correct WWAN power sequence
......................................................................
mb/google/brya/var/redrix: Correct WWAN power sequence
Correct the WWAN power sequence to meet spec
BUG=b:206079177
TEST=build
Change-Id: Ibba1ecc04b563ae4eedd7596594f33812cbac150
Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/redrix/gpio.c
M src/mainboard/google/brya/variants/redrix/include/variant/gpio.h
3 files changed, 32 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/59267/3
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Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59288 )
Change subject: mb/google/brya/var/vell: Generate LP5 RAM ID
......................................................................
Patch Set 2: Code-Review+1
(2 comments)
Patchset:
PS2:
LGTM (I don't have CR+2 yet).
File src/mainboard/google/brya/variants/vell/memory/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/59288/comment/ec2ee9cf_f8095c2a
PS2, Line 1: # SPDX-License-Identifier: GPL-2.0-or-later
: # This is an auto-generated file. Do not edit!!
Unrelated to this change: it's a bit annoying that the number of #'s doesn't match the template. I'll upload a CL to fix the templates.
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/guybrush/var/nipperkin: Update SPKR GPIO configuration
......................................................................
mb/google/guybrush/var/nipperkin: Update SPKR GPIO configuration
For Nipperkin Board Version 2, update SPKR GPIO to
match H/W schematic:
SPKR: set to GPIO70 from GPIO31
BUG=b:202992077
BRANCH=guybrush
TEST=emerge-guybrush coreboot chromeos-bootimage
Change-Id: I3d82292b116f53d85d9518364ffd2169bd915a7e
Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com>
---
M src/mainboard/google/guybrush/variants/baseboard/gpio.c
M src/mainboard/google/guybrush/variants/nipperkin/gpio.c
M src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb
3 files changed, 7 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/59051/4
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Change subject: soc/intel/alderlake: Disable VT-d for early silicons
......................................................................
Patch Set 6: Code-Review+2
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Change subject: driver/intel/mipi_camera: Add support for _DSC field
......................................................................
Patch Set 10: Code-Review+2
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Change subject: soc/mediatek/mt8186: add early initialization for eMMC
......................................................................
Patch Set 2:
(1 comment)
File src/soc/mediatek/mt8186/msdc.c:
https://review.coreboot.org/c/coreboot/+/59294/comment/4dfa4c00_c6dfb4f0
PS2, Line 62: mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE);
give this is a board-specific feature (e.g., some boards may prefer to not do early init, if they don't use depthcharge) I think this should invoked from mainboard.c, of change the function to mtk_msdc_configure_emmc(int early_init) and only do early_init if the param is 1.
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Change subject: driver/intel/mipi_camera: Add support for _DSC field
......................................................................
Patch Set 10:
(1 comment)
File src/drivers/intel/mipi_camera/chip.h:
https://review.coreboot.org/c/coreboot/+/58767/comment/302552f4_262e0651
PS10, Line 260: uint8_t max_dstate_for_probe;
not sure if you would like to add an ascii table to let users know abut the possible configurations as below as comment ?
Number State Description
0 D0 Device fully powered on
1 D1
2 D2
3 D3hot
4 D3cold Off
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