coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: treewide: Remove unused spinlock functions
by Raul Rangel (Code Review) 16 Nov '21

16 Nov '21

Raul Rangel has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59020 ) Change subject: treewide: Remove unused spinlock functions ...................................................................... Abandoned No longer needed -- To view, visit https://review.coreboot.org/c/coreboot/+/59020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e9a742e6b311d972a260039401bfd8f8766dd36 Gerrit-Change-Number: 59020 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/amd/common/psp_verstage: Remove confusing boot_cpu()
by Raul Rangel (Code Review) 16 Nov '21

16 Nov '21

Raul Rangel has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59069 ) Change subject: soc/amd/common/psp_verstage: Remove confusing boot_cpu() ...................................................................... Abandoned File has been deleted. -- To view, visit https://review.coreboot.org/c/coreboot/+/59069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4e0604b37f036dcf07debbd8d796d7a493dbd30 Gerrit-Change-Number: 59069 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: src/lib/prog_loaders: Add preload_ramstage
by Raul Rangel (Code Review) 16 Nov '21

16 Nov '21

Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58982 ) Change subject: src/lib/prog_loaders: Add preload_ramstage ...................................................................... src/lib/prog_loaders: Add preload_ramstage This will enable preloading ramstage. By preloading the file into cbfs_cache we reduce boot time. BUG=b:179699789 TEST=Boot guybrush to OS and see 12ms reduction in boot time. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: Ibe12de806449da25bc0033b02fcb97c3384eddc1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58982 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M Makefile.inc M src/include/program_loading.h M src/lib/prog_loaders.c 3 files changed, 19 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index b784f3e..f14bc1e 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1214,6 +1214,10 @@ $(CONFIG_CBFS_PREFIX)/ramstage-file := $(RAMSTAGE) $(CONFIG_CBFS_PREFIX)/ramstage-type := stage $(CONFIG_CBFS_PREFIX)/ramstage-compression := $(CBFS_COMPRESS_FLAG) +# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned. +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y) +$(CONFIG_CBFS_PREFIX)/ramstage-align := 64 +endif cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode $(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB) diff --git a/src/include/program_loading.h b/src/include/program_loading.h index 5b9a94d..ba42465 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -145,6 +145,13 @@ * RAMSTAGE LOADING * ************************/ +/* + * Asynchronously preloads ramstage. + * + * This should be called early on to allow ramstage to load before + * `run_ramstage` is called. + */ +void preload_ramstage(void); /* Run ramstage from romstage. */ void run_ramstage(void); diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 8ad646a..878f729e 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -75,7 +75,15 @@ return rmodule_stage_load(&rmod_ram); } +void preload_ramstage(void) +{ + if (!CONFIG(CBFS_PRELOAD)) + return; + printk(BIOS_DEBUG, "Preloading ramstage\n"); + + cbfs_preload(CONFIG_CBFS_PREFIX "/ramstage"); +} void run_ramstage(void) { struct prog ramstage = -- To view, visit https://review.coreboot.org/c/coreboot/+/58982 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe12de806449da25bc0033b02fcb97c3384eddc1 Gerrit-Change-Number: 58982 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: ChromeOS: Add legacy mainboard_ec_running_ro()
by Julius Werner (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Kyösti Mälkki. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58896 ) Change subject: ChromeOS: Add legacy mainboard_ec_running_ro() ...................................................................... Patch Set 7: (1 comment) File src/vendorcode/google/chromeos/gnvs.c: https://review.coreboot.org/c/coreboot/+/58896/comment/2d01a2e3_0733445e PS7, Line 67: } Does anyone know what this is even good for? As far as I can tell this always gets overwritten by depthcharge (https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/refs/he…) anyway. And it has to be, because on many boards the EC-RW jump only happens in depthcharge, so coreboot can't even know what the final EC state will be yet. Can't we just get rid of this and related callbacks? -- To view, visit https://review.coreboot.org/c/coreboot/+/58896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f Gerrit-Change-Number: 58896 Gerrit-PatchSet: 7 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Tue, 16 Nov 2021 21:21:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Use relative address for EFS gen2
by Kangheui Won (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Bao Zheng, Martin Roth, Marshall Dawson, Paul Menzel, Zheng Bao, Eric Peers, Karthik Ramasubramanian, Karthikeyan Ramasubramanian, Felix Held. Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56438 ) Change subject: amdfwtool: Use relative address for EFS gen2 ...................................................................... Patch Set 19: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56438/comment/f74c4ec8_ded4ac0d PS2, Line 9: The second generation EFS (offset 0x24[0]=0) uses : "binary relative" offsets and not "x86 physical : MMIO address" like gen1. : : Chips like Cezanne can run in both cases, so no problem : comes up so far. : : TODO: Need to fix the problem in psp_verstage. > Karthik: has the updated signed verstage on psp binary landed that we can submit this patch? Unfortunately not yet, but I think it'll be done in this week. -- To view, visit https://review.coreboot.org/c/coreboot/+/56438 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7701c7819f03586d4ecab3d744056c8c902b630f Gerrit-Change-Number: 56438 Gerrit-PatchSet: 19 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 16 Nov 2021 21:14:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Eric Peers <epeers(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: device.h: Remove unused entries in struct bus
by Arthur Heymans (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Arthur Heymans. Hello Arthur Heymans, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/59364 to review the following change. Change subject: device.h: Remove unused entries in struct bus ...................................................................... device.h: Remove unused entries in struct bus Change-Id: I5ddb1779180a06d1feabf8bf13a44765c2f5efe9 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/include/device/device.h 1 file changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/59364/1 diff --git a/src/include/device/device.h b/src/include/device/device.h index 237d836..f770617 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -84,11 +84,8 @@ uint16_t secondary; /* secondary bus number */ uint16_t subordinate; /* max subordinate bus number */ unsigned char cap; /* PCi capability offset */ - uint32_t hcdn_reg; /* For HyperTransport link */ unsigned int reset_needed : 1; - unsigned int disable_relaxed_ordering : 1; - unsigned int ht_link_up : 1; unsigned int no_vga16 : 1; /* No support for 16-bit VGA decoding */ }; -- To view, visit https://review.coreboot.org/c/coreboot/+/59364 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ddb1779180a06d1feabf8bf13a44765c2f5efe9 Gerrit-Change-Number: 59364 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/intel/common: Update CPPCv3 Nominal Frequency entry
by Sridhar Siricilla (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Tim Wawrzynczak, Sugnan Prabhu S, Ravindra, Michael Niewöhner, Patrick Rudolph, Ravindra N. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57783 ) Change subject: cpu/intel/common: Update CPPCv3 Nominal Frequency entry ...................................................................... Patch Set 7: (1 comment) File src/cpu/intel/common/common_init.c: https://review.coreboot.org/c/coreboot/+/57783/comment/098afca4_792473f9 PS7, Line 136: CPPC_DWORD(0); > Uhm, tbh that sounds wrong... […] Thanks Michael/Tim for comments. I reformatted my patch set, so I will drop this patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/57783 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If39e5e4ac77a71b143cdb5f043fb398abb398ee3 Gerrit-Change-Number: 57783 Gerrit-PatchSet: 7 Gerrit-Owner: Ravindra <ravindra(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Ravindra <ravindra(a)intel.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Ravindra N <ravindra(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 16 Nov 2021 20:32:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: acpi/acpigen,soc/amd,cpu/inte: Refactor the code
by Sridhar Siricilla (Code Review) 16 Nov '21

16 Nov '21

Sridhar Siricilla has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/59125 ) Change subject: acpi/acpigen,soc/amd,cpu/inte: Refactor the code ...................................................................... Abandoned I reformatted my patchset, hence abandoning the patch. Thanks for review -- To view, visit https://review.coreboot.org/c/coreboot/+/59125 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2bdcf94973973dcf7b1ff915df6e23108c9b8ff9 Gerrit-Change-Number: 59125 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/common: Add CPU related APIs
by Sridhar Siricilla (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Nico Huber, Maulik V Vaghela, Sugnan Prabhu S, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59124 ) Change subject: soc/intel/common: Add CPU related APIs ...................................................................... Patch Set 2: (5 comments) File src/soc/intel/common/block/cpu/cpulib.c: https://review.coreboot.org/c/coreboot/+/59124/comment/b12d7569_893786d2 PS1, Line 190: int > looking at return statement at line 196 below, shouldn't this be "bool" ? Done https://review.coreboot.org/c/coreboot/+/59124/comment/b6f7b076_83b9d6ed PS1, Line 198: FALSE > in that way, you don't need if and else separately […] Ack https://review.coreboot.org/c/coreboot/+/59124/comment/c6320f5d_348d3552 PS1, Line 204: ecx > may be ? […] Ack https://review.coreboot.org/c/coreboot/+/59124/comment/63dfe7d4_3576a237 PS1, Line 301: (uint8_t) > you don't need this typecasting. […] I will do it separate patch. File src/soc/intel/common/block/include/intelblocks/cpulib.h: https://review.coreboot.org/c/coreboot/+/59124/comment/6fbac475_0d74f9d1 PS1, Line 144: Remove unnecessary line -- To view, visit https://review.coreboot.org/c/coreboot/+/59124 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I680f43952ab4abce6e342206688ad32814970a91 Gerrit-Change-Number: 59124 Gerrit-PatchSet: 2 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 16 Nov 2021 20:24:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel, soc/common: Add method to determine the cpu type mask
by build bot (Jenkins) (Code Review) 16 Nov '21

16 Nov '21

Attention is currently required from: Sridhar Siricilla, Tim Wawrzynczak, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59360 ) Change subject: soc/intel, soc/common: Add method to determine the cpu type mask ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/common/block/include/intelblocks/acpi.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133510): https://review.coreboot.org/c/coreboot/+/59360/comment/9ca3a72d_f69bbcaf PS1, Line 123: * It determins type (big or small) of cpu that is executing the function, and marks 'determins' may be misspelled - perhaps 'determines'? -- To view, visit https://review.coreboot.org/c/coreboot/+/59360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4ceb24d9bb1e808750bf618c29b2b9ea6d4191b Gerrit-Change-Number: 59360 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 16 Nov 2021 20:22:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2021