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Hello build bot (Jenkins), Francois Toguo Fotso, Tim Wawrzynczak, Patrick Rudolph,
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Change subject: soc/intel/alderlake: remove tmp bar assignment for cpu crashlog
......................................................................
soc/intel/alderlake: remove tmp bar assignment for cpu crashlog
When the cpu_cl_discovery is called, coreboot actually assigns a BAR
to cpu crashlog pci device. Hence, we don't need to assign a tmp BAR
for cpu crashlog pci device
BUG=b:195327879
TEST=Found BERT table is created and the tcss function is ok in depthcharge
Change-Id: Ib7e6772be51ec4f26ef31fed6cb2bddef8ffc6be
Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
---
M src/soc/intel/alderlake/crashlog.c
1 file changed, 2 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/59355/7
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EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59412 )
Change subject: mb/google/brya/var/felwinter: Add ALC5682I-VS codec support
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Since it's just the HID change, other ODMs have been doing this instead: https://review.coreboot. […]
I prefer keep in devicetree, I think FW config purpose is get rid of C code 👍 Otherwise we don't need to create this, right?
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I'd like you to reexamine a change. Please visit
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Change subject: mainboard/google/brya: Enable dev screen in bios-stage for Brask
......................................................................
mainboard/google/brya: Enable dev screen in bios-stage for Brask
Add Kconfig item ENABLE_TCSS_DISPLAY_DETECTION.
TEST=Build with the VBT provided in issue b:199490251. Check the dev screen in bios-stage.
BUG=b:199490251, b:206014054
Signed-off-by: Adam Liu <adam.liu(a)quanta.corp-partner.google.com>
Change-Id: I5f34be030a6d819a0e93a2d479c4ff41bb14cfe2
---
M src/mainboard/google/brya/Kconfig
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/59414/6
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59414 )
Change subject: mainboard/google/brya: Enable dev screen in bios-stage for Brask
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/google/brya/Kconfig:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133735):
https://review.coreboot.org/c/coreboot/+/59414/comment/fea9ba78_5efab8b5
PS5, Line 11: select ENABLE_TCSS_DISPLAY_DETECTION
trailing whitespace
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: mainboard/google/brya: Enable dev screen in bios-stage for Brask
......................................................................
mainboard/google/brya: Enable dev screen in bios-stage for Brask
Add Kconfig item ENABLE_TCSS_DISPLAY_DETECTION.
TEST=Build with the VBT provided in issue b:199490251. Check the dev screen in bios-stage.
BUG=b:199490251, b:206014054
Signed-off-by: Adam Liu <adam.liu(a)quanta.corp-partner.google.com>
Change-Id: I5f34be030a6d819a0e93a2d479c4ff41bb14cfe2
---
M src/mainboard/google/brya/Kconfig
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/59414/5
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David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59472 )
Change subject: mb/google/brya: Move cr50 configuration to variant
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59472/comment/652a3006_aa747d2d
PS1, Line 9: Brya schematic will swap TPM I2C with touchscreen I2C, so move into variant level.
> 72 characters wide for commit msg please
Done
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Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya: Move cr50 configuration to variant
......................................................................
mb/google/brya: Move cr50 configuration to variant
Brya schematic will swap TPM I2C with touchscreen I2C,
so move into variant level.
BUG=b:195853169
TEST=build pass.
Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com>
Change-Id: Ie5276527da135ec15045a81985ae006722871b0b
---
M src/mainboard/google/brya/variants/anahera/overridetree.cb
M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
M src/mainboard/google/brya/variants/brask/overridetree.cb
M src/mainboard/google/brya/variants/brya0/overridetree.cb
M src/mainboard/google/brya/variants/felwinter/overridetree.cb
M src/mainboard/google/brya/variants/gimble/overridetree.cb
M src/mainboard/google/brya/variants/kano/overridetree.cb
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/redrix/overridetree.cb
M src/mainboard/google/brya/variants/taeko/overridetree.cb
11 files changed, 65 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/59472/2
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: mainboard/google/brya: Enable dev screen in bios-stage for Brask
......................................................................
mainboard/google/brya: Enable dev screen in bios-stage for Brask
Add Kconfig item ENABLE_TCSS_DISPLAY_DETECTION.
TEST=Build with the VBT provided in issue b:199490251. Check the dev screen in bios-stage.
BUG=b:199490251, b:206014054
Signed-off-by: Adam Liu <adam.liu(a)quanta.corp-partner.google.com>
Change-Id: I5f34be030a6d819a0e93a2d479c4ff41bb14cfe2
---
M src/mainboard/google/brya/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/59414/4
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Andrey Pronin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59476 )
Change subject: src/security/vboot: Setup secure counter space in TPM NVRAM
......................................................................
Patch Set 1:
(1 comment)
File src/security/vboot/secdata_tpm.c:
https://review.coreboot.org/c/coreboot/+/59476/comment/19082f74_558b8da6
PS1, Line 368: rv = tlcl_read(index, &value, SECURE_COUNTER_SIZE);
> I don't think you should do anything there. […]
wait, we actually do something: https://review.coreboot.org/c/coreboot/+/23456/
the code has changed since, but we still have https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi…
but setup_secure_counter already calls define_space, so let's just rely on that. if for the counter we want to make sure it's readable, let's do 'increment' as a part of each setup_secure_counter(). w/o that the reads will fail (WRITTEN=false) - we can either handle it in the subsequent apps, or increment to make sure it's written when defining.
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