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Change subject: amdfwtool: Add APCB combo
......................................................................
Patch Set 12:
(1 comment)
File util/amdfwtool/amdfwtool.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133747):
https://review.coreboot.org/c/coreboot/+/58620/comment/2e10da5a_99aa58b2
PS12, Line 1617: combo_apcb_bk[combo_index].ins & 0xF, combo_apcb_bk[combo_index].filename);
line over 96 characters
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Change subject: amdfwtool: Move PSP padding into a loop for combo
......................................................................
Patch Set 20:
(1 comment)
File util/amdfwtool/amdfwtool.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133746):
https://review.coreboot.org/c/coreboot/+/58554/comment/ebfe5e79_4cbc72d9
PS20, Line 1566: do {
suspect code indent for conditional statements (8, 8)
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Change subject: mb/google/brya/var/felwinter: Add ALC5682I-VS codec support
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Our CL for another project :p https://review.coreboot.org/c/coreboot/+/58102
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Change subject: amdfwtool: Put soc name setting to fw.cfg from command line
......................................................................
Patch Set 13:
(1 comment)
File util/amdfwtool/data_parse.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133742):
https://review.coreboot.org/c/coreboot/+/58552/comment/dac4e099_306f3081
PS13, Line 519: cb_config->soc_id = identify_platform(&(oneline[match[2].rm_so]));
line over 96 characters
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Change subject: drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750
......................................................................
Set Ready For Review
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56773
to look at the new patch set (#42).
Change subject: amdfwtool: Add support for AMD's BIOS A/B recovery feature
......................................................................
amdfwtool: Add support for AMD's BIOS A/B recovery feature
The rom layout for A/B recovery:
EFS -> PSP L1 0x48 -> PSP L2 A -> BIOS L2 A
0x4A -> PSP L2 B -> BIOS L2 B
The coreboot doesn't implement the AMD's A/B recovery. This is only
for the ROM layout. To save some flash space, the entire B section can
be eliminated.
To enable A/B recovery in PSP layout, add "--recovery-ab" to
amdfwtool.
TEST=Majolica(Cezanne)
Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/amdfwtool.h
M util/amdfwtool/data_parse.c
3 files changed, 204 insertions(+), 66 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/56773/42
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: amdfwtool: Put soc name setting to fw.cfg from command line
......................................................................
amdfwtool: Put soc name setting to fw.cfg from command line
This is for future combo feature. Each entry in combo has its own
fw.cfg.
The soc_id in struct cb_config can only be available after the fw.cfg
is processed.
Change-Id: Ib0eead1f2156542ea03d58145f5ad67683bf9b52
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M src/mainboard/google/guybrush/variants/baseboard/amdfw.cfg
M src/soc/amd/cezanne/Makefile.inc
M src/soc/amd/cezanne/fw.cfg
M src/soc/amd/picasso/Makefile.inc
M src/soc/amd/picasso/fw.cfg
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/amd/stoneyridge/fw_cz.cfg
M src/soc/amd/stoneyridge/fw_st.cfg
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/amdfwtool.h
M util/amdfwtool/data_parse.c
11 files changed, 59 insertions(+), 63 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/58552/13
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Hello build bot (Jenkins), Zheng Bao,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: amdfwtool: Pack the PSP/BHD directory filling to functions
......................................................................
amdfwtool: Pack the PSP/BHD directory filling to functions
This two steps would be more complicated to handle more types of
APU. Extract them to functions and then we can treat
independently. More future cases can easily to be added.
Change-Id: I2625c8858605c990da2225a16036b80ae31032f6
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/amdfwtool.h
2 files changed, 46 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/59175/4
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Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59355 )
Change subject: soc/intel/alderlake: remove tmp bar assignment for cpu crashlog
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS6:
> It's just a PCI device like any other that has BARs that can be assigned by coreboot's resource allo […]
thanks, i guess i gave it too much thought on bar assignment.:)
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