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Change subject: src/mainboard/emulation/qemu-power9: require hb-mode=on
......................................................................
Patch Set 14:
(7 comments)
Patchset:
PS12:
> > The conditional isn't there to remove unused symbols in ramstage, it's to take change in addressin […]
Updated the patch to only define STACK twice (it's always used in prog_loaders.c and other files). Large conditional might have been an obvious response to warnings about regions being defined out of order that just stuck.
File src/mainboard/emulation/qemu-power9/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/57082/comment/af8958f8_9c415765
PS12, Line 24: STACK(0xa000000, 32K)
> I might be wrong but I haven't seen the stage entry move the stack pointer to this so this ends up n […]
Done
https://review.coreboot.org/c/coreboot/+/57082/comment/3124aed5_0a95d4c1
PS12, Line 27: FMAP_CACHE(0xa108000, 4K)
> gets migrated to cbmem.
Done
https://review.coreboot.org/c/coreboot/+/57082/comment/6f3feaa9_035edd6c
PS12, Line 28: CBFS_MCACHE(0xa109000, 8K)
> This gets migrated to cbmem.
Done
https://review.coreboot.org/c/coreboot/+/57082/comment/05504dc4_0888e3fd
PS12, Line 29: TIMESTAMP(0xa10b000, 4K)
> Is that not in cbmem in ramstage?
Done
https://review.coreboot.org/c/coreboot/+/57082/comment/8b4a55f4_2b9f4273
PS12, Line 30: CBFS_CACHE(0xa10c000, 512K)
> Not sure if needed in ramstage.
Done
https://review.coreboot.org/c/coreboot/+/57082/comment/2b878beb_470615d2
PS12, Line 31: PRERAM_CBMEM_CONSOLE(0xf918c000, 128K)
> not needed in ramstage
Done
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Hello build bot (Jenkins), Timothy Pearson, Ron Minnich,
I'd like you to reexamine a change. Please visit
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Change subject: src/arch/ppc64/*: pass FDT address to payload
......................................................................
src/arch/ppc64/*: pass FDT address to payload
It's available in %r3 in bootblock and needs to be passed first to
romstage, then to ramstage, where it's put into CMBEM to be read on
starting payload.
Change-Id: I0911f4b534c6f8cacfa057a5bad7576fec711637
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M src/arch/ppc64/boot.c
M src/arch/ppc64/bootblock_crt0.S
M src/commonlib/include/commonlib/cbmem_id.h
M src/mainboard/emulation/qemu-power9/memlayout.ld
4 files changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/57084/15
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I'd like you to reexamine a change. Please visit
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Change subject: src/mainboard/emulation/qemu-power9: require hb-mode=on
......................................................................
src/mainboard/emulation/qemu-power9: require hb-mode=on
"hb-mode" is a -machine flag for QEMU. "hb" stands for Hostboot, which
is OpenPower firmware created by IBM.
QEMU for PPC64 can run initial program in two different modes:
* hb-mode=off with load address 0x00000000
* hb-mode=on with load address 0x08000000
Real hardware always loads firmware at 0x08000000 and coreboot shouldn't
require a special build to be run on QEMU.
Memory layout is updated to reflect change of load address.
Change-Id: I1bdc97a095bd46fccc862985b3bd24f4fa5bc054
Signed-off-by: Yaroslav Kurlaev <yaroslav.kurlaev(a)3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M src/arch/ppc64/rom_media.c
M src/arch/ppc64/stages.c
M src/mainboard/emulation/qemu-power9/memlayout.ld
3 files changed, 33 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/57082/14
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Change subject: src/mainboard/emulation/qemu-power9: require hb-mode=on
......................................................................
Patch Set 13:
(1 comment)
Patchset:
PS12:
> The conditional isn't there to remove unused symbols in ramstage, it's to take change in addressing into account. I've added a comment which should explain what's going on and resolve all of your comments.
I don't really understand why just setting ramstage to the required offset won't work and redefining a lot of unused symbols is needed. Early stages don't need to know the ramstage symbol either, so I don't understand why you even need CPP in here.
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Change subject: ec/starlabs: Add standardised ITE EC support
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Change subject: mainboard/starlabs: Add StarBook Mk V
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Change subject: soc/intel/common/thermal: Allow thermal configuration over PMC
......................................................................
Patch Set 13:
(1 comment)
File src/soc/intel/common/block/thermal/thermal_pmc.c:
https://review.coreboot.org/c/coreboot/+/59209/comment/27f8c893_c65ac60b
PS13, Line 21: static uint8_t get_thermal_trip_temp(void)
> Would you mind make the get_thermal_trip_temp and pch_get_ltt_value in thermal_common. […]
Yes Eric, I will address this in follow up CL, hope that is okay with you. Its too much to keep on rebase the same sets of Cls 😕
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: crossgcc: Upgrade llvm to 13.0.0 version
......................................................................
crossgcc: Upgrade llvm to 13.0.0 version
Change-Id: I8c550d3528a5b1c891b318c08ecfba3a9255e69c
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M util/crossgcc/buildgcc
D util/crossgcc/sum/clang-12.0.0.src.tar.xz.cksum
A util/crossgcc/sum/clang-13.0.0.src.tar.xz.cksum
D util/crossgcc/sum/clang-tools-extra-12.0.0.src.tar.xz.cksum
A util/crossgcc/sum/clang-tools-extra-13.0.0.src.tar.xz.cksum
D util/crossgcc/sum/compiler-rt-12.0.0.src.tar.xz.cksum
A util/crossgcc/sum/compiler-rt-13.0.0.src.tar.xz.cksum
D util/crossgcc/sum/llvm-12.0.0.src.tar.xz.cksum
A util/crossgcc/sum/llvm-13.0.0.src.tar.xz.cksum
9 files changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/59400/2
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Change subject: crossgcc: Upgrade CMake to 3.22.0 version
......................................................................
crossgcc: Upgrade CMake to 3.22.0 version
Change-Id: I4272f72dd6ed686dbad5615a0ab44c8c632b5930
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M util/crossgcc/buildgcc
D util/crossgcc/sum/cmake-3.20.3.tar.gz.cksum
A util/crossgcc/sum/cmake-3.22.0.tar.gz.cksum
3 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/59399/2
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