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Change subject: util/sconfig: Expose apic devices
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> I agree with Raul there are probably different organizational ways to set this up, but I think they' […]
Yeah, I'm happy to see the magic devices gone.
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Change subject: mainboard/starlabs: Add StarBook Mk V
......................................................................
Patch Set 141:
(2 comments)
File src/mainboard/starlabs/labtop/Kconfig:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133921):
https://review.coreboot.org/c/coreboot/+/56088/comment/6e905bf4_c05c6dc4
PS141, Line 12: select NO_UART_ON_SUPERIO
'SUPERIO' may be misspelled - perhaps ''?
File src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-133921):
https://review.coreboot.org/c/coreboot/+/56088/comment/69385121_3bfe2b99
PS141, Line 58: LPC_IOE_SUPERIO_2E_2F |
'SUPERIO' may be misspelled - perhaps ''?
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Change subject: mainboard/starlabs: Add StarBook Mk V
......................................................................
Patch Set 141: Code-Review+2
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Change subject: soc/intel/tigerlake: Add config option for S3 ACPI
......................................................................
Patch Set 19:
(1 comment)
Patchset:
PS19:
> Generally speaking yes, although IIRC we have had occasions in the past that required changing the v […]
Hmmm, right... Well, we can simply provide `S0IX` (well, `/S0IX`) via acpigen 😄
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Change subject: cpu/intel/model_1067x: Use apic exposed in static.c directly
......................................................................
Patch Set 2: Code-Review+1
(3 comments)
File src/cpu/intel/model_1067x/model_1067x_init.c:
https://review.coreboot.org/c/coreboot/+/59317/comment/4fdd015e_14b49ea9
PS2, Line 37: conf &&
This check is no longer necessary, `conf` can't be null.
https://review.coreboot.org/c/coreboot/+/59317/comment/ee6f435f_1d0748a4
PS2, Line 41: conf &&
This check is no longer necessary, `conf` can't be null.
https://review.coreboot.org/c/coreboot/+/59317/comment/f0c34af6_a0b545d7
PS2, Line 94: conf &&
This check is no longer necessary, `conf` can't be null.
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Change subject: cpu/haswell/*.c: Use static.c exposed lapic 0
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Tested this successfully on Asrock B85M Pro4 with an i7-4770S. I specified a (non-zero) TCC offset in the devicetree and printed it from the `configure_thermal_target()` function. All 8 threads printed the TCC offset value from the devicetree.
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Change subject: cpu/haswell/*.c: Use static.c exposed lapic 0
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
File src/cpu/intel/haswell/haswell_init.c:
https://review.coreboot.org/c/coreboot/+/59314/comment/55c415d4_c9231895
PS2, Line 178:
: struct cpu_vr_config vr_config = { 0 };
: msr_t msr;
:
: const struct cpu_intel_haswell_config *conf = config_of_lapic();
: vr_config = conf->vr_config;
Now that we always get the devicetree settings, this can be simplified:
const struct cpu_intel_haswell_config *conf = config_of_lapic();
const struct cpu_vr_config vr_config = conf->vr_config;
msr_t msr;
Or simply get rid of the `vr_config` local variable.
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Change subject: mainboard/starlabs: Add StarBook Mk V
......................................................................
Patch Set 141:
(1 comment)
File src/mainboard/starlabs/labtop/Kconfig:
https://review.coreboot.org/c/coreboot/+/56088/comment/8cf998e3_3254dffc
PS138, Line 52: default "tgl"
> default "tgl" if !EC_STARLABS_MERLIN
Done
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