Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Angel Pons, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59509 )
Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability
......................................................................
Patch Set 5:
(2 comments)
File src/soc/intel/common/block/include/intelblocks/thermal.h:
https://review.coreboot.org/c/coreboot/+/59509/comment/2be4d0ec_782901d9
PS4, Line 20: #define GET_LTT_VALUE(x) ((x + 10) << 20 | (x + 5) << 10 | x)
> Please wrap `x` in parentheses to avoid operation order problems: […]
Ack
File src/soc/intel/common/block/thermal/Kconfig:
https://review.coreboot.org/c/coreboot/+/59509/comment/2a81e1f3_f7bb1d71
PS4, Line 7: config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV
: bool
: default n
: select SOC_INTEL_COMMON_BLOCK_THERMAL
: help
: This option allows to configure PCH thermal registers using Thermal PCI device
: for chipsets till Ice Lake PCH.
:
: config SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
: bool
: default n
: select SOC_INTEL_COMMON_BLOCK_THERMAL
: help
: This option allows to configure PCH thermal registers using PMC PWRMBASE
: for chipsets since Tiger Lake PCH.
> This is good idea to avoid user to select the both unknowingly for any platform.
Ack
--
To view, visit https://review.coreboot.org/c/coreboot/+/59509
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I14df5145629ef03f358b98e824bca6a5b8ebdfc6
Gerrit-Change-Number: 59509
Gerrit-PatchSet: 5
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com>
Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Mon, 22 Nov 2021 10:23:58 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>
Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-MessageType: comment
Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Patrick Rudolph.
Subrata Banik has uploaded a new patch set (#5) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/59509 )
Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability
......................................................................
soc/intel/common/thermal: Refactor thermal block to improve reusability
This patch moves common thermal API between chipsets
with thermal device as PCI device and thermal device behind PMC
into common file (thermal_common.c).
Introduce CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV to let SoC
Kconfig to select as applicable for underlying chipset.
+------------------------------------------------------+--------------+
| Thermal Kconfig | SoC |
+------------------------------------------------------+--------------+
| CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV | SKL/KBL, CNL |
| | till ICL |
+------------------------------------------------------+--------------+
| CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC | TGL onwards |
| | ICL |
+------------------------------------------------------+--------------+
Either of these two Kconfig internally selects
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL to use common thermal APIs.
BUG=b:193774296
TEST=Able to build and boot hatch and adlrvp platform.
Change-Id: I14df5145629ef03f358b98e824bca6a5b8ebdfc6
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/common/block/include/intelblocks/thermal.h
M src/soc/intel/common/block/thermal/Kconfig
M src/soc/intel/common/block/thermal/Makefile.inc
D src/soc/intel/common/block/thermal/thermal.c
A src/soc/intel/common/block/thermal/thermal_common.c
A src/soc/intel/common/block/thermal/thermal_pci.c
M src/soc/intel/common/block/thermal/thermal_pmc.c
M src/soc/intel/icelake/Kconfig
M src/soc/intel/skylake/Kconfig
10 files changed, 110 insertions(+), 110 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/59509/5
--
To view, visit https://review.coreboot.org/c/coreboot/+/59509
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I14df5145629ef03f358b98e824bca6a5b8ebdfc6
Gerrit-Change-Number: 59509
Gerrit-PatchSet: 5
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newpatchset
Attention is currently required from: Tim Wawrzynczak.
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59541 )
Change subject: mb/google/brya/var/redrix: disabled autonomous GPIO power management
......................................................................
Set Ready For Review
--
To view, visit https://review.coreboot.org/c/coreboot/+/59541
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic43345e477c4e434947f3e74feb7b8e37df548cd
Gerrit-Change-Number: 59541
Gerrit-PatchSet: 1
Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Comment-Date: Mon, 22 Nov 2021 10:01:41 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59541 )
Change subject: mb/google/brya/var/redrix: disabled autonomous GPIO power management
......................................................................
mb/google/brya/var/redrix: disabled autonomous GPIO power management
Used H1 firmware where the last version number is 0.0.22, 0.3.22 or
less to production that will need to disable autonomous GPIO power
management and then can get H1 version by gsctool -a -f -M
BUG=b:200918380
TEST=USE="project_redrix emerge-brya coreboot" and verify it builds
without error.
Change-Id: Ic43345e477c4e434947f3e74feb7b8e37df548cd
Signed-off-by: MAULIK V VAGHELA <maulik.v.vaghela(a)intel.com>
---
M src/mainboard/google/brya/variants/redrix/overridetree.cb
1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/59541/1
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index e4119f6..c1581b0 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -33,6 +33,17 @@
chip soc/intel/alderlake
register "SaGv" = "SaGv_Enabled"
+ # This disabled autonomous GPIO power management, otherwise
+ # old cr50 FW only supports short pulses; need to clarify
+ # the minimum PCH IRQ pulse width with Intel, b/180111628
+ register "gpio_override_pm" = "1"
+ register "gpio_pm[COMM_0]" = "0"
+ register "gpio_pm[COMM_1]" = "0"
+ register "gpio_pm[COMM_2]" = "0"
+ register "gpio_pm[COMM_3]" = "0"
+ register "gpio_pm[COMM_4]" = "0"
+ register "gpio_pm[COMM_5]" = "0"
+
register "CnviBtAudioOffload" = "true"
# FIVR RFI Spread Spectrum 6%
register "FivrSpreadSpectrum" = "FIVR_SS_6"
--
To view, visit https://review.coreboot.org/c/coreboot/+/59541
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic43345e477c4e434947f3e74feb7b8e37df548cd
Gerrit-Change-Number: 59541
Gerrit-PatchSet: 1
Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-MessageType: newchange
Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59509 )
Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/thermal/Kconfig:
https://review.coreboot.org/c/coreboot/+/59509/comment/2f2ea39c_c0fb0bcb
PS4, Line 7: config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV
: bool
: default n
: select SOC_INTEL_COMMON_BLOCK_THERMAL
: help
: This option allows to configure PCH thermal registers using Thermal PCI device
: for chipsets till Ice Lake PCH.
:
: config SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
: bool
: default n
: select SOC_INTEL_COMMON_BLOCK_THERMAL
: help
: This option allows to configure PCH thermal registers using PMC PWRMBASE
: for chipsets since Tiger Lake PCH.
> Would be good to make these two Kconfig options mutually exclusive. […]
This is good idea to avoid user to select the both unknowingly for any platform.
--
To view, visit https://review.coreboot.org/c/coreboot/+/59509
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I14df5145629ef03f358b98e824bca6a5b8ebdfc6
Gerrit-Change-Number: 59509
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Comment-Date: Mon, 22 Nov 2021 09:20:15 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-MessageType: comment