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Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59527 )
Change subject: mb/lenovo: Enable MEI on Sandy Bridge ThinkPads
......................................................................
Patch Set 3:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59527/comment/188760b8_d092a6df
PS2, Line 7: Sandy Bridge
> Strictly speaking, this should be `Cougar Point`, the PCH. […]
I know. I even did it on T420, a long time ago. But it became a common practice to refer to xx20 series of ThinkPads as "Sandy Bridge ThinkPads", and to xx30 series as "Ivy Bridge ThinkPads". Even our documentation does so (https://doc.coreboot.org/mainboard/index.html#lenovo). So I decided to keep the style and be consistent.
https://review.coreboot.org/c/coreboot/+/59527/comment/5ba2da23_a99d880e
PS2, Line 12: 0793afe9
> commit 0793afe9 (mb/lenovo/x220: disable ME)
Done
https://review.coreboot.org/c/coreboot/+/59527/comment/ed3d8ca0_b604cb70
PS2, Line 12: 0793afe9
> commit 0793afe9 (mb/lenovo/x220: disable ME)
Done
https://review.coreboot.org/c/coreboot/+/59527/comment/08c6df92_7dfdfb73
PS2, Line 13: today
> With which Linux kernel version?
Done
https://review.coreboot.org/c/coreboot/+/59527/comment/fd250a69_2bd6995a
PS2, Line 15: Also:
: - it breaks the me_disable feature,
: - we already have a Kconfig option to hide MEI in case of errors,
: - it will be hidden on disabled, recovery, firmware update paths anyway.
> I'd convert this list of reasons into a paragraph.
Done
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Hello build bot (Jenkins), Angel Pons, Alexander Couzens, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59527
to look at the new patch set (#3).
Change subject: mb/lenovo: Enable MEI on Sandy Bridge ThinkPads
......................................................................
mb/lenovo: Enable MEI on Sandy Bridge ThinkPads
It was already enabled on T520 and L520, but disabled on X220, T420 and
T420s.
On X220, it was disabled by commit 0793afe9 (mb/lenovo/x220: disable ME).
I can't reproduce those issues today on linux 4.4 and linux 5.13.
Also, it breaks the me_disable feature, we already have a Kconfig option
to hide MEI in case of errors, and it will be hidden on disabled, recovery,
firmware update paths anyway.
Change-Id: I8e6d067a9c728443d00df541ac7a9a878df58b6a
Signed-off-by: Evgeny Zinoviev <me(a)ch1p.io>
---
M src/mainboard/lenovo/t420/devicetree.cb
M src/mainboard/lenovo/t420s/devicetree.cb
M src/mainboard/lenovo/x220/devicetree.cb
3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/59527/3
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59355 )
Change subject: soc/intel/alderlake: remove tmp bar assignment for cpu crashlog
......................................................................
Patch Set 9: Code-Review+2
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59509 )
Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/common/block/thermal/Kconfig:
https://review.coreboot.org/c/coreboot/+/59509/comment/3aa0c5a9_ef870a22
PS4, Line 7: config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV
: bool
: default n
: select SOC_INTEL_COMMON_BLOCK_THERMAL
: help
: This option allows to configure PCH thermal registers using Thermal PCI device
: for chipsets till Ice Lake PCH.
:
: config SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
: bool
: default n
: select SOC_INTEL_COMMON_BLOCK_THERMAL
: help
: This option allows to configure PCH thermal registers using PMC PWRMBASE
: for chipsets since Tiger Lake PCH.
> Ack
@Angel, looks like its being considered as a recursive dependency.
Can you please take a look at the latest patch?
src/soc/intel/common/block/thermal/Kconfig:7:error: recursive dependency detected!
src/soc/intel/common/block/thermal/Kconfig:7: symbol SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV depends on SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
src/soc/intel/common/block/thermal/Kconfig:16: symbol SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC depends on SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV
For a resolution refer to Documentation/kbuild/kconfig-language.rst
subsection "Kconfig recursive dependency limitations"
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Subrata Banik has uploaded a new patch set (#6) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/59509 )
Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability
......................................................................
soc/intel/common/thermal: Refactor thermal block to improve reusability
This patch moves common thermal API between chipsets
with thermal device as PCI device and thermal device behind PMC
into common file (thermal_common.c).
Introduce CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV to let SoC
Kconfig to select as applicable for underlying chipset.
+------------------------------------------------------+--------------+
| Thermal Kconfig | SoC |
+------------------------------------------------------+--------------+
| CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV | SKL/KBL, CNL |
| | till ICL |
+------------------------------------------------------+--------------+
| CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC | TGL onwards |
| | ICL |
+------------------------------------------------------+--------------+
Either of these two Kconfig internally selects
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL to use common thermal APIs.
BUG=b:193774296
TEST=Able to build and boot hatch and adlrvp platform.
Change-Id: I14df5145629ef03f358b98e824bca6a5b8ebdfc6
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/common/block/include/intelblocks/thermal.h
M src/soc/intel/common/block/thermal/Kconfig
M src/soc/intel/common/block/thermal/Makefile.inc
D src/soc/intel/common/block/thermal/thermal.c
A src/soc/intel/common/block/thermal/thermal_common.c
A src/soc/intel/common/block/thermal/thermal_pci.c
M src/soc/intel/common/block/thermal/thermal_pmc.c
M src/soc/intel/icelake/Kconfig
M src/soc/intel/skylake/Kconfig
10 files changed, 109 insertions(+), 110 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/59509/6
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