coreboot-gerrit November 2021

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Change in coreboot[master]: soc/intel/common: Add CPU related APIs
by Sridhar Siricilla (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Nico Huber, Maulik V Vaghela, Sugnan Prabhu S, Sridhar Siricilla, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Nico Huber, Maulik V Vaghela, Sugnan Prabhu S, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59124 to look at the new patch set (#3). Change subject: soc/intel/common: Add CPU related APIs ...................................................................... soc/intel/common: Add CPU related APIs The patch defines below APIs : cpu_is_hybrid_supported() : Check whether CPU is hybrid CPU or not. cpu_get_bus_frequency() : Get CPU's bus frequency cpu_get_max_non_turbo_ratio() : Get CPU's max non-turbo ration cpu_get_cpu_typ() : Get CPU type. The function must be called if executing CPU is hybrid. TEST=Verified the APIs on the Brya board Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I680f43952ab4abce6e342206688ad32814970a91 --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h 2 files changed, 69 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/59124/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59124 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I680f43952ab4abce6e342206688ad32814970a91 Gerrit-Change-Number: 59124 Gerrit-PatchSet: 3 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/beetley: Enable GEO_SAR_ENABLE for beetley
by Weimin Wu (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Henry Sun, Karthik Ramasubramanian, Wizard Shen. Weimin Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59544 ) Change subject: mb/google/dedede/var/beetley: Enable GEO_SAR_ENABLE for beetley ...................................................................... Patch Set 3: Code-Review-1 (1 comment) Patchset: PS3: Because Blipper and Beetley use same BIOS，please conform that this SAR values match two project. -- To view, visit https://review.coreboot.org/c/coreboot/+/59544 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib1682cdafe1b6ed7cc0cf23624f83d2e5bbfb92e Gerrit-Change-Number: 59544 Gerrit-PatchSet: 3 Gerrit-Owner: Wizard Shen <shenhu5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-CC: Krystal Han <hanlijing(a)huaqin.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Wizard Shen <shenhu5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 24 Nov 2021 12:00:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: sb/intel/lynxpoint: Drop typedefs of enum type
by Angel Pons (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Patrick Rudolph. Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59620 ) Change subject: sb/intel/lynxpoint: Drop typedefs of enum type ...................................................................... sb/intel/lynxpoint: Drop typedefs of enum type There's no need to use typedefs for enum types. Get rid of it. Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical. Change-Id: I830d95018b33fe6ab7e2c37ebf15bb1df6ceec38 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/southbridge/intel/lynxpoint/me.c M src/southbridge/intel/lynxpoint/me.h 2 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/59620/1 diff --git a/src/southbridge/intel/lynxpoint/me.c b/src/southbridge/intel/lynxpoint/me.c index b56d1d8..9196fb3 100644 --- a/src/southbridge/intel/lynxpoint/me.c +++ b/src/southbridge/intel/lynxpoint/me.c @@ -596,9 +596,9 @@ } /* Determine the path that we should take based on ME status */ -static me_bios_path intel_me_path(struct device *dev) +static enum me_bios_path intel_me_path(struct device *dev) { - me_bios_path path = ME_DISABLE_BIOS_PATH; + enum me_bios_path path = ME_DISABLE_BIOS_PATH; struct me_hfs hfs; struct me_hfs2 hfs2; @@ -879,7 +879,7 @@ static void intel_me_init(struct device *dev) { struct southbridge_intel_lynxpoint_config *config = dev->chip_info; - me_bios_path path = intel_me_path(dev); + enum me_bios_path path = intel_me_path(dev); struct me_bios_payload mbp_data; /* Do initial setup and determine the BIOS path */ diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h index dfc8a564..cf797f3 100644 --- a/src/southbridge/intel/lynxpoint/me.h +++ b/src/southbridge/intel/lynxpoint/me.h @@ -303,14 +303,14 @@ u8 reset_type; } __packed; -typedef enum { +enum me_bios_path { ME_NORMAL_BIOS_PATH, ME_S3WAKE_BIOS_PATH, ME_ERROR_BIOS_PATH, ME_RECOVERY_BIOS_PATH, ME_DISABLE_BIOS_PATH, ME_FIRMWARE_UPDATE_BIOS_PATH, -} me_bios_path; +}; /* Defined in me_status.c for both romstage and ramstage */ void intel_me_status(struct me_hfs *hfs, struct me_hfs2 *hfs2); -- To view, visit https://review.coreboot.org/c/coreboot/+/59620 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I830d95018b33fe6ab7e2c37ebf15bb1df6ceec38 Gerrit-Change-Number: 59620 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: sb/intel/lynxpoint: Drop typedefs of struct types
by Angel Pons (Code Review) 24 Nov '21

24 Nov '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59619 ) Change subject: sb/intel/lynxpoint: Drop typedefs of struct types ...................................................................... sb/intel/lynxpoint: Drop typedefs of struct types There's no need to use typedefs for struct types. Get rid of them. Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical. Change-Id: I109bd690500a9f03b9da0fd72044be79abf660d3 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/southbridge/intel/lynxpoint/me.c M src/southbridge/intel/lynxpoint/me.h 2 files changed, 61 insertions(+), 61 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/59619/1 diff --git a/src/southbridge/intel/lynxpoint/me.c b/src/southbridge/intel/lynxpoint/me.c index c2f1db2..b56d1d8 100644 --- a/src/southbridge/intel/lynxpoint/me.c +++ b/src/southbridge/intel/lynxpoint/me.c @@ -452,7 +452,7 @@ } } -static void me_print_fw_version(mbp_fw_version_name *vers_name) +static void me_print_fw_version(struct mbp_fw_version_name *vers_name) { if (!vers_name) { printk(BIOS_ERR, "ME: mbp missing version report\n"); @@ -471,7 +471,7 @@ } /* Get ME Firmware Capabilities */ -static int mkhi_get_fwcaps(mbp_mefwcaps *cap) +static int mkhi_get_fwcaps(struct mbp_mefwcaps *cap) { u32 rule_id = 0; struct me_fwcaps cap_msg; @@ -491,9 +491,9 @@ } /* Get ME Firmware Capabilities */ -static void me_print_fwcaps(mbp_mefwcaps *cap) +static void me_print_fwcaps(struct mbp_mefwcaps *cap) { - mbp_mefwcaps local_caps; + struct mbp_mefwcaps local_caps; if (!cap) { cap = &local_caps; printk(BIOS_ERR, "ME: mbp missing fwcaps report\n"); @@ -747,7 +747,7 @@ } struct mbp_payload { - mbp_header header; + struct mbp_header header; u32 data[0]; }; @@ -757,9 +757,9 @@ * Return -1 to indicate a problem (give up) * Return 0 to indicate success (send LOCK+EOP) */ -static int intel_me_read_mbp(me_bios_payload *mbp_data, struct device *dev) +static int intel_me_read_mbp(struct me_bios_payload *mbp_data, struct device *dev) { - mbp_header mbp_hdr; + struct mbp_header mbp_hdr; u32 me2host_pending; struct mei_csr host; struct me_hfs2 hfs2; @@ -826,7 +826,7 @@ } /* Setup the pointers in the me_bios_payload structure. */ for (i = 0; i < mbp->header.mbp_size - 1;) { - mbp_item_header *item = (void *)&mbp->data[i]; + struct mbp_item_header *item = (void *)&mbp->data[i]; switch (MBP_MAKE_IDENT(item->app_id, item->item_id)) { case MBP_IDENT(KERNEL, FW_VER): @@ -880,7 +880,7 @@ { struct southbridge_intel_lynxpoint_config *config = dev->chip_info; me_bios_path path = intel_me_path(dev); - me_bios_payload mbp_data; + struct me_bios_payload mbp_data; /* Do initial setup and determine the BIOS path */ printk(BIOS_NOTICE, "ME: BIOS path: %s\n", me_bios_path_values[path]); diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h index d908e5b..dfc8a564 100644 --- a/src/southbridge/intel/lynxpoint/me.h +++ b/src/southbridge/intel/lynxpoint/me.h @@ -353,27 +353,27 @@ #define MBP_IDENT(appid, item) \ MBP_MAKE_IDENT(MBP_APPID_##appid, MBP_##appid##_##item##_ITEM) -typedef struct { +struct mbp_header { u32 mbp_size : 8; u32 num_entries : 8; u32 rsvd : 16; -} __packed mbp_header; +} __packed; -typedef struct { +struct mbp_item_header { u32 app_id : 8; u32 item_id : 8; u32 length : 8; u32 rsvd : 8; -} __packed mbp_item_header; +} __packed; -typedef struct { +struct mbp_fw_version_name { u32 major_version : 16; u32 minor_version : 16; u32 hotfix_version : 16; u32 build_version : 16; -} __packed mbp_fw_version_name; +} __packed; -typedef struct { +struct mbp_mefwcaps { u32 full_net : 1; u32 std_net : 1; u32 manageability : 1; @@ -393,19 +393,19 @@ u32 reserved_4 : 1; u32 wlan : 1; u32 reserved_5 : 8; -} __packed mbp_mefwcaps; +} __packed; -typedef struct { +struct mbp_rom_bist_data { u16 device_id; u16 fuse_test_flags; u32 umchid[4]; -} __packed mbp_rom_bist_data; +} __packed; -typedef struct { +struct mbp_platform_key { u32 key[8]; -} mbp_platform_key; +}; -typedef struct { +struct mbp_me_firmware_type { u32 mobile: 1; u32 desktop: 1; u32 server: 1; @@ -417,70 +417,70 @@ u32 image_type: 4; u32 brand: 4; u32 rsvd1: 16; -} __packed mbp_me_firmware_type; +} __packed; -typedef struct { - mbp_me_firmware_type rule_data; - u8 available; -} mbp_plat_type; +struct mbp_plat_type { + struct mbp_me_firmware_type rule_data; + u8 available; +}; -typedef struct { +struct icc_address_mask { u16 icc_start_address; u16 mask; -} __packed icc_address_mask; +} __packed; -typedef struct { - u8 num_icc_profiles; - u8 icc_profile_soft_strap; - u8 icc_profile_index; - u8 reserved; - u32 icc_reg_bundles; - icc_address_mask icc_address_mask[0]; -} __packed mbp_icc_profile; +struct mbp_icc_profile { + u8 num_icc_profiles; + u8 icc_profile_soft_strap; + u8 icc_profile_index; + u8 reserved; + u32 icc_reg_bundles; + struct icc_address_mask icc_address_mask[0]; +} __packed; -typedef struct { +struct tdt_state_flag { u16 lock_state : 1; u16 authenticate_module : 1; u16 s3authentication : 1; u16 flash_wear_out : 1; u16 flash_variable_security : 1; u16 reserved : 11; -} __packed tdt_state_flag; +} __packed; -typedef struct { - u8 state; - u8 last_theft_trigger; - tdt_state_flag flags; -} __packed mbp_at_state; +struct mbp_at_state { + u8 state; + u8 last_theft_trigger; + struct tdt_state_flag flags; +} __packed; -typedef struct { +struct mbp_plat_time { u32 wake_event_mrst_time_ms; u32 mrst_pltrst_time_ms; u32 pltrst_cpurst_time_ms; -} __packed mbp_plat_time; +} __packed; -typedef struct { +struct mbp_nfc_data { u32 device_type : 2; u32 reserved : 30; -} __packed mbp_nfc_data; +} __packed; -typedef struct { - mbp_fw_version_name *fw_version_name; - mbp_mefwcaps *fw_capabilities; - mbp_rom_bist_data *rom_bist_data; - mbp_platform_key *platform_key; - mbp_plat_type *fw_plat_type; - mbp_icc_profile *icc_profile; - mbp_at_state *at_state; - u32 *mfsintegrity; - mbp_plat_time *plat_time; - mbp_nfc_data *nfc_data; -} me_bios_payload; +struct me_bios_payload { + struct mbp_fw_version_name *fw_version_name; + struct mbp_mefwcaps *fw_capabilities; + struct mbp_rom_bist_data *rom_bist_data; + struct mbp_platform_key *platform_key; + struct mbp_plat_type *fw_plat_type; + struct mbp_icc_profile *icc_profile; + struct mbp_at_state *at_state; + u32 *mfsintegrity; + struct mbp_plat_time *plat_time; + struct mbp_nfc_data *nfc_data; +}; struct me_fwcaps { u32 id; u8 length; - mbp_mefwcaps caps_sku; + struct mbp_mefwcaps caps_sku; u8 reserved[3]; } __packed; -- To view, visit https://review.coreboot.org/c/coreboot/+/59619 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I109bd690500a9f03b9da0fd72044be79abf660d3 Gerrit-Change-Number: 59619 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/inteltool: Add support for Tiger Lake chips detection and GPIOs
by Angel Pons (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Felix Singer, Wonkyu Kim, Michał Żygowski, Ravishankar Sarawadi, Stefan Reinauer, Michael Niewöhner. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56171 ) Change subject: util/inteltool: Add support for Tiger Lake chips detection and GPIOs ...................................................................... Patch Set 4: Code-Review+1 (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56171/comment/9827ca37_ad5522b6 PS4, Line 9: Tiger Lake nit: Tiger Lake LP File util/inteltool/gpio_names/tigerlake.h: PS4: Hmmm, shouldn't this have a license? Looks like other headers in gpio_names don't have a license either. https://review.coreboot.org/c/coreboot/+/56171/comment/8a5c8e42_5cc78f8e PS4, Line 70: nit: drop blank line https://review.coreboot.org/c/coreboot/+/56171/comment/d2129a3c_f970422c PS4, Line 300: /* : * GPP_A group does not start right after GPP_T group and GPP_T group does not : * start right after GPP_B. Fill the holes with Reserved on both sides. : */ Well, to me it looks like some GPP_T GPIOs are undocumented. https://review.coreboot.org/c/coreboot/+/56171/comment/5988c3d9_221fea2e PS4, Line 777: nit: drop blank line File util/inteltool/pcr.c: https://review.coreboot.org/c/coreboot/+/56171/comment/02fba84a_e45be75e PS4, Line 108: case PCI_DEVICE_ID_INTEL_Q570: : case PCI_DEVICE_ID_INTEL_Z590: : case PCI_DEVICE_ID_INTEL_H570: : case PCI_DEVICE_ID_INTEL_B560: : case PCI_DEVICE_ID_INTEL_H510: : case PCI_DEVICE_ID_INTEL_WM590: : case PCI_DEVICE_ID_INTEL_QM580: : case PCI_DEVICE_ID_INTEL_HM570: : case PCI_DEVICE_ID_INTEL_C252: : case PCI_DEVICE_ID_INTEL_C256: : case PCI_DEVICE_ID_INTEL_W580: TGL-H should be handled the same way as TGL-LP -- To view, visit https://review.coreboot.org/c/coreboot/+/56171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6071a999be9e8a372997db0369218f297e579d08 Gerrit-Change-Number: 56171 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Wonkyu Kim Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Wonkyu Kim Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 24 Nov 2021 11:43:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC]Documentation: Plan some deprecations / mandatory features
by Arthur Heymans (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Patrick Georgi. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59618 ) Change subject: [RFC]Documentation: Plan some deprecations / mandatory features ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59618/comment/cfab1145_ac5cd706 PS1, Line 7: depreciations > nit: it's deprecations > > (See https://www.dailywritingtips.com/depreciate-vs-deprecate/, look for "Computer science") Thanks. done -- To view, visit https://review.coreboot.org/c/coreboot/+/59618 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7dcf9343b999d435a3a1cdac6bb5f680ed02d388 Gerrit-Change-Number: 59618 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Comment-Date: Wed, 24 Nov 2021 11:25:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <patrick(a)coreboot.org> Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC]Documentation: Plan some deprecations / mandatory features
by Paul Menzel (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59618 ) Change subject: [RFC]Documentation: Plan some deprecations / mandatory features ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: Let’s discuss the two things on the mailing list. File Documentation/releases/coreboot-4.16-relnotes.md: https://review.coreboot.org/c/coreboot/+/59618/comment/ea946b5f_c9b9bd6d PS1, Line 72: PCENGINES_APU1_ : PCENGINES_APU2_ : PCENGINES_APU3_ : PCENGINES_APU4_ : PCENGINES_APU5_ : PCENGINES_APU1 : PCENGINES_APU2 : PCENGINES_APU3 : PCENGINES_APU4 : PCENGINES_APU5 Or those the same? -- To view, visit https://review.coreboot.org/c/coreboot/+/59618 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7dcf9343b999d435a3a1cdac6bb5f680ed02d388 Gerrit-Change-Number: 59618 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Comment-Date: Wed, 24 Nov 2021 11:25:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC]Documentation: Plan some deprecations / mandatory features
by Arthur Heymans (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Arthur Heymans. Hello Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59618 to look at the new patch set (#2). Change subject: [RFC]Documentation: Plan some deprecations / mandatory features ...................................................................... [RFC]Documentation: Plan some deprecations / mandatory features Some old codepaths are becoming rusty and a burden to the community, so it's best to migrate platforms to the newer codebase or deprecate them. When should this happen? After the 4.16 release? TODO: Have a discussion on the ML. Change-Id: I7dcf9343b999d435a3a1cdac6bb5f680ed02d388 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Documentation/releases/coreboot-4.16-relnotes.md 1 file changed, 65 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/59618/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59618 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7dcf9343b999d435a3a1cdac6bb5f680ed02d388 Gerrit-Change-Number: 59618 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/elkhartlake: Introduce Intel PSE
by Paul Menzel (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Arthur Heymans, Maulik V Vaghela, Angel Pons, Subrata Banik, Michael Niewöhner, Patrick Rudolph, Nico Huber, Martin Roth, Mario Scheithauer, Lean Sheng Tan, Werner Zeh, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55367 ) Change subject: soc/intel/elkhartlake: Introduce Intel PSE ...................................................................... Patch Set 56: (1 comment) File src/soc/intel/elkhartlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/55367/comment/d9f5ad17_6528695a PS52, Line 129: /* Set the ownership of these devices to PSE */ : params->PchPseDmaEnable[0] = PSE_Owned; : params->PchPseUartEnable[2] = PSE_Owned; : params->PchPseHsuartEnable[2] = PSE_Owned; : params->PchPseI2cEnable[2] = PSE_Owned; : params->PchPseTimedGpioEnable[0] = PSE_Owned; : params->PchPseTimedGpioEnable[1] = PSE_Owned; : /* Disable PSE DMA Sideband Interrupt for DMA 0 */ : params->PchPseDmaSbInterruptEnable[0] = 0; : /* Set the log output to PSE UART 2 */ : params->PchPseLogOutputChannel = 3; > No worries, thanks for your time. […] Can you please mention the issue clearly in the commit message? -- To view, visit https://review.coreboot.org/c/coreboot/+/55367 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifea08fb82fea18ef66bab04b3ce378e79a0afbf7 Gerrit-Change-Number: 55367 Gerrit-PatchSet: 56 Gerrit-Owner: Lean Sheng Tan Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Lean Sheng Tan Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 24 Nov 2021 11:24:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Lean Sheng Tan Gerrit-MessageType: comment

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Change in coreboot[master]: [RFC]Documentation: Plan some depreciations / mandatory features
by Patrick Georgi (Code Review) 24 Nov '21

24 Nov '21

Attention is currently required from: Arthur Heymans. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59618 ) Change subject: [RFC]Documentation: Plan some depreciations / mandatory features ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59618/comment/532a2dd5_20cd8919 PS1, Line 7: depreciations nit: it's deprecations (See https://www.dailywritingtips.com/depreciate-vs-deprecate/, look for "Computer science") -- To view, visit https://review.coreboot.org/c/coreboot/+/59618 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7dcf9343b999d435a3a1cdac6bb5f680ed02d388 Gerrit-Change-Number: 59618 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 24 Nov 2021 11:23:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2021