coreboot-gerrit October 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/common: Add PMC IPC commands for FIVR control
by 9elements QA (Code Review) 01 Oct '21

01 Oct '21

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57922 ) Change subject: soc/intel/common: Add PMC IPC commands for FIVR control ...................................................................... Patch Set 5: Automatic boot test returned (PASS/FAIL/TOTAL): 8 / 1 / 9 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/80425 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/80424 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/80423 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/80422 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/80421 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/80420 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/80419 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/80418 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/80417 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/57922 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d08bb71f7ea5da7614c68fc0ce4edf9aef59baa Gerrit-Change-Number: 57922 Gerrit-PatchSet: 5 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 01 Oct 2021 16:29:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/{common,skl,dnv}: set ACPI_FADT_PLATFORM_CLOCK based on Kco...
by Michael Niewöhner (Code Review) 01 Oct '21

01 Oct '21

Attention is currently required from: Felix Singer, Furquan Shaikh, Mariusz Szafrański, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph, Lance Zhao, Nico Huber, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57934 ) Change subject: soc/intel/{common,skl,dnv}: set ACPI_FADT_PLATFORM_CLOCK based on Kconfig ...................................................................... Patch Set 17: (1 comment) Patchset: PS17: > In general, I agree and I even tried to do that. […] Oh, well, one more thing. If I first do the Kconfig change, then the FADT flag is wrong -> also inconsistent :D -- To view, visit https://review.coreboot.org/c/coreboot/+/57934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id2e5d69b5515c21e6ce922dab2cb88b494c65ebe Gerrit-Change-Number: 57934 Gerrit-PatchSet: 17 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Comment-Date: Fri, 01 Oct 2021 16:05:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add PMC IPC commands for FIVR control
by Felix Held (Code Review) 01 Oct '21

01 Oct '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57922 ) Change subject: soc/intel/common: Add PMC IPC commands for FIVR control ...................................................................... soc/intel/common: Add PMC IPC commands for FIVR control Add PMC IPC commands information for FIVR control functionality BUG=b:198582766 BRANCH=None TEST=Build FW and test on brya0 board Change-Id: I9d08bb71f7ea5da7614c68fc0ce4edf9aef59baa Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57922 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/soc/intel/common/block/include/intelblocks/pmc_ipc.h 1 file changed, 10 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h b/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h index 735438b..1877fe4 100644 --- a/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h +++ b/src/soc/intel/common/block/include/intelblocks/pmc_ipc.h @@ -18,12 +18,20 @@ /* IPC command to control FIVR Configuration */ #define PMC_IPC_CMD_COMMAND_FIVR 0xA3 +/* IPC subcommand to read FIVR Register */ +#define PMC_IPC_CMD_CMD_ID_FIVR_READ 0x00 /* IPC subcommand to write FIVR Register */ #define PMC_IPC_CMD_CMD_ID_FIVR_WRITE 0x01 /* IPC subcommand to control RFI Control 0 register logic write */ -#define PMC_IPC_SUBCMD_RFI_CTRL0_LOGIC 0x00 +#define PMC_IPC_SUBCMD_RFI_CTRL0_LOGIC 0 /* IPC subcommand to control RFI Control 4 register logic write */ -#define PMC_IPC_SUBCMD_RFI_CTRL4_LOGIC 0x01 +#define PMC_IPC_SUBCMD_RFI_CTRL4_LOGIC 1 +/* IPC subcommand to control EMI Control 0 register logic write */ +#define PMC_IPC_SUBCMD_EMI_CTRL0_LOGIC 2 +/* IPC subcommand to control FFFC_FAULT_STATUS register logic read */ +#define PMC_IPC_SUBCMD_FFFC_FAULT_STATUS 3 +/* IPC subcommand to control FFFC_RFI_STATUS register logic read */ +#define PMC_IPC_SUBCMD_FFFC_RFI_STATUS 4 #define PMC_IPC_CMD_FIELD(name, val) \ ((((val) & PMC_IPC_CMD_##name##_MASK) << PMC_IPC_CMD_##name##_SHIFT)) 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/57922 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d08bb71f7ea5da7614c68fc0ce4edf9aef59baa Gerrit-Change-Number: 57922 Gerrit-PatchSet: 5 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/{common,skl,dnv}: set ACPI_FADT_PLATFORM_CLOCK based on Kco...
by Michael Niewöhner (Code Review) 01 Oct '21

01 Oct '21

Attention is currently required from: Felix Singer, Furquan Shaikh, Mariusz Szafrański, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph, Lance Zhao, Nico Huber, Tim Wawrzynczak, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57934 ) Change subject: soc/intel/{common,skl,dnv}: set ACPI_FADT_PLATFORM_CLOCK based on Kconfig ...................................................................... Patch Set 17: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/57934/comment/2ec3b57d_4bcf6bac PS17, Line 12: or not. > Nit, not accurate. Setting a 1 requires a compliant timer, but a […] will fix Patchset: PS17: > Generally, I believe it's best to follow this simple rule when patching: […] In general, I agree and I even tried to do that. However, in that patch train there are multiple dependencies that would require splitting to even more commits. There a re already 12 commits, with splitting for 100% consistence it will be sth between 15-18. Not sure if that's desireable. If you insist, I can do that though. -- To view, visit https://review.coreboot.org/c/coreboot/+/57934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id2e5d69b5515c21e6ce922dab2cb88b494c65ebe Gerrit-Change-Number: 57934 Gerrit-PatchSet: 17 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Comment-Date: Fri, 01 Oct 2021 15:56:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/RFC: Generalize PCI support in coreboot
by Shelley Chen (Code Review) 01 Oct '21

01 Oct '21

Attention is currently required from: Felix Singer, Nico Huber, Furquan Shaikh, Martin Roth, Paul Menzel, Tim Wawrzynczak, Julius Werner, Angel Pons, Kyösti Mälkki. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57861 ) Change subject: Documentation/RFC: Generalize PCI support in coreboot ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57861/comment/55c66c82_59baea42 PS5, Line 7: Generalizing > Please use imperative mood [1]: Generalize. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a56d932f6e047087c38a7687564065cc1562363 Gerrit-Change-Number: 57861 Gerrit-PatchSet: 6 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 01 Oct 2021 15:49:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/RFC: Generalize PCI support in coreboot
by Shelley Chen (Code Review) 01 Oct '21

01 Oct '21

Attention is currently required from: Shelley Chen, Felix Singer, Nico Huber, Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Julius Werner, Angel Pons, Kyösti Mälkki. Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Paul Menzel, Julius Werner, Angel Pons, Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57861 to look at the new patch set (#6). Change subject: Documentation/RFC: Generalize PCI support in coreboot ...................................................................... Documentation/RFC: Generalize PCI support in coreboot Design Doc describing how we would refactor the mmio accesses in the PCI config space in coreboot so that we can extend the support to platforms that do not support ECAM. BUG=b:181098581 BRANCH=None TEST=None Change-Id: I3a56d932f6e047087c38a7687564065cc1562363 Signed-off-by: Shelley Chen <shchen(a)google.com> --- A Documentation/RFC/pci_config_access.md A Documentation/RFC/sys_mem_map.jpg 2 files changed, 119 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/57861/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/57861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a56d932f6e047087c38a7687564065cc1562363 Gerrit-Change-Number: 57861 Gerrit-PatchSet: 6 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/liveiso: Install nvme-cli tool
by Felix Singer (Code Review) 01 Oct '21

01 Oct '21

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58056 ) Change subject: util/liveiso: Install nvme-cli tool ...................................................................... util/liveiso: Install nvme-cli tool nvme-cli is used to manage NVMe devices and it supports many vendors. Also, it seems it's commonly used to do firmware updates. Change-Id: I26a78867b01d3af0441827c5b25343a46d7ddea1 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58056 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M util/liveiso/common.nix 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved diff --git a/util/liveiso/common.nix b/util/liveiso/common.nix index 6c57dc3..3961aba 100644 --- a/util/liveiso/common.nix +++ b/util/liveiso/common.nix @@ -141,6 +141,7 @@ neovim nixos-install-tools ntfsprogs + nvme-cli openssl p7zip pacman -- To view, visit https://review.coreboot.org/c/coreboot/+/58056 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26a78867b01d3af0441827c5b25343a46d7ddea1 Gerrit-Change-Number: 58056 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brask: Correct SSD power sequence
by Felix Held (Code Review) 01 Oct '21

01 Oct '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58045 ) Change subject: mb/google/brask: Correct SSD power sequence ...................................................................... mb/google/brask: Correct SSD power sequence M.2 spec describes PERST# should be sequenced after power enable. Follow up commit 658d7c5 Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I508f7e21888cc1938aa9a6f0066c17029773974b Reviewed-on: https://review.coreboot.org/c/coreboot/+/58045 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/variants/baseboard/brask/gpio.c 1 file changed, 11 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index b7d2985..777b816 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -369,6 +369,8 @@ static const struct pad_config early_gpio_table[] = { /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), + /* B4 : PROC_GP3 ==> SSD_PERST_L */ + PAD_CFG_GPO(GPP_B4, 0, DEEP), /* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2), /* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */ @@ -384,6 +386,8 @@ PAD_CFG_GPO(GPP_D1, 0, DEEP), /* D2 : ISH_GP2 ==> EN_FP_PWR */ PAD_CFG_GPO(GPP_D2, 1, DEEP), + /* D11 : ISH_SPI_MISO ==> EN_PP3300_SSD */ + PAD_CFG_GPO(GPP_D11, 1, DEEP), /* E15 : RSVD_TP ==> PCH_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP), /* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */ @@ -394,6 +398,11 @@ PAD_CFG_GPO(GPP_H13, 1, DEEP), }; +static const struct pad_config romstage_gpio_table[] = { + /* B4 : PROC_GP3 ==> SSD_PERST_L */ + PAD_CFG_GPO(GPP_B4, 1, DEEP), +}; + const struct pad_config *__weak variant_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); @@ -425,6 +434,6 @@ const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) { - *num = 0; - return NULL; + *num = ARRAY_SIZE(romstage_gpio_table); + return romstage_gpio_table; } 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/58045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I508f7e21888cc1938aa9a6f0066c17029773974b Gerrit-Change-Number: 58045 Gerrit-PatchSet: 7 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/felwinter: Correct SSD power sequence
by Felix Held (Code Review) 01 Oct '21

01 Oct '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58044 ) Change subject: mb/google/brya/var/felwinter: Correct SSD power sequence ...................................................................... mb/google/brya/var/felwinter: Correct SSD power sequence M.2 spec describes PERST# should be sequenced after power enable. Follow up commit 658d7c5 Signed-off-by: Eric Lai <ericr_lai(a)compal.corp-partner.google.com> Change-Id: I494e0edc135d730cf7bb437f0196cdf233d970d5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58044 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/brya/variants/felwinter/gpio.c 1 file changed, 15 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/felwinter/gpio.c b/src/mainboard/google/brya/variants/felwinter/gpio.c index f7ad2ef..62610ac 100644 --- a/src/mainboard/google/brya/variants/felwinter/gpio.c +++ b/src/mainboard/google/brya/variants/felwinter/gpio.c @@ -113,10 +113,14 @@ static const struct pad_config early_gpio_table[] = { /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), + /* B4 : PROC_GP3 ==> SSD_PERST_L */ + PAD_CFG_GPO(GPP_B4, 0, DEEP), /* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2), /* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2), + /* D11 : ISH_SPI_MISO ==> EN_PP3300_SSD */ + PAD_CFG_GPO(GPP_D11, 1, DEEP), /* D18 : UART1_TXD ==> SD_PE_RST_L */ PAD_CFG_GPO(GPP_D18, 0, PLTRST), /* E13 : THC0_SPI1_IO2 ==> MEM_CH_SEL */ @@ -131,6 +135,11 @@ PAD_CFG_GPO(GPP_H13, 1, PLTRST), }; +static const struct pad_config romstage_gpio_table[] = { + /* B4 : PROC_GP3 ==> SSD_PERST_L */ + PAD_CFG_GPO(GPP_B4, 1, DEEP), +}; + const struct pad_config *variant_gpio_override_table(size_t *num) { *num = ARRAY_SIZE(override_gpio_table); @@ -142,3 +151,9 @@ *num = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } + +const struct pad_config *variant_romstage_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(romstage_gpio_table); + return romstage_gpio_table; +} 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/58044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I494e0edc135d730cf7bb437f0196cdf233d970d5 Gerrit-Change-Number: 58044 Gerrit-PatchSet: 7 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/system76/oryp6: Convert to variant setup
by Tim Crawford (Code Review) 01 Oct '21

01 Oct '21

Attention is currently required from: Jeremy Soller. Hello build bot (Jenkins), Jeremy Soller, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57786 to look at the new patch set (#2). Change subject: mb/system76/oryp6: Convert to variant setup ...................................................................... mb/system76/oryp6: Convert to variant setup The Oryx Pro 6 has the same board layout/components as the next model in the series, Oryx Pro 7. Convert oryp6 to a variant setup in preparation for adding the oryp7. Change-Id: I976750c7724d23b303d0012f2d83c21a459e5eed Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/oryp6/Kconfig M src/mainboard/system76/oryp6/Makefile.inc M src/mainboard/system76/oryp6/board_info.txt M src/mainboard/system76/oryp6/bootblock.c M src/mainboard/system76/oryp6/devicetree.cb M src/mainboard/system76/oryp6/dsdt.asl D src/mainboard/system76/oryp6/include/mainboard/gpio.h A src/mainboard/system76/oryp6/include/variant/gpio.h M src/mainboard/system76/oryp6/ramstage.c A src/mainboard/system76/oryp6/variants/oryp6/board_info.txt R src/mainboard/system76/oryp6/variants/oryp6/data.vbt R src/mainboard/system76/oryp6/variants/oryp6/gpio.c R src/mainboard/system76/oryp6/variants/oryp6/gpio_early.c R src/mainboard/system76/oryp6/variants/oryp6/hda_verb.c A src/mainboard/system76/oryp6/variants/oryp6/overridetree.cb 15 files changed, 50 insertions(+), 46 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/57786/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57786 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I976750c7724d23b303d0012f2d83c21a459e5eed Gerrit-Change-Number: 57786 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit October 2021