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Change subject: cpu/x86/smm/smm_stub: Remove cpu_info
......................................................................
Patch Set 5: Code-Review+2
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58306 )
Change subject: soc/amd/cezanne,picasso/uart: implement read_resource
......................................................................
Patch Set 3:
(1 comment)
File src/soc/amd/picasso/uart.c:
https://review.coreboot.org/c/coreboot/+/58306/comment/ed07d450_e0034dad
PS1, Line 110: new_resource
> looks like that using mmio_resource should be the way to go. […]
Done
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58334 )
Change subject: soc/amd/common/block: move FCH IOAPIC resource from LPC to SMBus
......................................................................
soc/amd/common/block: move FCH IOAPIC resource from LPC to SMBus
The SMBus controller is the function 0 of the FCH PCI device that needs
to be enable in order for all other FCH PCI functions to be enabled, so
it's the primary function of the FCH. The init function of this device
already contains the FCH IOAPIC initialization code, so add its MMIO
resource in the read_resources function of the SMBus device instead of
the LPC device where it was added before.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Suggested-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: I585afd463c1c00cd87ced0617e7802503c5deba5
---
M src/soc/amd/common/block/lpc/lpc.c
M src/soc/amd/common/block/smbus/sm.c
2 files changed, 7 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/58334/1
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index 365c14dbf..4715414 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -114,11 +114,6 @@
fixed_mem_resource(dev, 2, SPI_BASE_ADDRESS / 1024, 1,
IORESOURCE_SUBTRACTIVE);
- res = new_resource(dev, 3); /* IOAPIC */
- res->base = IO_APIC_ADDR;
- res->size = 0x00001000;
- res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
-
compact_resources(dev);
}
diff --git a/src/soc/amd/common/block/smbus/sm.c b/src/soc/amd/common/block/smbus/sm.c
index ce66cbb..e64ff6d 100644
--- a/src/soc/amd/common/block/smbus/sm.c
+++ b/src/soc/amd/common/block/smbus/sm.c
@@ -73,8 +73,14 @@
}
#endif
+static void smbus_read_resources(struct device *dev)
+{
+ /* FCH IOAPIC */
+ mmio_resource(dev, 0, IO_APIC_ADDR / KiB, 4);
+}
+
static struct device_operations smbus_ops = {
- .read_resources = noop_read_resources,
+ .read_resources = smbus_read_resources,
.set_resources = noop_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = sm_init,
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Change subject: psp_verstage: convert relative address in EFS2
......................................................................
Patch Set 1:
(1 comment)
File src/soc/amd/common/psp_verstage/psp_verstage.c:
https://review.coreboot.org/c/coreboot/+/58316/comment/ef6f19a5_57442061
PS1, Line 127: psp_dir_addr = FLASH_BASE_ADDR + (psp_dir_addr & SPI_ADDR_MASK);
: bios_dir_addr = FLASH_BASE_ADDR + (bios_dir_addr & SPI_ADDR_MASK);
What is being done in line 112 - 115. We are adding against boot_dev_base which is the base address of Boot Device/SPI ROM.
Should this go along with this CL: https://review.coreboot.org/c/coreboot/+/55211?
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56410 )
Change subject: [RFC] kconfig_lint: Drop overly restrictive rules about choice configs
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56410/comment/375f5326_38ef23fd
PS4, Line 19: On top, the linter treats every occurence of a `config` entry as a
: symbol declaration, even when it's just setting a default or adding
: selects.
> > > > Thanks for the hint - I missed that discussion. I'll have a look later.
> > > >
> > > > > they had to debug something for weeks because they had a bad binary in their build environment, AIUI
> > > >
> > > > Not sure how that shall work as argument against Python. What am I missing?
> > >
> > > The assumption was that we use the Python binaries that people have
> > > already installed. Same as for any other host tool we just assume to
> > > be present, we'd have to maintain on our end, i.e. keep compatibility
> > > to everything people might have installed. We already do that for the
> > > host toolchain, for instance, and the effort is not negligible,
> >
> > Uhm, if we don't use that fancy python stuff, we won't have any problem. Ofc there must be some minimum version, same as with perl or whatever.
>
> Only if you assume 100% backwards compatibility including warnings,
> command-line options etc. Which I've never seen for any compiler
> or interpreter of that size.
You won't have 100% compatibility for *anything*. However, speaking of Python, there's not much commandline options you'd need. Anyway, problems are there to be solved. If we don't start, we won't get to that point, though :P
>
> >
> > >
> > > I guess things would look differently if we would add Python to buildgcc.
> > > But I have really no idea if that is feasible. And again, we'd have to
> > > maintain something on our end.
> > >
> > > > > It seems, one major issue was the transition from Python 2 to 3.
> > > >
> > > > Python2 vs. Python3 never was a real problem - the problem actually was:
> > > > - that religious `print is not a function but a statement` bs discussion.
> > > > - Python3 is soooo different. No, it's not. Python2.7 and Python3 are mostly compatible.
> > > > Anyway, Py2 is dead and we shouldn't use it.
> > >
> > > It's not about what changed but that things change. If we'd work with
> > > the random versions everybody has installed, we'd have to keep our code
> > > compatible with all these versions at once. Same for any other tool that
> > > we don't provide ourselves. (kconfiglib is said to achieve that rather
> > > well, btw.)
> >
> > Python versions are backwards compatible. Sure, here and there we will have to adapt but that won't be a huge problem.
>
> We agree on everything but the scale :) Not "a huge problem" can
> still be a problem.
Well, look at what libkconfig supports: 2.7-3.2+, which is basically *any* version. You will have bigger compat problems with other stuff 😊
Just to be clear: I don't say that these things don't have to be worried about at all, but that these problems are no blockers to start.
>
> >
> > >
> > > >
> > > > However, from my (very naive) point of view, we should just evaluate it and see if it works for us. Theoretical discussions often lead to false assumptions, at least in my experience.
> > >
> > > Well, _you_ can evaluate what you like. But you shouldn't push other people
> > > (you said "we should") to evaluate something that you want. The project is
> > > simply too big for that. You can't expect everybody to take a break just to
> > > evaluate something.
> >
> > No it's different: When I say we should, then it's a proposal. When you don't care, you don't have to. I don't expect anything. I proposed it, if noone cares I don't give a f***. Sorry.
>
> Sorry, I messed up the quotation. This was nothing you said, Michael,
> so I wasn't addressing you. I assumed when Felix wrote "we should"
> that "we" means the coreboot community. Anyway, this is really some-
> thing for the ML thread, let's not go on about it here.
Yeah, didn't realize that. But yes, I'm sure "we" is the community. I use that term, too, in that regard. So, actually what I meant to say with my harsh words.
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Change subject: libpayload: Add unit-tests framework and first test case
......................................................................
Patch Set 6:
(1 comment)
File payloads/libpayload/tests/Makefile.inc:
PS4:
> in the near future libpayload might require vboot (in some builds)
How likely is this? Copying makefiles adds technical debt, and if we're not going to need the separate functionality later, then the tradeoff isn't worth it.
> so it will complicate things
Agreed, and *then* you make the copy and have the files diverge.
As I make these comments, please understand that I'm not *demanding* that we have a single makefile that builds the unit tests for coreboot and libpayload. I just want us to consider whether the choice we're making is the right one.
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58307 )
Change subject: soc/amd/common/block/i2c: implement proper read_resource
......................................................................
Patch Set 3:
(1 comment)
File src/soc/amd/common/block/lpc/lpc.c:
https://review.coreboot.org/c/coreboot/+/58307/comment/af45bcd0_5d1917f8
PS2, Line 117: res = new_resource(dev, 3); /* IOAPIC */
: res->base = IO_APIC_ADDR;
: res->size = 0x00001000;
: res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
> not sure why the ioapic is part of the lpc resources.
yeah, that should probably be moved to the smbus controller which is function 0 of the FCH and where the FCH IOAPIC initialization is done from. will push a change for that
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Change subject: soc/intel/common/acpi: Correct IPC sub command for reading LPM requirement
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/58317/comment/41886fac_24c2159e
PS1, Line 9: Modify IPC sub command to 2 from 0 for reading LPM requirement from PMC.
> Why is the new value correct?
Below is the reference.
https://github.com/otcshare/CCG-ADL-Generic-Full
ClientOneSiliconPkg\Include\Register\PmcRegs.h
#define V_PMC_PWRM_IPC_SUBCMD_GEN_COMM_READ 2
It is consumed in below.
ClientOneSiliconPkg\IpBlock\Pmc\Library\PeiDxeSmmPmcLib\PmcLib.c
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Change subject: mb/google/brya: Set same size for CSE_RW, ME_RW_A and ME_RW_B
......................................................................
Patch Set 4: Code-Review+2
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