coreboot-gerrit September 2020

coreboot-gerrit@coreboot.org

1 participants
2629 discussions

Change in coreboot[master]: lenovo/g505s: enable the discrete VGA adapter
by Mike Banon (Code Review) 28 Oct '21

28 Oct '21

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38203 ) Change subject: lenovo/g505s: enable the discrete VGA adapter ...................................................................... lenovo/g505s: enable the discrete VGA adapter Enable the discrete VGA adapter (either HD-8570M or R5-M230) on Lenovo G505S. It doesn't bring any downsides for Lenovo G505S without a discrete VGA adapter: https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/message/KVX… Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> Change-Id: Iebce6b53e196746968e10b5eb1be05a10a31b87e --- M src/mainboard/lenovo/g505s/Kconfig M src/mainboard/lenovo/g505s/devicetree.cb 2 files changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/38203/1 diff --git a/src/mainboard/lenovo/g505s/Kconfig b/src/mainboard/lenovo/g505s/Kconfig index 6ffe508..68782dc 100644 --- a/src/mainboard/lenovo/g505s/Kconfig +++ b/src/mainboard/lenovo/g505s/Kconfig @@ -30,6 +30,11 @@ select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_4096 select GFXUMA + select MAINBOARD_HAS_MULTIPLE_VGA_ADAPTERS + select PCIEXP_L1_SUB_STATE + select PCIEXP_ASPM + select PCIEXP_COMMON_CLOCK + select PCIEXP_CLK_PM select NO_UART_ON_SUPERIO config MAINBOARD_DIR diff --git a/src/mainboard/lenovo/g505s/devicetree.cb b/src/mainboard/lenovo/g505s/devicetree.cb index 623a78b..8a4ce94 100644 --- a/src/mainboard/lenovo/g505s/devicetree.cb +++ b/src/mainboard/lenovo/g505s/devicetree.cb @@ -27,7 +27,7 @@ device pci 0.2 on end # IOMMU device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX device pci 1.1 on end # Internal Multimedia - device pci 2.0 off end + device pci 2.0 on end # Discrete Graphics PCI bus 0x666X device pci 3.0 off end device pci 4.0 on end # PCIE MINI0 device pci 5.0 on end # PCIE MINI1 -- To view, visit https://review.coreboot.org/c/coreboot/+/38203 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebce6b53e196746968e10b5eb1be05a10a31b87e Gerrit-Change-Number: 38203 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: newchange

2 7

Change in coreboot[master]: src/device/pci: Add support for discrete VGA initialization and OpROM...
by Mike Banon (Code Review) 28 Oct '21

28 Oct '21

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38202 ) Change subject: src/device/pci: Add support for discrete VGA initialization and OpROM loading ...................................................................... src/device/pci: Add support for discrete VGA initialization and OpROM loading Required to make the discrete VGA working at some boards like AMD Lenovo G505S. If CONFIG_MULTIPLE_VGA_ADAPTERS is enabled: coreboot will try to initialize the discrete VGA of PCI_CLASS_DISPLAY_OTHER class and load OpROM on it. ACPI VFCT table will be created only for discrete VGA of PCI_CLASS_DISPLAY_OTHER class instead of integrated (to avoid the discrete VGA init problems), but everything is working fine. Later will try to make a common VFCT table for both adapters. Based on the original patches by Hans Jürgen Kitter <eforname(a)freemail.hu>. Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> Change-Id: I9a7aa31c956d8f716e2d5a73ff032134c144d3db --- M src/device/pci_device.c M src/device/pci_rom.c 2 files changed, 74 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/38202/1 diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 36b7c82..f0634fd 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -712,7 +712,9 @@ * ROMs when coming out of an S3 resume. */ if (!CONFIG(S3_VGA_ROM_RUN) && acpi_is_wakeup_s3() && - ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) + (((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) || + (CONFIG(MULTIPLE_VGA_ADAPTERS) && + ((dev->class >> 8) == PCI_CLASS_DISPLAY_OTHER)))) return 0; if (CONFIG(ALWAYS_LOAD_OPROM)) return 1; @@ -726,34 +728,55 @@ void pci_dev_init(struct device *dev) { struct rom_header *rom, *ram; + unsigned int pci_class = (dev->class >> 8); if (!CONFIG(VGA_ROM_RUN)) return; - /* Only execute VGA ROMs. */ - if (((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)) + /* Only load VGA ROMs. */ + switch (pci_class) { + case PCI_CLASS_DISPLAY_VGA: + break; + case PCI_CLASS_DISPLAY_OTHER: + if (!CONFIG(MULTIPLE_VGA_ADAPTERS)) + return; + break; + default: return; + } if (!should_load_oprom(dev)) return; timestamp_add_now(TS_OPROM_INITIALIZE); rom = pci_rom_probe(dev); - if (rom == NULL) + if (rom == NULL) { + printk(BIOS_DEBUG, "%s%s ROM probe failed\n", + pci_class == PCI_CLASS_DISPLAY_VGA ? "" : "Non-", + "PCI_CLASS_DISPLAY_VGA"); return; + } ram = pci_rom_load(dev, rom); - if (ram == NULL) + if (ram == NULL) { + printk(BIOS_DEBUG, "%s%s ROM load failed\n", + pci_class == PCI_CLASS_DISPLAY_VGA ? "" : "Non-", + "PCI_CLASS_DISPLAY_VGA"); return; + } timestamp_add_now(TS_OPROM_COPY_END); if (!should_run_oprom(dev, rom)) return; - run_bios(dev, (unsigned long)ram); + /* Only execute Integrated VGA Option ROM. */ + if (pci_class == PCI_CLASS_DISPLAY_VGA) { + run_bios(dev, (unsigned long)ram); + gfx_set_init_done(1); + printk(BIOS_DEBUG, "PCI_CLASS_DISPLAY_VGA Option ROM was run\n"); + } else + printk(BIOS_DEBUG, "Not running non-PCI_CLASS_DISPLAY_VGA Option ROM\n"); - gfx_set_init_done(1); - printk(BIOS_DEBUG, "VGA Option ROM was run\n"); timestamp_add_now(TS_OPROM_END); } diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 3676f9c..f1f7978 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -181,7 +181,20 @@ if (!CONFIG(VGA_ROM_RUN)) return NULL; - run_rom = (struct rom_header *)(uintptr_t)PCI_VGA_RAM_IMAGE_START; + /* Set the start of shadow memory for this Integrated or Discrete VGA. */ + switch (dev->class >> 8) { + case PCI_CLASS_DISPLAY_VGA: + run_rom = (struct rom_header *)(uintptr_t)PCI_VGA_RAM_IMAGE_START; + break; + case PCI_CLASS_DISPLAY_OTHER: + if (!CONFIG(MULTIPLE_VGA_ADAPTERS)) + return NULL; + run_rom = (struct rom_header *)(uintptr_t)PCI_RAM_IMAGE_START; + break; + default: + return NULL; + } + if (read_le16(&run_rom->signature) != PCI_ROM_HDR) return NULL; @@ -211,11 +224,26 @@ return current; } - printk(BIOS_DEBUG, " Copying %sVBIOS image from %p\n", + /* Setup ROM address for copying it later from CBFS to ACPI VFCT. */ + switch (device->class >> 8) { + case PCI_CLASS_DISPLAY_VGA: + printk(BIOS_DEBUG, " Copying %sVBIOS image from %p\n", rom == (struct rom_header *) (uintptr_t)PCI_VGA_RAM_IMAGE_START ? "initialized " : "", rom); + break; + case PCI_CLASS_DISPLAY_OTHER: + printk(BIOS_DEBUG, " Copying %sVBIOS image from %p\n", + rom == (struct rom_header *) + (uintptr_t)PCI_RAM_IMAGE_START ? + "initialized " : "", + rom); + break; + default: + printk(BIOS_DEBUG, " Copying VBIOS image from %p\n", + rom); + } header->DeviceID = device->device; header->VendorID = device->vendor; @@ -236,8 +264,20 @@ struct acpi_rsdp *rsdp) { /* Only handle VGA devices */ - if ((device->class >> 8) != PCI_CLASS_DISPLAY_VGA) + switch (device->class >> 8) { + case PCI_CLASS_DISPLAY_VGA: + if (CONFIG(MULTIPLE_VGA_ADAPTERS)) + return current; + /* Write ACPI VFCT only for Discrete VGA. */ + /* TODO: do this also for Integrated VGA. */ + break; + case PCI_CLASS_DISPLAY_OTHER: + if (!CONFIG(MULTIPLE_VGA_ADAPTERS)) + return current; + break; + default: return current; + } /* Only handle enabled devices */ if (!device->enabled) -- To view, visit https://review.coreboot.org/c/coreboot/+/38202 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a7aa31c956d8f716e2d5a73ff032134c144d3db Gerrit-Change-Number: 38202 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: newchange

3 9

Change in coreboot[master]: src/device/Kconfig: introduce the MULTIPLE_VGA_ADAPTERS symbols
by Mike Banon (Code Review) 28 Oct '21

28 Oct '21

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38200 ) Change subject: src/device/Kconfig: introduce the MULTIPLE_VGA_ADAPTERS symbols ...................................................................... src/device/Kconfig: introduce the MULTIPLE_VGA_ADAPTERS symbols Some motherboards may have more than one VGA adapter - for example, there are versions of Lenovo G505S that have a discrete VGA adapter in addition to its' integrated VGA adapter which is a part of APU. MULTIPLE_VGA_ADAPTERS Kconfig symbols, combined with other changes, will help to get a discrete VGA adapter working at these boards. Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> Change-Id: I03133a45f28251291008267e5c9b10f805c0003a --- M src/device/Kconfig 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/38200/1 diff --git a/src/device/Kconfig b/src/device/Kconfig index 0bd9fe1..979ad90 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -63,6 +63,11 @@ Selected by mainboards that implement support for `libgfxinit`. Usually this requires a list of ports to be probed for displays. +config MAINBOARD_HAS_MULTIPLE_VGA_ADAPTERS + bool + help + Selected by mainboards that have or support multiple VGA adapters. + choice prompt "Graphics initialization" default NO_GFX_INIT if VGA_BIOS && PAYLOAD_SEABIOS @@ -261,8 +266,15 @@ Enable this option for a good compromise between security and speed. config MULTIPLE_VGA_ADAPTERS + prompt "Multiple VGA Adapters" bool + depends on MAINBOARD_HAS_MULTIPLE_VGA_ADAPTERS default n + help + Some motherboards may have more than one VGA adapter - for example, + there are versions of Lenovo G505S that have a discrete VGA adapter + in addition to its' integrated VGA adapter which is a part of APU. + Enable this option to try to initialize this discrete VGA adapter. menu "Display" depends on HAVE_VGA_TEXT_FRAMEBUFFER || HAVE_LINEAR_FRAMEBUFFER -- To view, visit https://review.coreboot.org/c/coreboot/+/38200 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03133a45f28251291008267e5c9b10f805c0003a Gerrit-Change-Number: 38200 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: newchange

2 5

Change in coreboot[master]: cpu/x86: Introduce `CPU_X86_LAPIC`
by Angel Pons (Code Review) 27 Oct '21

27 Oct '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44228 ) Change subject: cpu/x86: Introduce `CPU_X86_LAPIC` ...................................................................... cpu/x86: Introduce `CPU_X86_LAPIC` There's no need for relative paths with Kconfig options. Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 65 files changed, 36 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/44228/1 diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index 9cea893..b9354c1 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY14 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index 7288fe6..fbde30e 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index b8aadb4..7b83c0c 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY15_TN bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index b1a3a21..abc8609 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index e608e39..0b31d7b 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY16_KB bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index f077663..d22a6b7 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index bd1b04c..1b7423f 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_PI_00630F01 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00630F01 diff --git a/src/cpu/amd/pi/00630F01/Makefile.inc b/src/cpu/amd/pi/00630F01/Makefile.inc index b1a3a21..abc8609 100644 --- a/src/cpu/amd/pi/00630F01/Makefile.inc +++ b/src/cpu/amd/pi/00630F01/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index 0434f4c..3f41e5a 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_PI_00660F01 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00660F01 diff --git a/src/cpu/amd/pi/00660F01/Makefile.inc b/src/cpu/amd/pi/00660F01/Makefile.inc index 60963b1..a19ca89 100644 --- a/src/cpu/amd/pi/00660F01/Makefile.inc +++ b/src/cpu/amd/pi/00660F01/Makefile.inc @@ -7,7 +7,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index 3d4226a..f809f3f 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_PI_00730F01 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_UNDISCLOSED diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index 0cc5be2..a95bb4b 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -9,7 +9,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 18fc392..a026108 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -10,6 +10,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 6cfbc38..ddcc51d 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@ subdirs-y += ../microcode subdirs-y += ../turbo -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 19bc366..0ed4338 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -10,6 +10,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE + select CPU_X86_LAPIC select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 6d73d61..e8c4924 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 74abbbc..61c8da2 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -10,6 +10,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE + select CPU_X86_LAPIC select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 58e3762..8488a8f 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -18,7 +18,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 2b6deb6..689def0 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -12,6 +12,7 @@ select CPU_INTEL_MODEL_68X select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX + select CPU_X86_LAPIC select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index 2ec9368..f44757a 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -9,7 +9,6 @@ subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/smm subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index af43f72..bf16db7 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -6,6 +6,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_LAPIC select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index ea10f6c..e69ef26 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 638653c..b986c4c 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -1,6 +1,7 @@ config CPU_INTEL_SOCKET_BGA956 bool select CPU_INTEL_MODEL_1067X + select CPU_X86_LAPIC select MMX select SSE diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index 03d1871..17aa3d1 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 5105f09..ff258e7 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -8,6 +8,7 @@ config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_LAPIC select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 2122344..26e58b1 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 784cd89..4ac9060 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -9,6 +9,7 @@ select CPU_INTEL_MODEL_F3X select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X + select CPU_X86_LAPIC select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index c4f8e26..cb69052 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 8b1f5ed..ad9c473 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -7,6 +7,7 @@ def_bool y select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX + select CPU_X86_LAPIC select MMX select SSE diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index 9ae5844..0541703f 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 176ae9e..03e910a 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -6,6 +6,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_F2X + select CPU_X86_LAPIC select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index edf9ac6..1e160d0 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,7 +1,6 @@ subdirs-y += ../model_f2x subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index a7c8ab1..5755d6b 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -2,6 +2,7 @@ bool select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX + select CPU_X86_LAPIC select MMX select SSE diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 605e08e..7692987 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 21ada02..bf5bac3 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -6,6 +6,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select SMP select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index fb560d6..5f54262 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -8,6 +8,5 @@ ramstage-y += qemu.c subdirs-y += ../x86/mtrr -subdirs-y += ../x86/lapic subdirs-y += ../x86/smm subdirs-y += ../x86/tsc diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index e4e6ee7..334fd95 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -2,6 +2,10 @@ bool default n +config CPU_X86_LAPIC + bool + default n + # TODO These two options look too similar config PARALLEL_CPU_INIT bool diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 3b9f872..8b4f522 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,5 +1,6 @@ subdirs-y += pae subdirs-$(CONFIG_CPU_X86_CACHE) += cache +subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c ramstage-y += backup_default_smm.c diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 526900a..bee9ec6 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -13,6 +13,7 @@ select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index aed70ef..c4a0f54 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index b29bd99..b88d031 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -13,6 +13,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 91112fc..4c9ea38 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index f837a2e..62b984a 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -29,6 +29,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index cc36d74..fe62311 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index b23f56d..39da73d 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -14,6 +14,7 @@ select ARCH_RAMSTAGE_X86_32 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS + select CPU_X86_LAPIC select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index bfa1846..17cc9cf 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index bf067da..65f5b62 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -14,6 +14,7 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS + select CPU_X86_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select HAVE_SMI_HANDLER diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index fcdb4a6..b8f5abe 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 156d58a..69ab95b 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -17,6 +17,7 @@ select MRC_SETTINGS_PROTECT select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 28b7c29..3a18110 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index d36e214..ac7b87d 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -67,6 +67,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_COMPRESS_FSP_S_LZMA select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 96f1f97..979dccc 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 3fce223..e8a68d1 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -15,6 +15,7 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES + select CPU_X86_LAPIC select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index a9bfb65..9e3e1a8 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 1230675..02300a8 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -16,6 +16,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 05f4846..8ecb332 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index f2922f5..eed1b02 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -17,6 +17,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 1cba218..0b27e2c 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 9f9cb18..13e52cd 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -29,6 +29,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_COMMON_HYPERTHREADING + select CPU_X86_LAPIC select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index de516c1..62dbf7d 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 2659357..25ee119 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -17,6 +17,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index c4f71c7..23af5fe 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index cf9ba94..5aa058d 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -30,6 +30,7 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES + select CPU_X86_LAPIC select POSTCAR_CONSOLE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 89f18d1..04972ee 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/lapic subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-y += ../../../../cpu/intel/microcode diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 048e265..657136f 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/lapic subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm -- To view, visit https://review.coreboot.org/c/coreboot/+/44228 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Gerrit-Change-Number: 44228 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

5 9

Change in coreboot[master]: cpu/intel/socket_LGA775: Drop commented-out entries
by Angel Pons (Code Review) 27 Oct '21

27 Oct '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44218 ) Change subject: cpu/intel/socket_LGA775: Drop commented-out entries ...................................................................... cpu/intel/socket_LGA775: Drop commented-out entries These CPU models do not exist, and have always been commented-out. Change-Id: I8fc53fea4225217bc5bb70d839c280ebb64fd3a6 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc 2 files changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/44218/1 diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 8db932c..784cd89 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -8,8 +8,6 @@ select CPU_INTEL_MODEL_6FX select CPU_INTEL_MODEL_F3X select CPU_INTEL_MODEL_F4X -# select CPU_INTEL_MODEL_F6X -# select CPU_INTEL_MODEL_1066X select CPU_INTEL_MODEL_1067X select MMX select SSE diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index 35a5ad2..29c5761 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -9,8 +9,6 @@ subdirs-y += ../model_6fx subdirs-y += ../model_f3x subdirs-y += ../model_f4x -#subdirs-y += ../model_f6x -#subdirs-y += ../model_1066x subdirs-y += ../model_1067x subdirs-y += ../hyperthreading -- To view, visit https://review.coreboot.org/c/coreboot/+/44218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8fc53fea4225217bc5bb70d839c280ebb64fd3a6 Gerrit-Change-Number: 44218 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

5 14

Change in coreboot[master]: src: Select CPU_X86_CACHE where necessary
by Angel Pons (Code Review) 27 Oct '21

27 Oct '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44227 ) Change subject: src: Select CPU_X86_CACHE where necessary ...................................................................... src: Select CPU_X86_CACHE where necessary Looks like only older platforms use it. Change-Id: Ie75682f5d20a79fc2f3aab9b8a2c3ccf79d1ad5c Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/haswell/Kconfig M src/cpu/intel/model_1067x/Kconfig M src/cpu/intel/model_106cx/Kconfig M src/cpu/intel/model_65x/Kconfig M src/cpu/intel/model_67x/Kconfig M src/cpu/intel/model_68x/Kconfig M src/cpu/intel/model_6bx/Kconfig M src/cpu/intel/model_6ex/Kconfig M src/cpu/intel/model_6fx/Kconfig M src/cpu/intel/model_6xx/Kconfig M src/cpu/intel/model_f2x/Kconfig M src/cpu/intel/model_f3x/Kconfig M src/cpu/intel/model_f4x/Kconfig M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_p/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/xeon_sp/Kconfig 26 files changed, 12 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/44227/1 diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index b02ea47..18fc392 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -10,7 +10,6 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 0a29d69..45387ed 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -4,6 +4,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index 095fee5..29e7a6c 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -4,6 +4,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig index 6a1d09c..a0d1088 100644 --- a/src/cpu/intel/model_65x/Kconfig +++ b/src/cpu/intel/model_65x/Kconfig @@ -4,4 +4,5 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig index 283927f..fb1f102 100644 --- a/src/cpu/intel/model_67x/Kconfig +++ b/src/cpu/intel/model_67x/Kconfig @@ -4,4 +4,5 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig index 4f5d1ac..e2f3172 100644 --- a/src/cpu/intel/model_68x/Kconfig +++ b/src/cpu/intel/model_68x/Kconfig @@ -6,4 +6,5 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index eb4b675..30292da 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -4,4 +4,5 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index ed2dce8..75807aa 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -4,6 +4,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index 25c1447..d254fd2 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -4,6 +4,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig index d00fc24..a833cc7 100644 --- a/src/cpu/intel/model_6xx/Kconfig +++ b/src/cpu/intel/model_6xx/Kconfig @@ -4,4 +4,5 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index 0c92479..782b53d 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -4,6 +4,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS select SMM_ASEG select CPU_INTEL_COMMON diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index fbb00fa..9c1ee61 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -4,6 +4,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_COMMON select CPU_INTEL_COMMON_HYPERTHREADING diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index 9398d18..ed1c426 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -4,4 +4,5 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index d3e1bae..2b6deb6 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -12,7 +12,6 @@ select CPU_INTEL_MODEL_68X select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX - select CPU_X86_CACHE select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index c22ad63..af43f72 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -6,7 +6,6 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_106CX - select CPU_X86_CACHE select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 3cdebe4..638653c 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -1,7 +1,6 @@ config CPU_INTEL_SOCKET_BGA956 bool select CPU_INTEL_MODEL_1067X - select CPU_X86_CACHE select MMX select SSE diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index a9d5c5c..5105f09 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -8,7 +8,6 @@ config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX - select CPU_X86_CACHE select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 56b9f5a..784cd89 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -9,7 +9,6 @@ select CPU_INTEL_MODEL_F3X select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X - select CPU_X86_CACHE select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 49fe499..8b1f5ed 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -7,7 +7,6 @@ def_bool y select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX - select CPU_X86_CACHE select MMX select SSE diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index b737c39..176ae9e 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -6,7 +6,6 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_F2X - select CPU_X86_CACHE select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index c27d02f..a7c8ab1 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -2,7 +2,6 @@ bool select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX - select CPU_X86_CACHE select MMX select SSE diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index d150e59..526900a 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -13,7 +13,6 @@ select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 8d1fee4..b29bd99 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -13,7 +13,6 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index b4415be..f837a2e 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -29,7 +29,6 @@ select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select CPU_X86_CACHE select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 0a274cf..3fce223 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -15,7 +15,6 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES - select CPU_X86_CACHE select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 12fa97c..cf9ba94 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -8,7 +8,6 @@ config SOC_INTEL_SKYLAKE_SP bool - select CPU_X86_CACHE select XEON_SP_COMMON_BASE select PLATFORM_USES_FSP2_0 help -- To view, visit https://review.coreboot.org/c/coreboot/+/44227 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie75682f5d20a79fc2f3aab9b8a2c3ccf79d1ad5c Gerrit-Change-Number: 44227 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

4 10

Change in coreboot[master]: cpu/x86: Introduce `CPU_X86_CACHE`
by Angel Pons (Code Review) 27 Oct '21

27 Oct '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44226 ) Change subject: cpu/x86: Introduce `CPU_X86_CACHE` ...................................................................... cpu/x86: Introduce `CPU_X86_CACHE` There's no need for relative paths with Kconfig options. Change-Id: Ib9b9b29a158c34a30480aaabf6d0b23819d28427 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/skx/Makefile.inc 46 files changed, 27 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/44226/1 diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index 103903f..9cea893 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -2,6 +2,7 @@ config CPU_AMD_AGESA_FAMILY14 bool + select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index c940232..7288fe6 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -9,7 +9,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index 70f71ed..b8aadb4 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -2,6 +2,7 @@ config CPU_AMD_AGESA_FAMILY15_TN bool + select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index bc04cfd..b1a3a21 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -12,7 +12,6 @@ subdirs-y += ../../smm subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index e41ddec..e608e39 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -2,6 +2,7 @@ config CPU_AMD_AGESA_FAMILY16_KB bool + select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index c097b2c..f077663 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -9,7 +9,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index c14cd54..bd1b04c 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -2,6 +2,7 @@ config CPU_AMD_PI_00630F01 bool + select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00630F01 diff --git a/src/cpu/amd/pi/00630F01/Makefile.inc b/src/cpu/amd/pi/00630F01/Makefile.inc index bc04cfd..b1a3a21 100644 --- a/src/cpu/amd/pi/00630F01/Makefile.inc +++ b/src/cpu/amd/pi/00630F01/Makefile.inc @@ -12,7 +12,6 @@ subdirs-y += ../../smm subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index 1cdfb1d..0434f4c 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -2,6 +2,7 @@ config CPU_AMD_PI_00660F01 bool + select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00660F01 diff --git a/src/cpu/amd/pi/00660F01/Makefile.inc b/src/cpu/amd/pi/00660F01/Makefile.inc index 69635fc..60963b1 100644 --- a/src/cpu/amd/pi/00660F01/Makefile.inc +++ b/src/cpu/amd/pi/00660F01/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index 5296ee6..3d4226a 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -2,6 +2,7 @@ config CPU_AMD_PI_00730F01 bool + select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_UNDISCLOSED diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index 406fafb9..0cc5be2 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/lapic -subdirs-y += ../../../x86/cache subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 18fc392..b02ea47 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -10,6 +10,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index cf4e812..6cfbc38 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@ subdirs-y += ../microcode subdirs-y += ../turbo -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 78cac30..19bc366 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -9,6 +9,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 85384a0..6d73d61 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 1918428..74abbbc 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -9,6 +9,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 557bbd1..58e3762 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -18,7 +18,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 2b6deb6..d3e1bae 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -12,6 +12,7 @@ select CPU_INTEL_MODEL_68X select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX + select CPU_X86_CACHE select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index 03026cc..2ec9368 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index af43f72..c22ad63 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -6,6 +6,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_CACHE select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index d827747..ea10f6c 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 638653c..3cdebe4 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -1,6 +1,7 @@ config CPU_INTEL_SOCKET_BGA956 bool select CPU_INTEL_MODEL_1067X + select CPU_X86_CACHE select MMX select SSE diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index fb18f2e..03d1871 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 5105f09..a9d5c5c 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -8,6 +8,7 @@ config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_CACHE select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 08f88b6..2122344 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 784cd89..56b9f5a 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -9,6 +9,7 @@ select CPU_INTEL_MODEL_F3X select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X + select CPU_X86_CACHE select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index 29c5761..c4f8e26 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 8b1f5ed..49fe499 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -7,6 +7,7 @@ def_bool y select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX + select CPU_X86_CACHE select MMX select SSE diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index d79e082..9ae5844 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 176ae9e..b737c39 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -6,6 +6,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_F2X + select CPU_X86_CACHE select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 9e3b8d7..edf9ac6 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -2,7 +2,6 @@ subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index a7c8ab1..c27d02f 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -2,6 +2,7 @@ bool select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX + select CPU_X86_CACHE select MMX select SSE diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 198bc4b..605e08e 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/cache subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 5394cd0..e4e6ee7 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -1,3 +1,7 @@ +config CPU_X86_CACHE + bool + default n + # TODO These two options look too similar config PARALLEL_CPU_INIT bool diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 2f789f7..3b9f872 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,4 +1,5 @@ subdirs-y += pae +subdirs-$(CONFIG_CPU_X86_CACHE) += cache subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c ramstage-y += backup_default_smm.c diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 526900a..d150e59 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -13,6 +13,7 @@ select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index bbb064f..aed70ef 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/cache subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index b29bd99..8d1fee4 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -13,6 +13,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 0d7b5d1..91112fc 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/cache subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index f837a2e..b4415be 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -29,6 +29,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_CACHE select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 517c8ca..cc36d74 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -7,7 +7,6 @@ subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/cache bootblock-y += bootblock/bootblock.c bootblock-$(CONFIG_FSP_CAR) += fspcar.c diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 3fce223..0a274cf 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -15,6 +15,7 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES + select CPU_X86_CACHE select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 105f866..a9bfb65 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/cache bootblock-y += bootblock/bootblock.c bootblock-y += spi.c diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index cf9ba94..12fa97c 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -8,6 +8,7 @@ config SOC_INTEL_SKYLAKE_SP bool + select CPU_X86_CACHE select XEON_SP_COMMON_BASE select PLATFORM_USES_FSP2_0 help diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 773ced0..048e265 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -7,7 +7,6 @@ subdirs-y += ../../../../cpu/x86/lapic subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc -subdirs-y += ../../../../cpu/x86/cache subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm postcar-y += soc_util.c -- To view, visit https://review.coreboot.org/c/coreboot/+/44226 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9b9b29a158c34a30480aaabf6d0b23819d28427 Gerrit-Change-Number: 44226 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

4 19

Change in coreboot[master]: cpu/x86: Introduce `CPU_X86_MTRR`
by Angel Pons (Code Review) 26 Oct '21

26 Oct '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44230 ) Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ...................................................................... cpu/x86: Introduce `CPU_X86_MTRR` There's no need for relative paths with Kconfig options. Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 67 files changed, 37 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/44230/1 diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index b9354c1..ecf8175 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index fbde30e..7dbb065 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -8,6 +8,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index 7b83c0c..525677c 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index abc8609..357e80b 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index 0b31d7b..f87f241 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index d22a6b7..b110dec 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -8,6 +8,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index 1b7423f..66df66d 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00630F01 diff --git a/src/cpu/amd/pi/00630F01/Makefile.inc b/src/cpu/amd/pi/00630F01/Makefile.inc index abc8609..357e80b 100644 --- a/src/cpu/amd/pi/00630F01/Makefile.inc +++ b/src/cpu/amd/pi/00630F01/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index 3f41e5a..dff7a44 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00660F01 diff --git a/src/cpu/amd/pi/00660F01/Makefile.inc b/src/cpu/amd/pi/00660F01/Makefile.inc index a19ca89..6a2ab03 100644 --- a/src/cpu/amd/pi/00660F01/Makefile.inc +++ b/src/cpu/amd/pi/00660F01/Makefile.inc @@ -7,6 +7,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index f809f3f..25b72a7 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_UNDISCLOSED diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index a95bb4b..ea06ced 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -9,6 +9,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index a026108..8e40c73 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -11,6 +11,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index ddcc51d..247c266 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@ subdirs-y += ../microcode subdirs-y += ../turbo -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 0ed4338..289aa62 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -11,6 +11,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index e8c4924..99ef0ed 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 61c8da2..500a717 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -11,6 +11,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 8488a8f..5d44eef 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -18,7 +18,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 689def0..8d0804e 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -13,6 +13,7 @@ select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX select CPU_X86_LAPIC + select CPU_X86_MTRR select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index f44757a..de4dae6 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../model_68x subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index bf16db7..5852a10 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -7,6 +7,7 @@ def_bool y select CPU_INTEL_MODEL_106CX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index e69ef26..c5b3223 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -10,6 +10,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index b986c4c..9862038 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -2,6 +2,7 @@ bool select CPU_INTEL_MODEL_1067X select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index 17aa3d1..de3c201 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -10,6 +10,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index ff258e7..b79427e 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -9,6 +9,7 @@ def_bool y select CPU_INTEL_MODEL_106CX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 26e58b1..47dd01d 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -10,6 +10,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 4ac9060..9b039fc 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -10,6 +10,7 @@ select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index cb69052..cfe19d1 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,6 +14,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index ad9c473..1860ff1 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -8,6 +8,7 @@ select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index a77514e..7f814cc 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 03e910a..bc3f5ba 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -7,6 +7,7 @@ def_bool y select CPU_INTEL_MODEL_F2X select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 1e160d0..6d8b838 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_f2x subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index 5755d6b..506fbeb 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -3,6 +3,7 @@ select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 7692987..3974e1c 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index bf5bac3..ad130f2 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -7,6 +7,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select SMP select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index 5f54262..c3d0aad 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -7,6 +7,5 @@ ramstage-y += qemu.c -subdirs-y += ../x86/mtrr subdirs-y += ../x86/smm subdirs-y += ../x86/tsc diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 334fd95..617e093 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -6,6 +6,10 @@ bool default n +config CPU_X86_MTRR + bool + default n + # TODO These two options look too similar config PARALLEL_CPU_INIT bool diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 8b4f522..0dccdff 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,6 +1,7 @@ subdirs-y += pae subdirs-$(CONFIG_CPU_X86_CACHE) += cache subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic +subdirs-$(CONFIG_CPU_X86_MTRR) += lapic subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c ramstage-y += backup_default_smm.c diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index bee9ec6..3d3968b 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -14,6 +14,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index c4a0f54..3b2b497 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index b88d031..ac629fd 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -14,6 +14,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 4c9ea38..2019fb0 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 62b984a..2421d26 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -30,6 +30,7 @@ # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index fe62311..5e58538 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 39da73d..3ac33cf 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -15,6 +15,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_X86_LAPIC + select CPU_X86_MTRR select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 17cc9cf..a2e4340 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 65f5b62..b02f4f3 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -15,6 +15,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_X86_LAPIC + select CPU_X86_MTRR select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select HAVE_SMI_HANDLER diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index b8f5abe..701424b 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 69ab95b..515026b 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -18,6 +18,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 3a18110..da42f35 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index ac7b87d..a77a8a1 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -68,6 +68,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_COMPRESS_FSP_S_LZMA select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 979dccc..ec4e82b 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index e8a68d1..7532ccb 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -16,6 +16,7 @@ select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select CPU_X86_LAPIC + select CPU_X86_MTRR select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 9e3e1a8..3bd2106 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 02300a8..b2cf82d 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -17,6 +17,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 8ecb332..8ae39f7 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index eed1b02..eb34598 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -18,6 +18,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 0b27e2c..f87d0fd 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 6571eb2..fa6861e 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -13,6 +13,7 @@ select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 + select CPU_X86_MTRR select NO_MMCONF_SUPPORT select REG_SCRIPT select PLATFORM_USES_FSP2_0 diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index 387884a..5800e04 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/tsc bootblock-y += bootblock/esram_init.S diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 13e52cd..37ae68d 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -30,6 +30,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_COMMON_HYPERTHREADING select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 62dbf7d..c858d1e 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 25ee119..8c73d76 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -18,6 +18,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 23af5fe..27b62a0 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 5aa058d..540212c 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -31,6 +31,7 @@ select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select CPU_X86_LAPIC + select CPU_X86_MTRR select POSTCAR_CONSOLE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 04972ee..59ca104 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-y += ../../../../cpu/intel/microcode diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 657136f..db29e1c 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm -- To view, visit https://review.coreboot.org/c/coreboot/+/44230 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Gerrit-Change-Number: 44230 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

4 11

Change in coreboot[master]: cpu/x86: Introduce `CPU_X86_SMM`
by Angel Pons (Code Review) 25 Oct '21

25 Oct '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44231 ) Change subject: cpu/x86: Introduce `CPU_X86_SMM` ...................................................................... cpu/x86: Introduce `CPU_X86_SMM` There's no need for relative paths with Kconfig options. Change-Id: I478d3fd37d9f9c0daa4a704fdf5ba92b2028bf43 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/skx/Makefile.inc 64 files changed, 36 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/44231/1 diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index ecf8175..de8e326 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -5,6 +5,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index 7dbb065..9576708 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -9,4 +9,3 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae -subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index 525677c..df7ac26 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -5,6 +5,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index 357e80b..1d5779d 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -12,4 +12,3 @@ subdirs-y += ../../smm subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae -subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index f87f241..0cafdf5 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -5,6 +5,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select X86_AMD_FIXED_MTRRS if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index b110dec..d775c54 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -9,4 +9,3 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae -subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index 66df66d..65f66df 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -5,6 +5,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00630F01 diff --git a/src/cpu/amd/pi/00630F01/Makefile.inc b/src/cpu/amd/pi/00630F01/Makefile.inc index 357e80b..1d5779d 100644 --- a/src/cpu/amd/pi/00630F01/Makefile.inc +++ b/src/cpu/amd/pi/00630F01/Makefile.inc @@ -12,4 +12,3 @@ subdirs-y += ../../smm subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae -subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index dff7a44..4b7a665 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -5,6 +5,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select X86_AMD_FIXED_MTRRS if CPU_AMD_PI_00660F01 diff --git a/src/cpu/amd/pi/00660F01/Makefile.inc b/src/cpu/amd/pi/00660F01/Makefile.inc index 6a2ab03..bcbc7fe 100644 --- a/src/cpu/amd/pi/00660F01/Makefile.inc +++ b/src/cpu/amd/pi/00660F01/Makefile.inc @@ -8,4 +8,3 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae -subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index 25b72a7..4247189 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -5,6 +5,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select X86_AMD_FIXED_MTRRS select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_UNDISCLOSED diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index ea06ced..c33c642 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -10,4 +10,3 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae -subdirs-y += ../../../x86/smm diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 8e40c73..e234cab 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -12,6 +12,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 247c266..2f2c128 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@ subdirs-y += ../microcode subdirs-y += ../turbo -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*) diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 289aa62..9a7f6bb 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -12,6 +12,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 99ef0ed..08b6191 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -15,7 +15,6 @@ subdirs-y += ../smm/gen1 subdirs-y += ../turbo subdirs-y += ../../x86/name -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-25-*) diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 500a717..cfb12d9 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -12,6 +12,7 @@ select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 5d44eef..00802fc 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -19,7 +19,6 @@ subdirs-y += ../smm/gen1 subdirs-y += ../turbo subdirs-y += ../../x86/name -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-2a-*) diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 8d0804e..ae48885 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -14,6 +14,7 @@ select CPU_INTEL_MODEL_6XX select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index de4dae6..c071ec8 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../model_68x subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/smm subdirs-y += ../microcode bootblock-y += ../car/p3/cache_as_ram.S diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index 5852a10..c66e463 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -8,6 +8,7 @@ select CPU_INTEL_MODEL_106CX select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index c5b3223..a502290 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -10,5 +10,4 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 9862038..8b92d36 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -3,6 +3,7 @@ select CPU_INTEL_MODEL_1067X select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index de3c201..7c7149d 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -10,5 +10,4 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index b79427e..bb1e1a6 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -10,6 +10,7 @@ select CPU_INTEL_MODEL_106CX select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 47dd01d..8f360f1 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -10,5 +10,4 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 9b039fc..ca0a513 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -11,6 +11,7 @@ select CPU_INTEL_MODEL_1067X select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index cfe19d1..5f3ef15 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,5 +14,4 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 1860ff1..e13e1d0 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -9,6 +9,7 @@ select CPU_INTEL_MODEL_6FX select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index 7f814cc..6d28bab 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -11,5 +11,4 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index bc3f5ba..02145d5 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -8,6 +8,7 @@ select CPU_INTEL_MODEL_F2X select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 6d8b838..5e17ab8 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_f2x subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index 506fbeb..6c8c3f7 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -4,6 +4,7 @@ select CPU_INTEL_MODEL_6FX select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select MMX select SSE diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 3974e1c..5d5f520 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -11,5 +11,4 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index ad130f2..6ab327f 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -8,6 +8,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select SMP select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index c3d0aad..d2738cf 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -7,5 +7,4 @@ ramstage-y += qemu.c -subdirs-y += ../x86/smm subdirs-y += ../x86/tsc diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 617e093..dddd911 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -10,6 +10,10 @@ bool default n +config CPU_X86_SMM + bool + default n + # TODO These two options look too similar config PARALLEL_CPU_INIT bool diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index ac30700..9616bb4 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -2,6 +2,7 @@ subdirs-$(CONFIG_CPU_X86_CACHE) += cache subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic subdirs-$(CONFIG_CPU_X86_MTRR) += mtrr +subdirs-$(CONFIG_CPU_X86_SMM) += smm subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c ramstage-y += backup_default_smm.c diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 3d3968b..e6ed611 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -15,6 +15,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 3b2b497..b293eb6 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/pae -subdirs-y += ../../../cpu/x86/smm subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage bootblock-y += bootblock/pre_c.S diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index ac629fd..59d2be5 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -15,6 +15,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 2019fb0..231f0d9 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/pae -subdirs-y += ../../../cpu/x86/smm bootblock-$(CONFIG_STONEYRIDGE_UART) += uart.c bootblock-y += BiosCallOuts.c diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 2421d26..1b2337f 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -31,6 +31,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 5e58538..1058cf2 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 3ac33cf..1f7a804 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -16,6 +16,7 @@ select CACHE_MRC_SETTINGS select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index a2e4340..fa8519e 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index b02f4f3..c5ff0fa 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -16,6 +16,7 @@ select CACHE_MRC_SETTINGS select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select HAVE_SMI_HANDLER diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 701424b..df52b7f 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 515026b..bd810ad 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -19,6 +19,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index da42f35..1a361e5 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) subdirs-y += romstage -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index a77a8a1..9c7bad9 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -69,6 +69,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select FSP_COMPRESS_FSP_S_LZMA select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index ec4e82b..c4ef987 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 7532ccb..18dba59 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -17,6 +17,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 3bd2106..84dc846 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index b2cf82d..b6453cd 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -18,6 +18,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 8ae39f7..4d744bc 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc # all (bootblock, verstage, romstage, postcar, ramstage) diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index eb34598..a3a673d 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -19,6 +19,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index f87d0fd..8262c32 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc # all (bootblock, verstage, romstage, postcar, ramstage) diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 37ae68d..a753db8 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -31,6 +31,7 @@ select CPU_INTEL_COMMON_HYPERTHREADING select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index c858d1e..9dbfa26 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 8c73d76..c3105c8 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -19,6 +19,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_SMM select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 27b62a0..848a5b0 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc # all (bootblock, verstage, romstage, postcar, ramstage) diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 540212c..7ab0ed0 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -8,6 +8,7 @@ config SOC_INTEL_SKYLAKE_SP bool + select CPU_X86_SMM if HAVE_SMI_HANDLER select XEON_SP_COMMON_BASE select PLATFORM_USES_FSP2_0 help diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index db29e1c..7d4ece7 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo subdirs-y += ../../../../cpu/x86/tsc -subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm postcar-y += soc_util.c -- To view, visit https://review.coreboot.org/c/coreboot/+/44231 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I478d3fd37d9f9c0daa4a704fdf5ba92b2028bf43 Gerrit-Change-Number: 44231 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

3 8

Change in coreboot[master]: inteltool: Add Intel 200 and Z370 series chipset
by Iru Cai (vimacs) (Code Review) 25 Oct '21

25 Oct '21

Hello Iru Cai, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/35909 to review the following change. Change subject: inteltool: Add Intel 200 and Z370 series chipset ...................................................................... inteltool: Add Intel 200 and Z370 series chipset These chipsets are in the "Intel 200 (including X299) and Intel Z370 Series Chipset Families Platform Controller Hub (PCH)" datasheet (document number 335192). Change-Id: I4bad85eebab3991048907e5bd4783ad4e6ffa641 Signed-off-by: Iru Cai <mytbk920423(a)gmail.com> --- M util/inteltool/gpio.c M util/inteltool/gpio_groups.c M util/inteltool/inteltool.c M util/inteltool/inteltool.h M util/inteltool/pcr.c 5 files changed, 36 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/35909/1 diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index efeab56..97e1419 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -1070,6 +1070,13 @@ case PCI_DEVICE_ID_INTEL_QM370: case PCI_DEVICE_ID_INTEL_HM370: case PCI_DEVICE_ID_INTEL_CM246: + case PCI_DEVICE_ID_INTEL_Z270: + case PCI_DEVICE_ID_INTEL_H270: + case PCI_DEVICE_ID_INTEL_B250: + case PCI_DEVICE_ID_INTEL_Q250: + case PCI_DEVICE_ID_INTEL_Q270: + case PCI_DEVICE_ID_INTEL_X299: + case PCI_DEVICE_ID_INTEL_Z370: print_gpio_groups(sb); return 0; case PCI_DEVICE_ID_INTEL_82371XX: diff --git a/util/inteltool/gpio_groups.c b/util/inteltool/gpio_groups.c index 321cf97..d43983d 100644 --- a/util/inteltool/gpio_groups.c +++ b/util/inteltool/gpio_groups.c @@ -2239,6 +2239,13 @@ case PCI_DEVICE_ID_INTEL_QM170: case PCI_DEVICE_ID_INTEL_HM170: case PCI_DEVICE_ID_INTEL_CM236: + case PCI_DEVICE_ID_INTEL_Z270: + case PCI_DEVICE_ID_INTEL_H270: + case PCI_DEVICE_ID_INTEL_B250: + case PCI_DEVICE_ID_INTEL_Q250: + case PCI_DEVICE_ID_INTEL_Q270: + case PCI_DEVICE_ID_INTEL_X299: + case PCI_DEVICE_ID_INTEL_Z370: community_count = ARRAY_SIZE(sunrise_communities); communities = sunrise_communities; pcr_init(sb); diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index db80bd2..8fef3b4 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -275,6 +275,13 @@ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C621_SUPER, "C621 Super SKU" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C627_SUPER_2, "C627 Super SKU" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C628_SUPER, "C628 Super SKU" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Z270, "Z270" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H270, "H270" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_B250, "B250" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Q250, "Q250" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Q270, "Q270" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X299, "X299" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Z370, "Z370" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H310, "H310" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H370, "H370" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Z390, "Z390" }, diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index fc6dc4b..def78c6 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -184,6 +184,14 @@ #define PCI_DEVICE_ID_INTEL_C627_SUPER_2 0xa245 #define PCI_DEVICE_ID_INTEL_C628_SUPER 0xa246 +#define PCI_DEVICE_ID_INTEL_Z270 0xa2c5 +#define PCI_DEVICE_ID_INTEL_H270 0xa2c4 +#define PCI_DEVICE_ID_INTEL_B250 0xa2c8 +#define PCI_DEVICE_ID_INTEL_Q250 0xa2c7 +#define PCI_DEVICE_ID_INTEL_Q270 0xa2c6 +#define PCI_DEVICE_ID_INTEL_X299 0xa2d2 +#define PCI_DEVICE_ID_INTEL_Z370 0xa2c9 + #define PCI_DEVICE_ID_INTEL_H310 0xa303 #define PCI_DEVICE_ID_INTEL_H370 0xa304 #define PCI_DEVICE_ID_INTEL_Z390 0xa305 diff --git a/util/inteltool/pcr.c b/util/inteltool/pcr.c index ef6bb39..b6dc5e8 100644 --- a/util/inteltool/pcr.c +++ b/util/inteltool/pcr.c @@ -117,6 +117,13 @@ case PCI_DEVICE_ID_INTEL_C627_SUPER_2: case PCI_DEVICE_ID_INTEL_C628_SUPER: case PCI_DEVICE_ID_INTEL_DNV_LPC: + case PCI_DEVICE_ID_INTEL_Z270: + case PCI_DEVICE_ID_INTEL_H270: + case PCI_DEVICE_ID_INTEL_B250: + case PCI_DEVICE_ID_INTEL_Q250: + case PCI_DEVICE_ID_INTEL_Q270: + case PCI_DEVICE_ID_INTEL_X299: + case PCI_DEVICE_ID_INTEL_Z370: p2sb = pci_get_dev(sb->access, 0, 0, 0x1f, 1); break; case PCI_DEVICE_ID_INTEL_APL_LPC: -- To view, visit https://review.coreboot.org/c/coreboot/+/35909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4bad85eebab3991048907e5bd4783ad4e6ffa641 Gerrit-Change-Number: 35909 Gerrit-PatchSet: 1 Gerrit-Owner: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-MessageType: newchange

3 2

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2020