Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce `CPU_X86_LAPIC` ......................................................................
cpu/x86: Introduce `CPU_X86_LAPIC`
There's no need for relative paths with Kconfig options.
Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 65 files changed, 36 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/44228/1
diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index 9cea893..b9354c1 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY14 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index 7288fe6..fbde30e 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -8,7 +8,6 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index b8aadb4..7b83c0c 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY15_TN bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index b1a3a21..abc8609 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index e608e39..0b31d7b 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_AGESA_FAMILY16_KB bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index f077663..d22a6b7 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -8,7 +8,6 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index bd1b04c..1b7423f 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_PI_00630F01 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS
if CPU_AMD_PI_00630F01 diff --git a/src/cpu/amd/pi/00630F01/Makefile.inc b/src/cpu/amd/pi/00630F01/Makefile.inc index b1a3a21..abc8609 100644 --- a/src/cpu/amd/pi/00630F01/Makefile.inc +++ b/src/cpu/amd/pi/00630F01/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index 0434f4c..3f41e5a 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_PI_00660F01 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS
if CPU_AMD_PI_00660F01 diff --git a/src/cpu/amd/pi/00660F01/Makefile.inc b/src/cpu/amd/pi/00660F01/Makefile.inc index 60963b1..a19ca89 100644 --- a/src/cpu/amd/pi/00660F01/Makefile.inc +++ b/src/cpu/amd/pi/00660F01/Makefile.inc @@ -7,7 +7,6 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index 3d4226a..f809f3f 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -3,6 +3,7 @@ config CPU_AMD_PI_00730F01 bool select CPU_X86_CACHE + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_UNDISCLOSED diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index 0cc5be2..a95bb4b 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -9,7 +9,6 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 18fc392..a026108 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -10,6 +10,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 6cfbc38..ddcc51d 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@
subdirs-y += ../microcode subdirs-y += ../turbo -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 19bc366..0ed4338 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -10,6 +10,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE + select CPU_X86_LAPIC select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 6d73d61..e8c4924 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 74abbbc..61c8da2 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -10,6 +10,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE + select CPU_X86_LAPIC select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 58e3762..8488a8f 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -18,7 +18,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 2b6deb6..689def0 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -12,6 +12,7 @@ select CPU_INTEL_MODEL_68X select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX + select CPU_X86_LAPIC select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index 2ec9368..f44757a 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -9,7 +9,6 @@ subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/smm subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index af43f72..bf16db7 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -6,6 +6,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_LAPIC select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index ea10f6c..e69ef26 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 638653c..b986c4c 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -1,6 +1,7 @@ config CPU_INTEL_SOCKET_BGA956 bool select CPU_INTEL_MODEL_1067X + select CPU_X86_LAPIC select MMX select SSE
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index 03d1871..17aa3d1 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 5105f09..ff258e7 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -8,6 +8,7 @@ config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX + select CPU_X86_LAPIC select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 2122344..26e58b1 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -10,7 +10,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 784cd89..4ac9060 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -9,6 +9,7 @@ select CPU_INTEL_MODEL_F3X select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X + select CPU_X86_LAPIC select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index c4f8e26..cb69052 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index 8b1f5ed..ad9c473 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -7,6 +7,7 @@ def_bool y select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX + select CPU_X86_LAPIC select MMX select SSE
diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index 9ae5844..0541703f 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 176ae9e..03e910a 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -6,6 +6,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_F2X + select CPU_X86_LAPIC select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index edf9ac6..1e160d0 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,7 +1,6 @@ subdirs-y += ../model_f2x subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index a7c8ab1..5755d6b 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -2,6 +2,7 @@ bool select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX + select CPU_X86_LAPIC select MMX select SSE
diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 605e08e..7692987 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -11,7 +11,6 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/lapic subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 21ada02..bf5bac3 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -6,6 +6,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select SMP select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index fb560d6..5f54262 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -8,6 +8,5 @@ ramstage-y += qemu.c
subdirs-y += ../x86/mtrr -subdirs-y += ../x86/lapic subdirs-y += ../x86/smm subdirs-y += ../x86/tsc diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index e4e6ee7..334fd95 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -2,6 +2,10 @@ bool default n
+config CPU_X86_LAPIC + bool + default n + # TODO These two options look too similar config PARALLEL_CPU_INIT bool diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 3b9f872..8b4f522 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,5 +1,6 @@ subdirs-y += pae subdirs-$(CONFIG_CPU_X86_CACHE) += cache +subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c ramstage-y += backup_default_smm.c diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 526900a..bee9ec6 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -13,6 +13,7 @@ select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index aed70ef..c4a0f54 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index b29bd99..b88d031 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -13,6 +13,7 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select CPU_X86_LAPIC select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 91112fc..4c9ea38 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index f837a2e..62b984a 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -29,6 +29,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index cc36d74..fe62311 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index b23f56d..39da73d 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -14,6 +14,7 @@ select ARCH_RAMSTAGE_X86_32 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS + select CPU_X86_LAPIC select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index bfa1846..17cc9cf 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index bf067da..65f5b62 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -14,6 +14,7 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS + select CPU_X86_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select HAVE_SMI_HANDLER diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index fcdb4a6..b8f5abe 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 156d58a..69ab95b 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -17,6 +17,7 @@ select MRC_SETTINGS_PROTECT select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 28b7c29..3a18110 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index d36e214..ac7b87d 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -67,6 +67,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_COMPRESS_FSP_S_LZMA select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 96f1f97..979dccc 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 3fce223..e8a68d1 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -15,6 +15,7 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES + select CPU_X86_LAPIC select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index a9bfb65..9e3e1a8 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 1230675..02300a8 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -16,6 +16,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 05f4846..8ecb332 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index f2922f5..eed1b02 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -17,6 +17,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 1cba218..0b27e2c 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 9f9cb18..13e52cd 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -29,6 +29,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_COMMON_HYPERTHREADING + select CPU_X86_LAPIC select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index de516c1..62dbf7d 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 2659357..25ee119 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -17,6 +17,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_X86_LAPIC select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index c4f71c7..23af5fe 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index cf9ba94..5aa058d 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -30,6 +30,7 @@ select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES + select CPU_X86_LAPIC select POSTCAR_CONSOLE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 89f18d1..04972ee 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y)
subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/lapic subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-y += ../../../../cpu/intel/microcode diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 048e265..657136f 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/lapic subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm
Hello build bot (Jenkins), David Guckian, Patrick Georgi, Martin Roth, Vanessa Eusebio, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44228
to look at the new patch set (#3).
Change subject: cpu/x86: Introduce `CPU_X86_LAPIC` ......................................................................
cpu/x86: Introduce `CPU_X86_LAPIC`
There's no need for relative paths with Kconfig options.
Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 65 files changed, 36 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/44228/3
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce `CPU_X86_LAPIC` ......................................................................
Patch Set 4:
It looks like all X86 coreboot supports have a lapic. All Intel CPU's have a lapic since the first pentium (P54 released in 1994 according to wikipedia) . Maybe you can just unconditionally include it with a comment that we probably won't support museum-worthy hardware?
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce `CPU_X86_LAPIC` ......................................................................
Abandoned
Sorry, I ran out of patience and energy to care about these changes any longer.
Angel Pons has restored this change. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce `CPU_X86_LAPIC` ......................................................................
Restored
Attention is currently required from: Felix Held. Felix Held has uploaded a new patch set (#5) to the change originally created by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce and use `CPU_X86_LAPIC` ......................................................................
cpu/x86: Introduce and use `CPU_X86_LAPIC`
With using a Kconfig option to add the x86 LAPIC support code to the build, there's no need for adding the corresponding directory to subdirs in the CPU/SoC Makefile. Comparing which CPU/SoC Makefiles added (cpu/)x86/mtrr and (cpu/)x86/lapic before this and the corresponding MTRR code selection patch and having verified that all platforms added the MTRR code on that patch shows that soc/example/min86 and soc/intel/quark are the only platforms that don't end up selecting the LAPIC code. So for now the default value of CPU_X86_LAPIC is chosen as y which gets overridden to n in the Kconfig of the two SoCs mentioned above.
Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Signed-off-by: Angel Pons th3fanbus@gmail.com Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/soc/example/min86/Kconfig M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Makefile.inc M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/elkhartlake/Makefile.inc M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 33 files changed, 13 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/44228/5
Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Angel Pons, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Christian Walter, Suresh Bellampalli, Michal Motyl, Tim Chu, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce and use `CPU_X86_LAPIC` ......................................................................
Patch Set 5: Code-Review+2
Attention is currently required from: Jason Glenesk, Raul Rangel, Anjaneya "Reddy" Chagam, Mariusz Szafrański, Marshall Dawson, Jonathan Zhang, Johnny Lin, Christian Walter, Suresh Bellampalli, Michal Motyl, Tim Chu, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce and use `CPU_X86_LAPIC` ......................................................................
Patch Set 5: Code-Review+2
(1 comment)
Patchset:
PS5: My +2 is only for Felix's part, not my own.
Attention is currently required from: Jason Glenesk, Raul Rangel, Anjaneya "Reddy" Chagam, Mariusz Szafrański, Jonathan Zhang, Johnny Lin, Christian Walter, Suresh Bellampalli, Angel Pons, Michal Motyl, Tim Chu, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce and use `CPU_X86_LAPIC` ......................................................................
Patch Set 5: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44228 )
Change subject: cpu/x86: Introduce and use `CPU_X86_LAPIC` ......................................................................
cpu/x86: Introduce and use `CPU_X86_LAPIC`
With using a Kconfig option to add the x86 LAPIC support code to the build, there's no need for adding the corresponding directory to subdirs in the CPU/SoC Makefile. Comparing which CPU/SoC Makefiles added (cpu/)x86/mtrr and (cpu/)x86/lapic before this and the corresponding MTRR code selection patch and having verified that all platforms added the MTRR code on that patch shows that soc/example/min86 and soc/intel/quark are the only platforms that don't end up selecting the LAPIC code. So for now the default value of CPU_X86_LAPIC is chosen as y which gets overridden to n in the Kconfig of the two SoCs mentioned above.
Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Signed-off-by: Angel Pons th3fanbus@gmail.com Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/44228 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/soc/example/min86/Kconfig M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Makefile.inc M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/elkhartlake/Makefile.inc M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 33 files changed, 13 insertions(+), 31 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Angel Pons: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index 5ee0f82..003aa1f 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -7,4 +7,3 @@ ramstage-y += model_14_init.c
subdirs-y += ../../mtrr -subdirs-y += ../../../x86/lapic diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index 86d840b..a591447 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -10,4 +10,3 @@
subdirs-y += ../../mtrr subdirs-y += ../../smm -subdirs-y += ../../../x86/lapic diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index 1cc8eff..9464372 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -7,4 +7,3 @@ ramstage-y += model_16_init.c
subdirs-y += ../../mtrr -subdirs-y += ../../../x86/lapic diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index f2263d0..51f90ef 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -8,4 +8,3 @@ ramstage-y += update_microcode.c
subdirs-y += ../../mtrr -subdirs-y += ../../../x86/lapic diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index ec0ceea..b425efd 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@
postcar-y += ../car/non-evict/exit_car.S
-subdirs-y += ../../x86/lapic subdirs-y += ../microcode subdirs-y += ../turbo
diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index fb85bdf..b676eb6a 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -1,6 +1,5 @@ ramstage-y += model_2065x_init.c subdirs-y += ../../x86/name -subdirs-y += ../../x86/lapic subdirs-y += ../../intel/turbo subdirs-y += ../../intel/microcode subdirs-y += ../smm/gen1 diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index fec509c..90dfeb3 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -2,7 +2,6 @@ subdirs-y += ../../x86/name subdirs-y += ../smm/gen1
-subdirs-y += ../../x86/lapic subdirs-y += ../microcode subdirs-y += ../turbo
diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index b2422f4..856ecf6 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -7,7 +7,6 @@ subdirs-y += ../model_67x subdirs-y += ../model_68x subdirs-y += ../model_6bx -subdirs-y += ../../x86/lapic subdirs-y += ../microcode
bootblock-y += ../car/p3/cache_as_ram.S diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index e338ea1..58ec230 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_106cx -subdirs-y += ../../x86/lapic subdirs-y += ../microcode subdirs-y += ../speedstep
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index 5f92919..8cafa7e 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_1067x -subdirs-y += ../../x86/lapic subdirs-y += ../microcode subdirs-y += ../speedstep
diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 48ba3a9..f6d54c9 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_106cx -subdirs-y += ../../x86/lapic subdirs-y += ../microcode subdirs-y += ../speedstep
diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index 5200168..9b08be6 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -2,7 +2,6 @@ subdirs-y += ../model_f3x subdirs-y += ../model_f4x subdirs-y += ../model_1067x -subdirs-y += ../../x86/lapic subdirs-y += ../microcode subdirs-y += ../speedstep
diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index 42e1806..b50dee5 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -6,5 +6,3 @@ romstage-y += ../intel/car/romstage.c
ramstage-y += qemu.c - -subdirs-y += ../x86/lapic diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index bae3889..a289325 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -4,6 +4,10 @@ help Add the x86_enable_cache ramstage helper function to the build.
+config CPU_X86_LAPIC + bool + default y + config PARALLEL_MP def_bool y depends on !LEGACY_SMP_INIT diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 05df6e0..a6c51d0 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,4 +1,5 @@ subdirs-$(CONFIG_CPU_X86_CACHE_HELPER) += cache +subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic subdirs-y += mtrr subdirs-y += pae subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 5e6b257..8787441 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -2,8 +2,6 @@
ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
-subdirs-y += ../../../cpu/x86/lapic - subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
# Beware that all-y also adds the compilation unit to verstage on PSP diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index e3eab29..45e9c80 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -2,7 +2,6 @@
ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
-subdirs-y += ../../../cpu/x86/lapic subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 4a126d8..fd3ebf7 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
subdirs-y += ../../../cpu/amd/mtrr/ -subdirs-y += ../../../cpu/x86/lapic
bootblock-y += uart.c bootblock-y += BiosCallOuts.c diff --git a/src/soc/example/min86/Kconfig b/src/soc/example/min86/Kconfig index 660bf36..560f220 100644 --- a/src/soc/example/min86/Kconfig +++ b/src/soc/example/min86/Kconfig @@ -19,6 +19,10 @@ select NO_MMCONF_SUPPORT select UNKNOWN_TSC_RATE
+config CPU_X86_LAPIC + bool + default n + config DCACHE_BSP_STACK_SIZE # required by arch/x86/car.ld default 0x100
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index bd554b9..d857e8b 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -2,7 +2,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 3a723dc..a557d1e 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
bootblock-y += bootblock/bootblock.c bootblock-y += ../common/block/cpu/pm_timer_emulation.c diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 33aaba0..2bd558d 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 07bd26f..4ecb4e7 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index bc15e1f..3c8bf57 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/intel/common
bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 3fdff0d..5d9b327 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
bootblock-y += bootblock/bootblock.c bootblock-y += spi.c diff --git a/src/soc/intel/elkhartlake/Makefile.inc b/src/soc/intel/elkhartlake/Makefile.inc index c32ba1f..3ac46ef 100644 --- a/src/soc/intel/elkhartlake/Makefile.inc +++ b/src/soc/intel/elkhartlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 847418d..90c3036 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 276f3c0..d718dd8 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 1a9bfef..bf9d475 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -24,6 +24,10 @@ select USE_MARCH_586 select NO_SMM
+config CPU_X86_LAPIC + bool + default n + ##### # Debug serial output # The following options configure the debug serial port diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 775bec1..ea96caa 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
bootblock-y += bootblock/bootblock.c bootblock-y += i2c.c diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 9e5a3c8..6da5e00 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/lapic
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index ef38ce8..0cd267b 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y)
subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/lapic subdirs-y += ../../../../cpu/intel/microcode
romstage-y += romstage.c ddr.c diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index b0714d4..f7599a3 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/lapic
postcar-y += soc_util.c
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Angel Pons (Code Review) -
Arthur Heymans (Code Review)
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Felix Held (Code Review)
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Marshall Dawson (Code Review)
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Tim Wawrzynczak (Code Review)