coreboot-gerrit September 2020

coreboot-gerrit@coreboot.org

1 participants
2629 discussions

Change in coreboot[master]: mb/google/hatch,dedede,volteer: enable CHROMEOS_DRAM_PART_NUMBER_IN_CBI
by Nick Vaccaro (Code Review) 06 Oct '20

06 Oct '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45883 ) Change subject: mb/google/hatch,dedede,volteer: enable CHROMEOS_DRAM_PART_NUMBER_IN_CBI ...................................................................... mb/google/hatch,dedede,volteer: enable CHROMEOS_DRAM_PART_NUMBER_IN_CBI Enable CHROMEOS_DRAM_PART_NUMBER_IN_CBI on hatch, dedede, and volteer to use the common version of mainboard_get_dram_part_num(). Remove duplicate instances of mainboard_get_dram_part_num(). BUG=b:169789558, b:168724473 TEST="emerge-volteer coreboot && emerge-hatch coreboot && emerge-dedede coreboot" and verify it builds. Change-Id: I4e29d3e7ef0f3370eab9a6996a5c4a21a636b40e Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/romstage.c M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/romstage_spd_cbfs.c M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/romstage.c 6 files changed, 3 insertions(+), 50 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/45883/1 diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index bd7d36e..f3b2b0a 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -36,6 +36,7 @@ config CHROMEOS bool default y + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI select CHROMEOS_CSE_BOARD_RESET_OVERRIDE select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_FORCE_DEV_SWITCH_ON diff --git a/src/mainboard/google/dedede/romstage.c b/src/mainboard/google/dedede/romstage.c index e143f70..02ebfac 100644 --- a/src/mainboard/google/dedede/romstage.c +++ b/src/mainboard/google/dedede/romstage.c @@ -21,16 +21,3 @@ memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated); } - -const char *mainboard_get_dram_part_num(void) -{ - static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; - - if (google_chromeec_cbi_get_dram_part_num(&part_num_store[0], - sizeof(part_num_store)) < 0) { - printk(BIOS_ERR, "No DRAM part number in CBI!\n"); - return NULL; - } - - return part_num_store; -} diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index ecf156f..257ad77 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -47,6 +47,7 @@ config CHROMEOS bool default y + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if !ROMSTAGE_SPD_SMBUS select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_BOOT_USB diff --git a/src/mainboard/google/hatch/romstage_spd_cbfs.c b/src/mainboard/google/hatch/romstage_spd_cbfs.c index b8937de..f3c38bb 100644 --- a/src/mainboard/google/hatch/romstage_spd_cbfs.c +++ b/src/mainboard/google/hatch/romstage_spd_cbfs.c @@ -56,28 +56,3 @@ cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); } - -const char *mainboard_get_dram_part_num(void) -{ - static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; - static enum { - PART_NUM_NOT_READ, - PART_NUM_AVAILABLE, - PART_NUM_NOT_IN_CBI, - } part_num_state = PART_NUM_NOT_READ; - - if (part_num_state == PART_NUM_NOT_READ) { - if (google_chromeec_cbi_get_dram_part_num(&part_num_store[0], - sizeof(part_num_store)) < 0) { - printk(BIOS_ERR, "No DRAM part number in CBI!\n"); - part_num_state = PART_NUM_NOT_IN_CBI; - } else { - part_num_state = PART_NUM_AVAILABLE; - } - } - - if (part_num_state == PART_NUM_NOT_IN_CBI) - return NULL; - - return part_num_store; -} diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index f32b54a..eef8fe3 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -34,6 +34,7 @@ config CHROMEOS bool default y + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI select CHROMEOS_CSE_BOARD_RESET_OVERRIDE if SOC_INTEL_CSE_LITE_SKU select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_FORCE_DEV_SWITCH_ON diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 51a4ebc..720ab7f 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -28,15 +28,3 @@ meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated); } - -const char *mainboard_get_dram_part_num(void) -{ - static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; - - if (google_chromeec_cbi_get_dram_part_num(part_num_store, - sizeof(part_num_store)) < 0) { - printk(BIOS_ERR, "ERROR: Couldn't obtain DRAM part number from CBI\n"); - return NULL; - } - return part_num_store; -} -- To view, visit https://review.coreboot.org/c/coreboot/+/45883 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e29d3e7ef0f3370eab9a6996a5c4a21a636b40e Gerrit-Change-Number: 45883 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

2 8

Change in coreboot[master]: vendorcode/google: add SPD_PART_NUMBER_IN_CBI Kconfig option
by Nick Vaccaro (Code Review) 06 Oct '20

06 Oct '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45635 ) Change subject: vendorcode/google: add SPD_PART_NUMBER_IN_CBI Kconfig option ...................................................................... vendorcode/google: add SPD_PART_NUMBER_IN_CBI Kconfig option Add SPD_PART_NUMBER_IN_CBI Kconfig option to declare whether the SPD Module Part Number (memory part name) is stored in the CBI. BUG=b:168724473 TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot volteer to kernel and verify that the BIOS log shows a part name when logging SPD information: SPD: module part number is K4U6E3S4AA-MGCL I also built coreboot for hatch and dedede and verified that the build succeeds without error. Change-Id: I0d393efd0fc731daa70d3990e5b69865be99b78b Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/hatch/Kconfig M src/mainboard/google/volteer/Kconfig M src/vendorcode/google/chromeos/Kconfig 4 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/45635/1 diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 79c2995..bc01ab9 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -37,6 +37,7 @@ bool default y select CHROMEOS_CSE_BOARD_RESET_OVERRIDE + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_BOOT_USB diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index ca310ed..44259a4 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -47,6 +47,7 @@ config CHROMEOS bool default y + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if !ROMSTAGE_SPD_SMBUS select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_BOOT_USB diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index d2880bf..34d34d0 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -35,6 +35,7 @@ bool default y select CHROMEOS_CSE_BOARD_RESET_OVERRIDE if SOC_INTEL_CSE_LITE_SKU + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI select EC_GOOGLE_CHROMEEC_SWITCHES select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_BOOT_USB diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index 0528d00..3b335a4 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -103,5 +103,12 @@ does not understand the new cr50 strap config (applicable only to boards using strap config 0xe). Enabling this config will help to override the default global reset. +config CHROMEOS_DRAM_PART_NUMBER_IN_CBI + def_bool y + depends on EC_GOOGLE_CHROMEEC + help + Some boards declare the DRAM part number in the CBI instead of the SPD. This option + allows those boards to declare that their DRAM part number is stored in the CBI. + endif # CHROMEOS endmenu -- To view, visit https://review.coreboot.org/c/coreboot/+/45635 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d393efd0fc731daa70d3990e5b69865be99b78b Gerrit-Change-Number: 45635 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

2 24

Change in coreboot[master]: soc: move mainboard_get_dram_part_num prototype to memory_info.h
by Nick Vaccaro (Code Review) 06 Oct '20

06 Oct '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45879 ) Change subject: soc: move mainboard_get_dram_part_num prototype to memory_info.h ...................................................................... soc: move mainboard_get_dram_part_num prototype to memory_info.h BUG=b:169774661, b:168724473 TEST="emerge-volteer coreboot && emerge-nocturne coreboot && emerge-dedede coreboot" and verify they build successfully. Change-Id: I8b228475621ca1035fe13f8311355fc3b926e897 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/include/memory_info.h M src/soc/intel/alderlake/include/soc/romstage.h M src/soc/intel/cannonlake/include/soc/romstage.h M src/soc/intel/elkhartlake/include/soc/romstage.h M src/soc/intel/jasperlake/include/soc/romstage.h M src/soc/intel/tigerlake/include/soc/romstage.h 6 files changed, 6 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/45879/1 diff --git a/src/include/memory_info.h b/src/include/memory_info.h index d9d9c37..1ba7329 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -108,4 +108,10 @@ struct dimm_info dimm[DIMM_INFO_TOTAL]; } __packed; +/* + * mainboard_get_dram_part_num returns a DRAM part number override string + * return NULL = no part number override provided by mainboard + * return non-NULL = pointer to a string terminating in '\0' + */ +const char *mainboard_get_dram_part_num(void); #endif diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h index 55469a3..c72c8aa 100644 --- a/src/soc/intel/alderlake/include/soc/romstage.h +++ b/src/soc/intel/alderlake/include/soc/romstage.h @@ -6,8 +6,6 @@ #include <fsp/api.h> #include <stddef.h> -/* Provide a callback to allow mainboard to override the DRAM part number. */ -const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h index f99175f..ae9aa60 100644 --- a/src/soc/intel/cannonlake/include/soc/romstage.h +++ b/src/soc/intel/cannonlake/include/soc/romstage.h @@ -7,8 +7,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd); -/* Provide a callback to allow mainboard to override the DRAM part number. */ -const char *mainboard_get_dram_part_num(void); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/elkhartlake/include/soc/romstage.h b/src/soc/intel/elkhartlake/include/soc/romstage.h index 1cffcb9..3772db4 100644 --- a/src/soc/intel/elkhartlake/include/soc/romstage.h +++ b/src/soc/intel/elkhartlake/include/soc/romstage.h @@ -5,8 +5,6 @@ #include <fsp/api.h> -/* Provide a callback to allow mainboard to override the DRAM part number. */ -const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/jasperlake/include/soc/romstage.h b/src/soc/intel/jasperlake/include/soc/romstage.h index 1cffcb9..3772db4 100644 --- a/src/soc/intel/jasperlake/include/soc/romstage.h +++ b/src/soc/intel/jasperlake/include/soc/romstage.h @@ -5,8 +5,6 @@ #include <fsp/api.h> -/* Provide a callback to allow mainboard to override the DRAM part number. */ -const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/tigerlake/include/soc/romstage.h b/src/soc/intel/tigerlake/include/soc/romstage.h index 1cffcb9..3772db4 100644 --- a/src/soc/intel/tigerlake/include/soc/romstage.h +++ b/src/soc/intel/tigerlake/include/soc/romstage.h @@ -5,8 +5,6 @@ #include <fsp/api.h> -/* Provide a callback to allow mainboard to override the DRAM part number. */ -const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/45879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b228475621ca1035fe13f8311355fc3b926e897 Gerrit-Change-Number: 45879 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: lib, mb, soc: change mainboard_get_dram_part_num() prototype
by Nick Vaccaro (Code Review) 06 Oct '20

06 Oct '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45873 ) Change subject: lib, mb, soc: change mainboard_get_dram_part_num() prototype ...................................................................... lib, mb, soc: change mainboard_get_dram_part_num() prototype Change mainboard_get_dram_part_num() to return a constant character pointer to a null-terminated C string and to take no input parameters. This also addresses the issue that different SOCs and motherboards were using different definitions for mainboard_get_dram_part_num by consolidating to a single definition. BUG=b:168724473 TEST="emerge-volteer coreboot && emerge-dedede coreboot && emerge-hatch coreboot" and verify build completes successfully. Change-Id: Ie7664eab65a2b9e25b7853bf68baf2525b040487 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/dedede/romstage.c M src/mainboard/google/hatch/romstage_spd_cbfs.c M src/mainboard/google/volteer/romstage.c M src/soc/intel/alderlake/include/soc/romstage.h M src/soc/intel/alderlake/romstage/romstage.c M src/soc/intel/cannonlake/include/soc/romstage.h M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/elkhartlake/include/soc/romstage.h M src/soc/intel/elkhartlake/romstage/romstage.c M src/soc/intel/jasperlake/include/soc/romstage.h M src/soc/intel/jasperlake/romstage/romstage.c M src/soc/intel/tigerlake/include/soc/romstage.h M src/soc/intel/tigerlake/romstage/romstage.c 13 files changed, 64 insertions(+), 51 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/45873/1 diff --git a/src/mainboard/google/dedede/romstage.c b/src/mainboard/google/dedede/romstage.c index 8028db0..e143f70 100644 --- a/src/mainboard/google/dedede/romstage.c +++ b/src/mainboard/google/dedede/romstage.c @@ -22,17 +22,15 @@ memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated); } -bool mainboard_get_dram_part_num(const char **part_num, size_t *len) +const char *mainboard_get_dram_part_num(void) { static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; if (google_chromeec_cbi_get_dram_part_num(&part_num_store[0], sizeof(part_num_store)) < 0) { printk(BIOS_ERR, "No DRAM part number in CBI!\n"); - return false; + return NULL; } - *part_num = &part_num_store[0]; - *len = strlen(part_num_store); - return true; + return part_num_store; } diff --git a/src/mainboard/google/hatch/romstage_spd_cbfs.c b/src/mainboard/google/hatch/romstage_spd_cbfs.c index a9a65e9..b8937de 100644 --- a/src/mainboard/google/hatch/romstage_spd_cbfs.c +++ b/src/mainboard/google/hatch/romstage_spd_cbfs.c @@ -57,7 +57,7 @@ cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); } -void mainboard_get_dram_part_num(const char **part_num, size_t *len) +const char *mainboard_get_dram_part_num(void) { static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; static enum { @@ -77,8 +77,7 @@ } if (part_num_state == PART_NUM_NOT_IN_CBI) - return; + return NULL; - *part_num = &part_num_store[0]; - *len = strlen(part_num_store) + 1; + return part_num_store; } diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 552648b..51a4ebc 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -29,16 +29,14 @@ meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated); } -bool mainboard_get_dram_part_num(const char **part_num, size_t *len) +const char *mainboard_get_dram_part_num(void) { static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; if (google_chromeec_cbi_get_dram_part_num(part_num_store, sizeof(part_num_store)) < 0) { printk(BIOS_ERR, "ERROR: Couldn't obtain DRAM part number from CBI\n"); - return false; + return NULL; } - *part_num = part_num_store; - *len = strlen(part_num_store); - return true; + return part_num_store; } diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h index 716602c..55469a3 100644 --- a/src/soc/intel/alderlake/include/soc/romstage.h +++ b/src/soc/intel/alderlake/include/soc/romstage.h @@ -7,7 +7,7 @@ #include <stddef.h> /* Provide a callback to allow mainboard to override the DRAM part number. */ -const char *mainboard_get_dram_part_num(size_t *len); +const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index 9f4fbb6..a62a726 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -21,7 +21,7 @@ 0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \ } -__weak const char *mainboard_get_dram_part_num(size_t *len) +const char * __weak mainboard_get_dram_part_num(void) { /* Default weak implementation, no need to override part number. */ return NULL; @@ -41,7 +41,8 @@ const uint8_t smbios_memory_info_guid[sizeof(EFI_GUID)] = FSP_SMBIOS_MEMORY_INFO_GUID; const uint8_t *serial_num; const char *dram_part_num = NULL; - size_t dram_part_num_len; + size_t dram_part_num_len = 0; + bool part_name_overridden = false; /* Locate the memory info HOB, presence validated by raminit */ meminfo_hob = fsp_find_extension_hob_by_guid( @@ -64,7 +65,11 @@ memset(mem_info, 0, sizeof(*mem_info)); /* Allow mainboard to override DRAM part number. */ - dram_part_num = mainboard_get_dram_part_num(&dram_part_num_len); + dram_part_num = mainboard_get_dram_part_num(); + if (dram_part_num) { + dram_part_num_len = strlen(dram_part_num); + part_name_overridden = true; + } /* Save available DIMM information */ index = 0; @@ -84,7 +89,7 @@ /* If there is no DRAM part number overridden by * mainboard then use original one. */ - if (!dram_part_num) { + if (!part_name_overridden) { dram_part_num_len = sizeof(src_dimm->ModulePartNum); dram_part_num = (const char *) &src_dimm->ModulePartNum[0]; diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h index 4e513f0..f99175f 100644 --- a/src/soc/intel/cannonlake/include/soc/romstage.h +++ b/src/soc/intel/cannonlake/include/soc/romstage.h @@ -8,7 +8,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd); /* Provide a callback to allow mainboard to override the DRAM part number. */ -void mainboard_get_dram_part_num(const char **part_num, size_t *len); +const char *mainboard_get_dram_part_num(void); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index c56add7..74dc20f 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -23,7 +23,7 @@ 0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \ } -void __weak mainboard_get_dram_part_num(const char **part_num, size_t *len) +const char * __weak mainboard_get_dram_part_num(void) { /* Default weak implementation, no need to override part number. */ } @@ -42,7 +42,7 @@ const uint8_t smbios_memory_info_guid[16] = FSP_SMBIOS_MEMORY_INFO_GUID; const char *dram_part_num; - size_t dram_part_num_len; + size_t dram_part_num_len = 0; /* Locate the memory info HOB, presence validated by raminit */ memory_info_hob = fsp_find_extension_hob_by_guid( @@ -79,13 +79,16 @@ if (src_dimm->Status != DIMM_PRESENT) continue; - dram_part_num_len = sizeof(src_dimm->ModulePartNum); - dram_part_num = (const char *) - &src_dimm->ModulePartNum[0]; - /* Allow mainboard to override DRAM part number. */ - mainboard_get_dram_part_num(&dram_part_num, - &dram_part_num_len); + dram_part_num = mainboard_get_dram_part_num(); + if (dram_part_num) { + dram_part_num_len = strlen(dram_part_num); + } else { + dram_part_num_len = + sizeof(src_dimm->ModulePartNum); + dram_part_num = (const char *) + &src_dimm->ModulePartNum[0]; + } u8 memProfNum = memory_info_hob->MemoryProfile; diff --git a/src/soc/intel/elkhartlake/include/soc/romstage.h b/src/soc/intel/elkhartlake/include/soc/romstage.h index baa35c5..1cffcb9 100644 --- a/src/soc/intel/elkhartlake/include/soc/romstage.h +++ b/src/soc/intel/elkhartlake/include/soc/romstage.h @@ -6,7 +6,7 @@ #include <fsp/api.h> /* Provide a callback to allow mainboard to override the DRAM part number. */ -bool mainboard_get_dram_part_num(const char **part_num, size_t *len); +const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/elkhartlake/romstage/romstage.c b/src/soc/intel/elkhartlake/romstage/romstage.c index 09b1744..d7b2959 100644 --- a/src/soc/intel/elkhartlake/romstage/romstage.c +++ b/src/soc/intel/elkhartlake/romstage/romstage.c @@ -21,10 +21,10 @@ 0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \ } -bool __weak mainboard_get_dram_part_num(const char **part_num, size_t *len) +const char * __weak mainboard_get_dram_part_num(void) { /* Default implementation, no need to override part number. */ - return false; + return NULL; } /* Save the DIMM information for SMBIOS table 17 */ @@ -42,8 +42,8 @@ FSP_SMBIOS_MEMORY_INFO_GUID; const uint8_t *serial_num; const char *dram_part_num = NULL; - size_t dram_part_num_len; - bool is_dram_part_overridden = false; + size_t dram_part_num_len = 0; + bool part_name_overridden = false; /* Locate the memory info HOB, presence validated by raminit */ meminfo_hob = fsp_find_extension_hob_by_guid( @@ -66,8 +66,11 @@ memset(mem_info, 0, sizeof(*mem_info)); /* Allow mainboard to override DRAM part number. */ - is_dram_part_overridden = mainboard_get_dram_part_num(&dram_part_num, - &dram_part_num_len); + dram_part_num = mainboard_get_dram_part_num(); + if (dram_part_num) { + dram_part_num = strlen(dram_part_num); + part_name_overridden = true; + } /* Save available DIMM information */ index = 0; @@ -89,7 +92,7 @@ /* If there is no DRAM part number overridden by * mainboard then use original one. */ - if (!is_dram_part_overridden) { + if (!part_name_overridden) { dram_part_num_len = sizeof(src_dimm->ModulePartNum); dram_part_num = (const char *) &src_dimm->ModulePartNum[0]; diff --git a/src/soc/intel/jasperlake/include/soc/romstage.h b/src/soc/intel/jasperlake/include/soc/romstage.h index baa35c5..1cffcb9 100644 --- a/src/soc/intel/jasperlake/include/soc/romstage.h +++ b/src/soc/intel/jasperlake/include/soc/romstage.h @@ -6,7 +6,7 @@ #include <fsp/api.h> /* Provide a callback to allow mainboard to override the DRAM part number. */ -bool mainboard_get_dram_part_num(const char **part_num, size_t *len); +const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/jasperlake/romstage/romstage.c b/src/soc/intel/jasperlake/romstage/romstage.c index db014ea..6a3ebd6 100644 --- a/src/soc/intel/jasperlake/romstage/romstage.c +++ b/src/soc/intel/jasperlake/romstage/romstage.c @@ -21,10 +21,10 @@ 0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \ } -bool __weak mainboard_get_dram_part_num(const char **part_num, size_t *len) +const char * __weak mainboard_get_dram_part_num(void) { /* Default weak implementation, no need to override part number. */ - return false; + return NULL; } /* Save the DIMM information for SMBIOS table 17 */ @@ -42,8 +42,8 @@ FSP_SMBIOS_MEMORY_INFO_GUID; const uint8_t *serial_num; const char *dram_part_num = NULL; - size_t dram_part_num_len; - bool is_dram_part_overridden = false; + size_t dram_part_num_len = 0; + bool part_name_overridden = false; /* Locate the memory info HOB, presence validated by raminit */ meminfo_hob = fsp_find_extension_hob_by_guid( @@ -66,8 +66,12 @@ memset(mem_info, 0, sizeof(*mem_info)); /* Allow mainboard to override DRAM part number. */ - is_dram_part_overridden = mainboard_get_dram_part_num(&dram_part_num, + dram_part_num = mainboard_get_dram_part_num(&, &dram_part_num_len); + if (dram_part_num) { + dram_part_num_len = strlen(dram_part_num); + part_name_overridden = true; + } /* Save available DIMM information */ index = 0; @@ -89,7 +93,7 @@ /* If there is no DRAM part number overridden by * mainboard then use original one. */ - if (!is_dram_part_overridden) { + if (!part_name_overridden) { dram_part_num_len = sizeof(src_dimm->ModulePartNum); dram_part_num = (const char *) &src_dimm->ModulePartNum[0]; diff --git a/src/soc/intel/tigerlake/include/soc/romstage.h b/src/soc/intel/tigerlake/include/soc/romstage.h index baa35c5..1cffcb9 100644 --- a/src/soc/intel/tigerlake/include/soc/romstage.h +++ b/src/soc/intel/tigerlake/include/soc/romstage.h @@ -6,7 +6,7 @@ #include <fsp/api.h> /* Provide a callback to allow mainboard to override the DRAM part number. */ -bool mainboard_get_dram_part_num(const char **part_num, size_t *len); +const char *mainboard_get_dram_part_num(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void romstage_pch_init(void); diff --git a/src/soc/intel/tigerlake/romstage/romstage.c b/src/soc/intel/tigerlake/romstage/romstage.c index db014ea..fd18fea 100644 --- a/src/soc/intel/tigerlake/romstage/romstage.c +++ b/src/soc/intel/tigerlake/romstage/romstage.c @@ -21,10 +21,10 @@ 0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \ } -bool __weak mainboard_get_dram_part_num(const char **part_num, size_t *len) +const char * __weak mainboard_get_dram_part_num(void) { /* Default weak implementation, no need to override part number. */ - return false; + return NULL; } /* Save the DIMM information for SMBIOS table 17 */ @@ -42,8 +42,8 @@ FSP_SMBIOS_MEMORY_INFO_GUID; const uint8_t *serial_num; const char *dram_part_num = NULL; - size_t dram_part_num_len; - bool is_dram_part_overridden = false; + size_t dram_part_num_len = 0; + bool part_name_overridden = false; /* Locate the memory info HOB, presence validated by raminit */ meminfo_hob = fsp_find_extension_hob_by_guid( @@ -66,8 +66,11 @@ memset(mem_info, 0, sizeof(*mem_info)); /* Allow mainboard to override DRAM part number. */ - is_dram_part_overridden = mainboard_get_dram_part_num(&dram_part_num, - &dram_part_num_len); + dram_part_num = mainboard_get_dram_part_num(); + if (dram_part_num) { + dram_part_num_len = strlen(dram_part_num); + part_name_overridden = true; + } /* Save available DIMM information */ index = 0; @@ -89,7 +92,7 @@ /* If there is no DRAM part number overridden by * mainboard then use original one. */ - if (!is_dram_part_overridden) { + if (!part_name_overridden) { dram_part_num_len = sizeof(src_dimm->ModulePartNum); dram_part_num = (const char *) &src_dimm->ModulePartNum[0]; -- To view, visit https://review.coreboot.org/c/coreboot/+/45873 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie7664eab65a2b9e25b7853bf68baf2525b040487 Gerrit-Change-Number: 45873 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

2 17

Change in coreboot[master]: soc/intel/elkhartlake: add __weak to mainboard_get_dram_part_num()
by Nick Vaccaro (Code Review) 06 Oct '20

06 Oct '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45871 ) Change subject: soc/intel/elkhartlake: add __weak to mainboard_get_dram_part_num() ...................................................................... soc/intel/elkhartlake: add __weak to mainboard_get_dram_part_num() Add missing __weak declaration to Elkhart Lake's definition of mainboard_get_dram_part_num(). BUG=b:168724473 TEST=none Change-Id: I883d662315a9ab91eb6183ebcdfd7e7cc8064c64 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/soc/intel/elkhartlake/romstage/romstage.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/45871/1 diff --git a/src/soc/intel/elkhartlake/romstage/romstage.c b/src/soc/intel/elkhartlake/romstage/romstage.c index d68d2da..09b1744 100644 --- a/src/soc/intel/elkhartlake/romstage/romstage.c +++ b/src/soc/intel/elkhartlake/romstage/romstage.c @@ -21,7 +21,7 @@ 0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \ } -bool mainboard_get_dram_part_num(const char **part_num, size_t *len) +bool __weak mainboard_get_dram_part_num(const char **part_num, size_t *len) { /* Default implementation, no need to override part number. */ return false; -- To view, visit https://review.coreboot.org/c/coreboot/+/45871 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I883d662315a9ab91eb6183ebcdfd7e7cc8064c64 Gerrit-Change-Number: 45871 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

2 5

Change in coreboot[master]: soc/intel/icelake: Make CpuMpPpi implementation default for ICL
by Subrata Banik (Code Review) 06 Oct '20

06 Oct '20

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36839 ) Change subject: soc/intel/icelake: Make CpuMpPpi implementation default for ICL ...................................................................... soc/intel/icelake: Make CpuMpPpi implementation default for ICL TEST=Could able to build and boot ICL DE system Change-Id: Icd71ec99f06434896c73cff5a52cd3a5ad6ce5f3 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/icelake/fsp_params.c 1 file changed, 4 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/36839/1 diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index 62c69da..448b82c 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -84,12 +84,10 @@ for (i = 0; i < ARRAY_SIZE(params->Usb3OverCurrentPin); i++) params->Usb3OverCurrentPin[i] = 0; - if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) { - params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); - params->SkipMpInit = 0; - } else { - params->SkipMpInit = !CONFIG_USE_INTEL_FSP_MP_INIT; - } + /* Mandatory to make use of CpuMpPpi implementation from ICL onwards */ + params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); + /* TODO: Remove me as SkipMpInit is getting deprecated */ + params->SkipMpInit = 0; mainboard_silicon_init_params(params); -- To view, visit https://review.coreboot.org/c/coreboot/+/36839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd71ec99f06434896c73cff5a52cd3a5ad6ce5f3 Gerrit-Change-Number: 36839 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

8 30

Change in coreboot[master]: lib/ubsan.c: Remove GCC 5.x workaround
by Angel Pons (Code Review) 06 Oct '20

06 Oct '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45822 ) Change subject: lib/ubsan.c: Remove GCC 5.x workaround ...................................................................... lib/ubsan.c: Remove GCC 5.x workaround The coreboot toolchain has been using a newer GCC version for a while already. This code is build-tested from commit 13cd145e02e onwards. Change-Id: Ic324b503878c73e4560d4d8f2e0d38ecb595b8fd Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/lib/ubsan.c 1 file changed, 0 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/45822/1 diff --git a/src/lib/ubsan.c b/src/lib/ubsan.c index 6873f7e..1037b1b 100644 --- a/src/lib/ubsan.c +++ b/src/lib/ubsan.c @@ -245,15 +245,7 @@ ABORT_VARIANT_VP_VP(vla_bound_not_positive); struct ubsan_float_cast_overflow_data { -/* -* TODO: Remove this GCC 5.x compatibility after switching to GCC 6.x. The -* GCC developers accidentally forgot the source location. Their -* libubsan probes to see if it looks like a path, but we don't need -* to maintain compatibility with multiple gcc releases. See below. -*/ -#if !(defined(__GNUC__) && __GNUC__ < 6) struct ubsan_source_location location; -#endif struct ubsan_type_descriptor *from_type; struct ubsan_type_descriptor *to_type; }; @@ -264,11 +256,7 @@ (struct ubsan_float_cast_overflow_data *)data_raw; ubsan_value_handle_t from = (ubsan_value_handle_t)from_raw; (void) from; -#if !(defined(__GNUC__) && __GNUC__ < 6) ubsan_abort(&data->location, "float cast overflow"); -#else - ubsan_abort(((void) data, &unknown_location), "float cast overflow"); -#endif } ABORT_VARIANT_VP_VP(float_cast_overflow); -- To view, visit https://review.coreboot.org/c/coreboot/+/45822 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic324b503878c73e4560d4d8f2e0d38ecb595b8fd Gerrit-Change-Number: 45822 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

3 4

Change in coreboot[master]: mb/razer/blade_stealth_kbl/dsdt.asl: Use macros
by HAOUAS Elyes (Code Review) 06 Oct '20

06 Oct '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45548 ) Change subject: mb/razer/blade_stealth_kbl/dsdt.asl: Use macros ...................................................................... mb/razer/blade_stealth_kbl/dsdt.asl: Use macros Use defined macros. Also, correct the DSDT revision. Change-Id: I65aeeefeb1f144dad8826bfbe021d769df9a7135 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/razer/blade_stealth_kbl/dsdt.asl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/45548/1 diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl index ec3ca79..66e7c0c 100644 --- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl +++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl @@ -5,9 +5,9 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 - "COREv4", // OEM id - "COREBOOT", // OEM table id + 0x02, // DSDT revision: ACPI v2.0 and greater + OEM_ID, + ACPI_TABLE_CREATOR, 0x20110725 // OEM revision ){ //Platform -- To view, visit https://review.coreboot.org/c/coreboot/+/45548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65aeeefeb1f144dad8826bfbe021d769df9a7135 Gerrit-Change-Number: 45548 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 10

Change in coreboot[master]: mb/google/zork: Switch from hex spds to binary spds
by Rob Barnes (Code Review) 06 Oct '20

06 Oct '20

Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45818 ) Change subject: mb/google/zork: Switch from hex spds to binary spds ...................................................................... mb/google/zork: Switch from hex spds to binary spds review.coreboot.org/c/coreboot/+/44878 changed spd_tools to generate binary spd files instead of hexdumps. This change updates zork spds and makefiles to align with above change. BUG=None BRANCH=Zork TEST=Build and boot ezkinil Change-Id: I37689c3a005d527551baa41e36d67d1b01f0bcfb Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/zork/spd/Makefile.inc A src/mainboard/google/zork/spd/ddr4-spd-1.bin D src/mainboard/google/zork/spd/ddr4-spd-1.hex A src/mainboard/google/zork/spd/ddr4-spd-2.bin D src/mainboard/google/zork/spd/ddr4-spd-2.hex A src/mainboard/google/zork/spd/ddr4-spd-3.bin D src/mainboard/google/zork/spd/ddr4-spd-3.hex A src/mainboard/google/zork/spd/ddr4-spd-4.bin D src/mainboard/google/zork/spd/ddr4-spd-4.hex A src/mainboard/google/zork/spd/ddr4-spd-5.bin D src/mainboard/google/zork/spd/ddr4-spd-5.hex A src/mainboard/google/zork/spd/ddr4-spd-6.bin D src/mainboard/google/zork/spd/ddr4-spd-6.hex A src/mainboard/google/zork/spd/ddr4-spd-7.bin D src/mainboard/google/zork/spd/ddr4-spd-7.hex A src/mainboard/google/zork/spd/ddr4-spd-8.bin D src/mainboard/google/zork/spd/ddr4-spd-8.hex A src/mainboard/google/zork/spd/ddr4-spd-empty.bin D src/mainboard/google/zork/spd/ddr4-spd-empty.hex M src/mainboard/google/zork/spd/ddr4_spd_manifest.generated.txt M src/mainboard/google/zork/variants/berknip/spd/Makefile.inc M src/mainboard/google/zork/variants/dalboz/spd/Makefile.inc M src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc M src/mainboard/google/zork/variants/ezkinil/spd/Makefile.inc M src/mainboard/google/zork/variants/morphius/spd/Makefile.inc M src/mainboard/google/zork/variants/trembyle/spd/Makefile.inc M src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc M src/mainboard/google/zork/variants/woomax/spd/Makefile.inc 28 files changed, 78 insertions(+), 367 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/45818/1 diff --git a/src/mainboard/google/zork/spd/Makefile.inc b/src/mainboard/google/zork/spd/Makefile.inc index 1042d91..8b8e7e0 100644 --- a/src/mainboard/google/zork/spd/Makefile.inc +++ b/src/mainboard/google/zork/spd/Makefile.inc @@ -8,13 +8,12 @@ # APCB binary with magic numbers to be replaced by apcb_edit tool APCB_MAGIC_BLOB:=$(FIRMWARE_LOCATE)/APCB_magic.bin -$(obj)/APCB_%.gen: $(SPD_SOURCES_DIR)/%.hex \ +$(obj)/APCB_%.gen: $(SPD_SOURCES_DIR)/%.bin \ $(APCB_EDIT_TOOL) \ $(APCB_MAGIC_BLOB) $(APCB_EDIT_TOOL) \ $(APCB_MAGIC_BLOB) \ $@ \ - --hex \ --strip_manufacturer_information \ --spd_0_0 $< \ $(if $(APCB_POPULATE_2ND_CHANNEL), --spd_1_0 $<, ) \ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-1.bin b/src/mainboard/google/zork/spd/ddr4-spd-1.bin new file mode 100644 index 0000000..f4e10cd --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-1.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-1.hex b/src/mainboard/google/zork/spd/ddr4-spd-1.hex deleted file mode 100644 index 32d141f..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-1.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 45 21 00 08 00 00 00 00 02 03 00 00 -00 00 05 06 F8 FF 02 00 6E 6E 6E 11 00 6E F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 00 00 00 00 BC 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-2.bin b/src/mainboard/google/zork/spd/ddr4-spd-2.bin new file mode 100644 index 0000000..edd5a7f --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-2.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-2.hex b/src/mainboard/google/zork/spd/ddr4-spd-2.hex deleted file mode 100644 index 85b2035..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-2.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 85 21 91 08 00 00 00 00 01 03 00 00 -00 00 05 06 F8 FF 02 00 6E 6E 6E 11 00 6E F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 00 00 00 00 BC 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-3.bin b/src/mainboard/google/zork/spd/ddr4-spd-3.bin new file mode 100644 index 0000000..16d4768 --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-3.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-3.hex b/src/mainboard/google/zork/spd/ddr4-spd-3.hex deleted file mode 100644 index d2869ea..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-3.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 45 21 00 08 00 00 00 00 02 03 00 00 -00 00 06 07 F8 3F 00 00 73 73 73 11 00 73 F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 86 86 86 86 D6 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-4.bin b/src/mainboard/google/zork/spd/ddr4-spd-4.bin new file mode 100644 index 0000000..d7c6724 --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-4.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-4.hex b/src/mainboard/google/zork/spd/ddr4-spd-4.hex deleted file mode 100644 index b676992..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-4.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 85 21 91 08 00 00 00 00 01 03 00 00 -00 00 06 07 FC 3F 00 00 6D 6D 6D 11 00 6D F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 86 86 86 86 D6 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-5.bin b/src/mainboard/google/zork/spd/ddr4-spd-5.bin new file mode 100644 index 0000000..dd94269 --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-5.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-5.hex b/src/mainboard/google/zork/spd/ddr4-spd-5.hex deleted file mode 100644 index d72bf1e..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-5.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 85 21 00 08 00 00 00 00 01 03 00 00 -00 00 06 07 F8 3F 00 00 73 73 73 11 00 73 F0 0A -20 08 00 05 00 A8 18 2B 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 B5 00 86 86 86 86 D6 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-6.bin b/src/mainboard/google/zork/spd/ddr4-spd-6.bin new file mode 100644 index 0000000..37fca8c --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-6.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-6.hex b/src/mainboard/google/zork/spd/ddr4-spd-6.hex deleted file mode 100644 index 71cfff9..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-6.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 85 21 91 08 00 00 00 00 01 03 00 00 -00 00 06 07 F8 3F 00 00 73 73 73 11 00 73 F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 86 86 86 86 D6 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-7.bin b/src/mainboard/google/zork/spd/ddr4-spd-7.bin new file mode 100644 index 0000000..70184c0 --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-7.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-7.hex b/src/mainboard/google/zork/spd/ddr4-spd-7.hex deleted file mode 100644 index 7f92cd8..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-7.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 46 29 00 08 00 00 00 00 02 03 00 00 -00 00 05 06 F8 FF 02 00 6E 6E 6E 11 00 6E F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 00 00 00 00 BC 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-8.bin b/src/mainboard/google/zork/spd/ddr4-spd-8.bin new file mode 100644 index 0000000..a7e396b --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-8.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-8.hex b/src/mainboard/google/zork/spd/ddr4-spd-8.hex deleted file mode 100644 index aca688e..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-8.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 0C 03 46 29 00 08 00 00 00 00 02 03 00 00 -00 00 06 07 F8 3F 00 00 73 73 73 11 00 73 F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 86 86 86 86 D6 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 -20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4-spd-empty.bin b/src/mainboard/google/zork/spd/ddr4-spd-empty.bin new file mode 100644 index 0000000..a64a5a9 --- /dev/null +++ b/src/mainboard/google/zork/spd/ddr4-spd-empty.bin Binary files differ diff --git a/src/mainboard/google/zork/spd/ddr4-spd-empty.hex b/src/mainboard/google/zork/spd/ddr4-spd-empty.hex deleted file mode 100644 index 1a5be53..0000000 --- a/src/mainboard/google/zork/spd/ddr4-spd-empty.hex +++ /dev/null @@ -1,32 +0,0 @@ -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/zork/spd/ddr4_spd_manifest.generated.txt b/src/mainboard/google/zork/spd/ddr4_spd_manifest.generated.txt index 202f173..288fa09 100644 --- a/src/mainboard/google/zork/spd/ddr4_spd_manifest.generated.txt +++ b/src/mainboard/google/zork/spd/ddr4_spd_manifest.generated.txt @@ -1,15 +1,15 @@ -H5AN8G6NDJR-XNC,ddr4-spd-1.hex -MT40A512M16TB-062E:J,ddr4-spd-1.hex -H5ANAG6NCMR-XNC,ddr4-spd-2.hex -HMA851S6CJR6N-VK,ddr4-spd-3.hex -K4A8G165WC-BCTD,ddr4-spd-3.hex -H5AN8G6NCJR-VKC,ddr4-spd-3.hex -MT40A1G16KNR-075:E,ddr4-spd-4.hex -K4AAG165WB-MCTD,ddr4-spd-5.hex -H5ANAG6NCMR-VKC,ddr4-spd-6.hex -K4A8G165WC-BCWE,ddr4-spd-1.hex -MT40A1G16KD-062E:E,ddr4-spd-7.hex -K4AAG165WA-BCWE,ddr4-spd-7.hex -H5AN8G6NCJR-XNC,ddr4-spd-1.hex -K4AAG165WA-BCTD,ddr4-spd-8.hex -H5ANAG6NDMR-XNC,ddr4-spd-2.hex +H5AN8G6NDJR-XNC,ddr4-spd-1.bin +MT40A512M16TB-062E:J,ddr4-spd-1.bin +H5ANAG6NCMR-XNC,ddr4-spd-2.bin +HMA851S6CJR6N-VK,ddr4-spd-3.bin +K4A8G165WC-BCTD,ddr4-spd-3.bin +H5AN8G6NCJR-VKC,ddr4-spd-3.bin +MT40A1G16KNR-075:E,ddr4-spd-4.bin +K4AAG165WB-MCTD,ddr4-spd-5.bin +H5ANAG6NCMR-VKC,ddr4-spd-6.bin +K4A8G165WC-BCWE,ddr4-spd-1.bin +MT40A1G16KD-062E:E,ddr4-spd-7.bin +K4AAG165WA-BCWE,ddr4-spd-7.bin +H5AN8G6NCJR-XNC,ddr4-spd-1.bin +K4AAG165WA-BCTD,ddr4-spd-8.bin +H5ANAG6NDMR-XNC,ddr4-spd-2.bin diff --git a/src/mainboard/google/zork/variants/berknip/spd/Makefile.inc b/src/mainboard/google/zork/variants/berknip/spd/Makefile.inc index 1f871a9..43f4fa7 100644 --- a/src/mainboard/google/zork/variants/berknip/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/berknip/spd/Makefile.inc @@ -2,12 +2,12 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-3.hex # ID = 0(0b0000) Parts = K4A8G165WC-BCTD -SPD_SOURCES += ddr4-spd-8.hex # ID = 1(0b0001) Parts = K4AAG165WA-BCTD -SPD_SOURCES += ddr4-spd-1.hex # ID = 2(0b0010) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-1.hex # ID = 3(0b0011) Parts = H5AN8G6NDJR-XNC -SPD_SOURCES += ddr4-spd-empty.hex # ID = 4(0b0100) -SPD_SOURCES += ddr4-spd-1.hex # ID = 5(0b0101) Parts = K4A8G165WC-BCWE -SPD_SOURCES += ddr4-spd-7.hex # ID = 6(0b0110) Parts = MT40A1G16KD-062E:E -SPD_SOURCES += ddr4-spd-2.hex # ID = 7(0b0111) Parts = H5ANAG6NCMR-XNC -SPD_SOURCES += ddr4-spd-7.hex # ID = 8(0b1000) Parts = K4AAG165WA-BCWE +SPD_SOURCES += ddr4-spd-3.bin # ID = 0(0b0000) Parts = K4A8G165WC-BCTD +SPD_SOURCES += ddr4-spd-8.bin # ID = 1(0b0001) Parts = K4AAG165WA-BCTD +SPD_SOURCES += ddr4-spd-1.bin # ID = 2(0b0010) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-1.bin # ID = 3(0b0011) Parts = H5AN8G6NDJR-XNC +SPD_SOURCES += ddr4-spd-empty.bin # ID = 4(0b0100) +SPD_SOURCES += ddr4-spd-1.bin # ID = 5(0b0101) Parts = K4A8G165WC-BCWE +SPD_SOURCES += ddr4-spd-7.bin # ID = 6(0b0110) Parts = MT40A1G16KD-062E:E +SPD_SOURCES += ddr4-spd-2.bin # ID = 7(0b0111) Parts = H5ANAG6NCMR-XNC +SPD_SOURCES += ddr4-spd-7.bin # ID = 8(0b1000) Parts = K4AAG165WA-BCWE diff --git a/src/mainboard/google/zork/variants/dalboz/spd/Makefile.inc b/src/mainboard/google/zork/variants/dalboz/spd/Makefile.inc index e8ed39d..426626b 100644 --- a/src/mainboard/google/zork/variants/dalboz/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/dalboz/spd/Makefile.inc @@ -2,8 +2,8 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-3.hex # ID = 0(0b0000) Parts = HMA851S6CJR6N-VK -SPD_SOURCES += ddr4-spd-6.hex # ID = 1(0b0001) Parts = H5ANAG6NCMR-VKC -SPD_SOURCES += ddr4-spd-3.hex # ID = 2(0b0010) Parts = K4A8G165WC-BCTD -SPD_SOURCES += ddr4-spd-5.hex # ID = 3(0b0011) Parts = K4AAG165WB-MCTD -SPD_SOURCES += ddr4-spd-1.hex # ID = 4(0b0100) Parts = K4A8G165WC-BCWE +SPD_SOURCES += ddr4-spd-3.bin # ID = 0(0b0000) Parts = HMA851S6CJR6N-VK +SPD_SOURCES += ddr4-spd-6.bin # ID = 1(0b0001) Parts = H5ANAG6NCMR-VKC +SPD_SOURCES += ddr4-spd-3.bin # ID = 2(0b0010) Parts = K4A8G165WC-BCTD +SPD_SOURCES += ddr4-spd-5.bin # ID = 3(0b0011) Parts = K4AAG165WB-MCTD +SPD_SOURCES += ddr4-spd-1.bin # ID = 4(0b0100) Parts = K4A8G165WC-BCWE diff --git a/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc b/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc index 5e09836..616677c 100644 --- a/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/dirinboz/spd/Makefile.inc @@ -2,14 +2,14 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-empty.hex # ID = 0(0b0000) -SPD_SOURCES += ddr4-spd-empty.hex # ID = 1(0b0001) -SPD_SOURCES += ddr4-spd-3.hex # ID = 2(0b0010) Parts = K4A8G165WC-BCTD -SPD_SOURCES += ddr4-spd-empty.hex # ID = 3(0b0011) -SPD_SOURCES += ddr4-spd-1.hex # ID = 4(0b0100) Parts = K4A8G165WC-BCWE -SPD_SOURCES += ddr4-spd-1.hex # ID = 5(0b0101) Parts = H5AN8G6NDJR-XNC -SPD_SOURCES += ddr4-spd-2.hex # ID = 6(0b0110) Parts = H5ANAG6NCMR-XNC -SPD_SOURCES += ddr4-spd-1.hex # ID = 7(0b0111) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-7.hex # ID = 8(0b1000) Parts = MT40A1G16KD-062E:E -SPD_SOURCES += ddr4-spd-8.hex # ID = 9(0b1001) Parts = K4AAG165WA-BCTD -SPD_SOURCES += ddr4-spd-7.hex # ID = 10(0b1010) Parts = K4AAG165WA-BCWE +SPD_SOURCES += ddr4-spd-empty.bin # ID = 0(0b0000) +SPD_SOURCES += ddr4-spd-empty.bin # ID = 1(0b0001) +SPD_SOURCES += ddr4-spd-3.bin # ID = 2(0b0010) Parts = K4A8G165WC-BCTD +SPD_SOURCES += ddr4-spd-empty.bin # ID = 3(0b0011) +SPD_SOURCES += ddr4-spd-1.bin # ID = 4(0b0100) Parts = K4A8G165WC-BCWE +SPD_SOURCES += ddr4-spd-1.bin # ID = 5(0b0101) Parts = H5AN8G6NDJR-XNC +SPD_SOURCES += ddr4-spd-2.bin # ID = 6(0b0110) Parts = H5ANAG6NCMR-XNC +SPD_SOURCES += ddr4-spd-1.bin # ID = 7(0b0111) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-7.bin # ID = 8(0b1000) Parts = MT40A1G16KD-062E:E +SPD_SOURCES += ddr4-spd-8.bin # ID = 9(0b1001) Parts = K4AAG165WA-BCTD +SPD_SOURCES += ddr4-spd-7.bin # ID = 10(0b1010) Parts = K4AAG165WA-BCWE diff --git a/src/mainboard/google/zork/variants/ezkinil/spd/Makefile.inc b/src/mainboard/google/zork/variants/ezkinil/spd/Makefile.inc index 65eb7b0..b2e66c2 100644 --- a/src/mainboard/google/zork/variants/ezkinil/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/ezkinil/spd/Makefile.inc @@ -2,8 +2,8 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-3.hex # ID = 0(0b0000) Parts = H5AN8G6NCJR-VKC -SPD_SOURCES += ddr4-spd-empty.hex # ID = 1(0b0001) -SPD_SOURCES += ddr4-spd-1.hex # ID = 2(0b0010) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-4.hex # ID = 3(0b0011) Parts = MT40A1G16KNR-075:E -SPD_SOURCES += ddr4-spd-3.hex # ID = 4(0b0100) Parts = K4A8G165WC-BCTD +SPD_SOURCES += ddr4-spd-3.bin # ID = 0(0b0000) Parts = H5AN8G6NCJR-VKC +SPD_SOURCES += ddr4-spd-empty.bin # ID = 1(0b0001) +SPD_SOURCES += ddr4-spd-1.bin # ID = 2(0b0010) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-4.bin # ID = 3(0b0011) Parts = MT40A1G16KNR-075:E +SPD_SOURCES += ddr4-spd-3.bin # ID = 4(0b0100) Parts = K4A8G165WC-BCTD diff --git a/src/mainboard/google/zork/variants/morphius/spd/Makefile.inc b/src/mainboard/google/zork/variants/morphius/spd/Makefile.inc index 2eb864d..5326bc3 100644 --- a/src/mainboard/google/zork/variants/morphius/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/morphius/spd/Makefile.inc @@ -2,13 +2,13 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-7.hex # ID = 0(0b0000) Parts = K4AAG165WA-BCWE -SPD_SOURCES += ddr4-spd-empty.hex # ID = 1(0b0001) -SPD_SOURCES += ddr4-spd-1.hex # ID = 2(0b0010) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-7.hex # ID = 3(0b0011) Parts = MT40A1G16KD-062E:E -SPD_SOURCES += ddr4-spd-1.hex # ID = 4(0b0100) Parts = K4A8G165WC-BCWE -SPD_SOURCES += ddr4-spd-1.hex # ID = 5(0b0101) Parts = H5AN8G6NDJR-XNC -SPD_SOURCES += ddr4-spd-1.hex # ID = 6(0b0110) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-7.hex # ID = 7(0b0111) Parts = K4AAG165WA-BCWE -SPD_SOURCES += ddr4-spd-2.hex # ID = 8(0b1000) Parts = H5ANAG6NCMR-XNC -SPD_SOURCES += ddr4-spd-1.hex # ID = 9(0b1001) Parts = K4A8G165WC-BCWE +SPD_SOURCES += ddr4-spd-7.bin # ID = 0(0b0000) Parts = K4AAG165WA-BCWE +SPD_SOURCES += ddr4-spd-empty.bin # ID = 1(0b0001) +SPD_SOURCES += ddr4-spd-1.bin # ID = 2(0b0010) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-7.bin # ID = 3(0b0011) Parts = MT40A1G16KD-062E:E +SPD_SOURCES += ddr4-spd-1.bin # ID = 4(0b0100) Parts = K4A8G165WC-BCWE +SPD_SOURCES += ddr4-spd-1.bin # ID = 5(0b0101) Parts = H5AN8G6NDJR-XNC +SPD_SOURCES += ddr4-spd-1.bin # ID = 6(0b0110) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-7.bin # ID = 7(0b0111) Parts = K4AAG165WA-BCWE +SPD_SOURCES += ddr4-spd-2.bin # ID = 8(0b1000) Parts = H5ANAG6NCMR-XNC +SPD_SOURCES += ddr4-spd-1.bin # ID = 9(0b1001) Parts = K4A8G165WC-BCWE diff --git a/src/mainboard/google/zork/variants/trembyle/spd/Makefile.inc b/src/mainboard/google/zork/variants/trembyle/spd/Makefile.inc index 6508c26..aaa66ba 100644 --- a/src/mainboard/google/zork/variants/trembyle/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/trembyle/spd/Makefile.inc @@ -2,5 +2,5 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-3.hex # ID = 0(0b0000) Parts = H5AN8G6NCJR-VKC -SPD_SOURCES += ddr4-spd-6.hex # ID = 1(0b0001) Parts = H5ANAG6NCMR-VKC +SPD_SOURCES += ddr4-spd-3.bin # ID = 0(0b0000) Parts = H5AN8G6NCJR-VKC +SPD_SOURCES += ddr4-spd-6.bin # ID = 1(0b0001) Parts = H5ANAG6NCMR-VKC diff --git a/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc b/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc index c7890d0..ef1cfc0 100644 --- a/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/vilboz/spd/Makefile.inc @@ -2,11 +2,11 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-empty.hex # ID = 0(0b0000) -SPD_SOURCES += ddr4-spd-empty.hex # ID = 1(0b0001) -SPD_SOURCES += ddr4-spd-1.hex # ID = 2(0b0010) Parts = K4A8G165WC-BCWE -SPD_SOURCES += ddr4-spd-1.hex # ID = 3(0b0011) Parts = H5AN8G6NDJR-XNC -SPD_SOURCES += ddr4-spd-1.hex # ID = 4(0b0100) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-7.hex # ID = 5(0b0101) Parts = K4AAG165WA-BCWE -SPD_SOURCES += ddr4-spd-7.hex # ID = 6(0b0110) Parts = MT40A1G16KD-062E:E -SPD_SOURCES += ddr4-spd-2.hex # ID = 7(0b0111) Parts = H5ANAG6NDMR-XNC +SPD_SOURCES += ddr4-spd-empty.bin # ID = 0(0b0000) +SPD_SOURCES += ddr4-spd-empty.bin # ID = 1(0b0001) +SPD_SOURCES += ddr4-spd-1.bin # ID = 2(0b0010) Parts = K4A8G165WC-BCWE +SPD_SOURCES += ddr4-spd-1.bin # ID = 3(0b0011) Parts = H5AN8G6NDJR-XNC +SPD_SOURCES += ddr4-spd-1.bin # ID = 4(0b0100) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-7.bin # ID = 5(0b0101) Parts = K4AAG165WA-BCWE +SPD_SOURCES += ddr4-spd-7.bin # ID = 6(0b0110) Parts = MT40A1G16KD-062E:E +SPD_SOURCES += ddr4-spd-2.bin # ID = 7(0b0111) Parts = H5ANAG6NDMR-XNC diff --git a/src/mainboard/google/zork/variants/woomax/spd/Makefile.inc b/src/mainboard/google/zork/variants/woomax/spd/Makefile.inc index 91ef5e5..c1ceb07 100644 --- a/src/mainboard/google/zork/variants/woomax/spd/Makefile.inc +++ b/src/mainboard/google/zork/variants/woomax/spd/Makefile.inc @@ -2,15 +2,15 @@ ## This is an auto-generated file. Do not edit!! SPD_SOURCES = -SPD_SOURCES += ddr4-spd-1.hex # ID = 0(0b0000) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-1.hex # ID = 1(0b0001) Parts = H5AN8G6NCJR-XNC -SPD_SOURCES += ddr4-spd-empty.hex # ID = 2(0b0010) -SPD_SOURCES += ddr4-spd-empty.hex # ID = 3(0b0011) -SPD_SOURCES += ddr4-spd-empty.hex # ID = 4(0b0100) -SPD_SOURCES += ddr4-spd-empty.hex # ID = 5(0b0101) -SPD_SOURCES += ddr4-spd-empty.hex # ID = 6(0b0110) -SPD_SOURCES += ddr4-spd-empty.hex # ID = 7(0b0111) -SPD_SOURCES += ddr4-spd-1.hex # ID = 8(0b1000) Parts = MT40A512M16TB-062E:J -SPD_SOURCES += ddr4-spd-1.hex # ID = 9(0b1001) Parts = H5AN8G6NCJR-XNC -SPD_SOURCES += ddr4-spd-7.hex # ID = 10(0b1010) Parts = MT40A1G16KD-062E:E -SPD_SOURCES += ddr4-spd-7.hex # ID = 11(0b1011) Parts = K4AAG165WA-BCWE +SPD_SOURCES += ddr4-spd-1.bin # ID = 0(0b0000) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-1.bin # ID = 1(0b0001) Parts = H5AN8G6NCJR-XNC +SPD_SOURCES += ddr4-spd-empty.bin # ID = 2(0b0010) +SPD_SOURCES += ddr4-spd-empty.bin # ID = 3(0b0011) +SPD_SOURCES += ddr4-spd-empty.bin # ID = 4(0b0100) +SPD_SOURCES += ddr4-spd-empty.bin # ID = 5(0b0101) +SPD_SOURCES += ddr4-spd-empty.bin # ID = 6(0b0110) +SPD_SOURCES += ddr4-spd-empty.bin # ID = 7(0b0111) +SPD_SOURCES += ddr4-spd-1.bin # ID = 8(0b1000) Parts = MT40A512M16TB-062E:J +SPD_SOURCES += ddr4-spd-1.bin # ID = 9(0b1001) Parts = H5AN8G6NCJR-XNC +SPD_SOURCES += ddr4-spd-7.bin # ID = 10(0b1010) Parts = MT40A1G16KD-062E:E +SPD_SOURCES += ddr4-spd-7.bin # ID = 11(0b1011) Parts = K4AAG165WA-BCWE -- To view, visit https://review.coreboot.org/c/coreboot/+/45818 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37689c3a005d527551baa41e36d67d1b01f0bcfb Gerrit-Change-Number: 45818 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: newchange

2 3

Change in coreboot[master]: amdfwtool: Apply the change of config file to stoneyridge
by Bao Zheng (Code Review) 05 Oct '20

05 Oct '20

Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/45287 to review the following change. Change subject: amdfwtool: Apply the change of config file to stoneyridge ...................................................................... amdfwtool: Apply the change of config file to stoneyridge Change-Id: I0536f854de533a7419c50da8a2b54d3635b55c61 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc 2 files changed, 28 insertions(+), 112 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/45287/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index b29bd99..1683306 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -194,12 +194,20 @@ string "GEC firmware path and filename" depends on STONEYRIDGE_GEC_FWM -config AMD_PUBKEY_FILE - string "AMD public Key" +config AMDFW_CONFIG_FILE + string + string "AMD PSP Firmware config file" default "" if !USE_AMD_BLOBS - default "3rdparty/amd_blobs/stoneyridge/PSP/CZ/AmdPubKeyCZ.bin" if AMD_APU_MERLINFALCON - default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_PRAIRIEFALCON - default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_STONEYRIDGE + default "3rdparty/amd_blobs/stoneyridge/PSP/CZ/fw.cfg" if AMD_APU_MERLINFALCON + default "3rdparty/amd_blobs/stoneyridge/PSP/ST/fw.cfg" if AMD_APU_PRAIRIEFALCON + default "3rdparty/amd_blobs/stoneyridge/PSP/ST/fw.cfg" if AMD_APU_STONEYRIDGE + +#config AMD_PUBKEY_FILE +# string "AMD public Key" +# default "" if !USE_AMD_BLOBS +# default "3rdparty/amd_blobs/stoneyridge/PSP/CZ/AmdPubKeyCZ.bin" if AMD_APU_MERLINFALCON +# default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_PRAIRIEFALCON +# default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_STONEYRIDGE config STONEYRIDGE_SATA_MODE int "SATA Mode" diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 289f54b..07f0456 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -101,7 +101,9 @@ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) ### 0 -FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))) + +FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMDFW_CONFIG_FILE))) + ifneq ($(FIRMWARE_LOCATE),) ifeq ($(CONFIG_AMD_APU_STONEYRIDGE),y) @@ -119,20 +121,11 @@ endif # CONFIG_AMD_APU_MERLINFALCON endif # CONFIG_AMD_APU_STONEYRIDGE -###5 -PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key +add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) -###1 -PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin +OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci) +OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE), --gec) -###3 -PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin - -###4 -PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin - -###8 - Check for SMU firmware named either *.sbin or *.csbin. Both "signed" and -### "compressed signed" are used by generations supported by this file. SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin ifeq ("$(wildcard $(SMUFWM_FILE))","") @@ -140,113 +133,28 @@ SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin endif -###95 -SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin - -###9 -PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key - -ifeq ($(CONFIG_USE_PSPSECUREOS),y) -###2 -PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin - -###12 -PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin) - -###13 -TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin -endif - -###18- Check for SMU firmware2 named either *.sbin or *.csbin -### TODO: Remove *.sbin section after the blobs repo is updated. -SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin -SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin -ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","") -SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin -SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin -endif - -ifeq ("$(wildcard $(SMUFWM_FN_FILE))","") -SMUFWM_FN_FILE= -SMUFIRMWARE2_FN_FILE= -endif - -add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) - -OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci) -OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec) - -OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey) -OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader) -OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware) -OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery) -OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey) -OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram) -OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug) -ifeq ($(CONFIG_USE_PSPSECUREOS),y) -OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos) -OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets) -OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey) -endif -OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2) -OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs) -SUBPROG_FN_SMU_FW=1 -OPT_SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware) -OPT_SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware2) - ifeq ($(FIRMWARE_TYPE),ST) OPT_COMBOCAPABLE=--combo-capable endif +ifeq ($(CONFIG_USE_PSPSECUREOS),y) +PSP_USE_PSPSECUREOS="--use-pspsecureos" +endif + +OPT_PSP_USE_PSPSECUREOS=$(call strip_quotes, $(PSP_USE_PSPSECUREOS)) + $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ - $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \ - $(call strip_quotes, $(PSPBTLDR_FILE)) \ - $(call strip_quotes, $(PSPRCVR_FILE)) \ - $(call strip_quotes, $(PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(PSPNVRAM_FILE)) \ - $(call strip_quotes, $(SMUFWM_FILE)) \ - $(call strip_quotes, $(SMUFWM_FN_FILE)) \ - $(call strip_quotes, $(SMUSCS_FILE)) \ - $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \ - $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \ - $(call strip_quotes, $(SMUFIRMWARE2_FN_FILE)) \ $(AMDFWTOOL) rm -f $@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" $(AMDFWTOOL) \ $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \ $(OPT_STONEYRIDGE_GEC_FWM_FILE) \ - $(OPT_AMD_PUBKEY_FILE) \ - $(OPT_PSPBTLDR_FILE) \ - $(OPT_SMUFWM_FILE) \ - $(OPT_PSPRCVR_FILE) \ - $(OPT_PUBSIGNEDKEY_FILE) \ - $(OPT_PSPSCUREOS_FILE) \ - $(OPT_PSPNVRAM_FILE) \ - $(OPT_PSPSECUREDEBUG_FILE) \ - $(OPT_PSPTRUSTLETS_FILE) \ - $(OPT_TRUSTLETKEY_FILE) \ - $(OPT_SMUFIRMWARE2_FILE) \ - $(OPT_SMUSCS_FILE) \ - $(OPT_AMD_PUBKEY_FILE) \ - $(OPT_PSPBTLDR_FILE) \ - $(OPT_SMUFWM_FILE) \ - $(OPT_SMUFWM_FN_FILE) \ - $(OPT_PSPRCVR_FILE) \ - $(OPT_PUBSIGNEDKEY_FILE) \ - $(OPT_PSPSCUREOS_FILE) \ - $(OPT_PSPNVRAM_FILE) \ - $(OPT_PSPSECUREDEBUG_FILE) \ - $(OPT_PSPTRUSTLETS_FILE) \ - $(OPT_TRUSTLETKEY_FILE) \ - $(OPT_SMUFIRMWARE2_FILE) \ - $(OPT_SMUFIRMWARE2_FN_FILE) \ - $(OPT_SMUSCS_FILE) \ $(OPT_COMBOCAPABLE)\ + $(OPT_PSP_USE_PSPSECUREOS) \ + --config $(FIRMWARE_LOCATE)/fw.cfg \ --flashsize $(CONFIG_ROM_SIZE) \ --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \ --output $@ @@ -270,7 +178,7 @@ else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) -#cbfs-files-y += apu/amdfw +cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION) apu/amdfw-type := raw -- To view, visit https://review.coreboot.org/c/coreboot/+/45287 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0536f854de533a7419c50da8a2b54d3635b55c61 Gerrit-Change-Number: 45287 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-MessageType: newchange

3 14

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2020