coreboot-gerrit June 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: [TEST] patch -> BIOS lockdown=1
by Maulik V Vaghela (Code Review) 24 Jun '20

24 Jun '20

Maulik V Vaghela has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/42110 ) Change subject: [TEST] patch -> BIOS lockdown=1 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/42110 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I030ab8009f9c02d4b5f482cb6eaba7cc3c07265b Gerrit-Change-Number: 42110 Gerrit-PatchSet: 2 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-MessageType: abandon

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Change in coreboot[master]: mb/amd/mandolin: resize EC fmap section
by Felix Held (Code Review) 24 Jun '20

24 Jun '20

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42705 ) Change subject: mb/amd/mandolin: resize EC fmap section ...................................................................... mb/amd/mandolin: resize EC fmap section The EC firmware is 128k including its header, so there's no need to reserve another 4k for the header. TEST=Mandolin still boots. Change-Id: Id3a7a087bf37461ca8ad3da9a809f13d7f0d570c Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/amd/mandolin/mandolin.fmd 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/42705/1 diff --git a/src/mainboard/amd/mandolin/mandolin.fmd b/src/mainboard/amd/mandolin/mandolin.fmd index c702ba9..382c030 100644 --- a/src/mainboard/amd/mandolin/mandolin.fmd +++ b/src/mainboard/amd/mandolin/mandolin.fmd @@ -1,7 +1,7 @@ FLASH@0xFF800000 0x800000 { BIOS@0x0 { - EC@0x0 0x21000 - RW_MRC_CACHE@0x21000 0x10000 + EC@0x0 0x20000 + RW_MRC_CACHE@0x20000 0x10000 FMAP 0x1000 COREBOOT(CBFS) } -- To view, visit https://review.coreboot.org/c/coreboot/+/42705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id3a7a087bf37461ca8ad3da9a809f13d7f0d570c Gerrit-Change-Number: 42705 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/picasso: add psp_verstage
by build bot (Jenkins) (Code Review) 24 Jun '20

24 Jun '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41816 ) Change subject: soc/amd/picasso: add psp_verstage ...................................................................... Patch Set 8: (11 comments) https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… File src/soc/amd/picasso/psp_verstage/psp_verstage.c: https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 32: svc_debug_print( "Rebooting into recovery\n"); space prohibited after that open parenthesis '(' https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… File src/soc/amd/picasso/psp_verstage/svc.h: https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 6: #define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \ Macros with multiple statements should be enclosed in a do - while loop https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 6: #define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \ macros should not use a trailing semicolon https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 19: #define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \ Macros with multiple statements should be enclosed in a do - while loop https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 19: #define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \ macros should not use a trailing semicolon https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 30: #define SVC_CALL2(SVC_ID, R0, R1, Ret) \ Macros with multiple statements should be enclosed in a do - while loop https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 30: #define SVC_CALL2(SVC_ID, R0, R1, Ret) \ macros should not use a trailing semicolon https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 40: #define SVC_CALL1(SVC_ID, R0, Ret) \ Macros with multiple statements should be enclosed in a do - while loop https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 40: #define SVC_CALL1(SVC_ID, R0, Ret) \ macros should not use a trailing semicolon https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 49: #define SVC_CALL0(SVC_ID, Ret) \ Macros with multiple statements should be enclosed in a do - while loop https://review.coreboot.org/c/coreboot/+/41816/8/src/soc/amd/picasso/psp_ve… PS8, Line 49: #define SVC_CALL0(SVC_ID, Ret) \ macros should not use a trailing semicolon -- To view, visit https://review.coreboot.org/c/coreboot/+/41816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia58839caa5bfbae0408702ee8d02ef482f2861c4 Gerrit-Change-Number: 41816 Gerrit-PatchSet: 8 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 24 Jun 2020 06:09:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/picasso: add psp_verstage
by Martin Roth (Code Review) 24 Jun '20

24 Jun '20

Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Patrick Georgi, Julius Werner, Eric Peers, Aaron Durbin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41816 to look at the new patch set (#8). Change subject: soc/amd/picasso: add psp_verstage ...................................................................... soc/amd/picasso: add psp_verstage This is the main code for building coreboot's verstage as a userspace application to run on the PSP. It does a minimal setup of hardware, then runs verstage_main. It uses hardware hashing to increase the speed and will directly reboot into recovery mode if there are any failures. BUG=b:158124527 TEST=Build & boot trembyle Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: Ia58839caa5bfbae0408702ee8d02ef482f2861c4 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/chip.h M src/soc/amd/picasso/memlayout.ld A src/soc/amd/picasso/memlayout_psp_verstage.ld A src/soc/amd/picasso/memlayout_x86.ld A src/soc/amd/picasso/psp_verstage/Makefile.inc A src/soc/amd/picasso/psp_verstage/delay.c A src/soc/amd/picasso/psp_verstage/fch.c A src/soc/amd/picasso/psp_verstage/include/arch/io.h A src/soc/amd/picasso/psp_verstage/include/arch/mmio.h A src/soc/amd/picasso/psp_verstage/pmutil.c A src/soc/amd/picasso/psp_verstage/post.c A src/soc/amd/picasso/psp_verstage/printk.c A src/soc/amd/picasso/psp_verstage/psp.c A src/soc/amd/picasso/psp_verstage/psp_verstage.c A src/soc/amd/picasso/psp_verstage/psp_verstage.h A src/soc/amd/picasso/psp_verstage/reset.c A src/soc/amd/picasso/psp_verstage/svc.c A src/soc/amd/picasso/psp_verstage/svc.h A src/soc/amd/picasso/psp_verstage/timer.c A src/soc/amd/picasso/psp_verstage/timestamp.c A src/soc/amd/picasso/psp_verstage/vboot_crypto.c 23 files changed, 1,137 insertions(+), 104 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/41816/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/41816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia58839caa5bfbae0408702ee8d02ef482f2861c4 Gerrit-Change-Number: 41816 Gerrit-PatchSet: 8 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/intel/mipi_camera: Add camera power resource to SSDT
by Sugnan Prabhu S (Code Review) 24 Jun '20

24 Jun '20

Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41624 ) Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT ...................................................................... Patch Set 26: (1 comment) https://review.coreboot.org/c/coreboot/+/41624/25/src/drivers/intel/mipi_ca… File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/41624/25/src/drivers/intel/mipi_ca… PS25, Line 20: RCPR > Any 4-uppercase letter name (can include some _) is allowed, as long as it's unique in its scope. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 26 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-Comment-Date: Wed, 24 Jun 2020 05:42:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt Delco <delco(a)chromium.org> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Camera remove DSDT and enable SSDT
by Sugnan Prabhu S (Code Review) 24 Jun '20

24 Jun '20

Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41758 ) Change subject: mb/intel/jasperlake_rvp: Camera remove DSDT and enable SSDT ...................................................................... Patch Set 14: (2 comments) https://review.coreboot.org/c/coreboot/+/41758/13/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/Kconfig: https://review.coreboot.org/c/coreboot/+/41758/13/src/mainboard/intel/jaspe… PS13, Line 17: select DRIVERS_INTEL_MIPI_CAMERA > could you put this in alphabetical order? i.e. […] Done https://review.coreboot.org/c/coreboot/+/41758/13/src/mainboard/intel/jaspe… File src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb: https://review.coreboot.org/c/coreboot/+/41758/13/src/mainboard/intel/jaspe… PS13, Line 374: ^ > The lack of proper ^ handling in Windows seems to be specific to 'prX' / PowerResource (vs. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib439572bc1d15ef02c86c7bfa88af6b16eb06f97 Gerrit-Change-Number: 41758 Gerrit-PatchSet: 14 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 24 Jun 2020 05:35:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt Delco <delco(a)chromium.org> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Camera remove DSDT and enable SSDT
by Sugnan Prabhu S (Code Review) 24 Jun '20

24 Jun '20

Hello Varshit B Pandya, build bot (Jenkins), Daniel Kang, Wonkyu Kim, Rizwan Qureshi, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41758 to look at the new patch set (#14). Change subject: mb/intel/jasperlake_rvp: Camera remove DSDT and enable SSDT ...................................................................... mb/intel/jasperlake_rvp: Camera remove DSDT and enable SSDT This change updates devicetree to enable camera SSDT generation and removes changes related to camera DSDT. Change-Id: Ib439572bc1d15ef02c86c7bfa88af6b16eb06f97 Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/Kconfig M src/mainboard/intel/jasperlake_rvp/dsdt.asl D src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/acpi/cam1.asl D src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/acpi/camera.asl D src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/acpi/ipu_endpoints.asl D src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/acpi/ipu_mainboard.asl M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb D src/mainboard/intel/jasperlake_rvp/variants/jslrvp/include/variant/acpi/camera.asl 8 files changed, 110 insertions(+), 334 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/41758/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/41758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib439572bc1d15ef02c86c7bfa88af6b16eb06f97 Gerrit-Change-Number: 41758 Gerrit-PatchSet: 14 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/intel/mipi_camera: Add camera power resource to SSDT
by Sugnan Prabhu S (Code Review) 24 Jun '20

24 Jun '20

Hello Varshit B Pandya, build bot (Jenkins), Daniel Kang, Furquan Shaikh, Wonkyu Kim, Tim Wawrzynczak, Paul Menzel, Rizwan Qureshi, Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41624 to look at the new patch set (#26). Change subject: drivers/intel/mipi_camera: Add camera power resource to SSDT ...................................................................... drivers/intel/mipi_camera: Add camera power resource to SSDT This change adds support function to parse entries in the devicetree to generate PowerResource entries for the MIPI camera. Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> --- M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/mipi_camera/chip.h 2 files changed, 159 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/41624/26 -- To view, visit https://review.coreboot.org/c/coreboot/+/41624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31e198b50acf2c64035aff9cb054fbe3602dd83e Gerrit-Change-Number: 41624 Gerrit-PatchSet: 26 Gerrit-Owner: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kiran2 Kumar <kiran2.kumar(a)intel.corp-partner.google.com> Gerrit-CC: Matt Delco <delco(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: volteer: Create delbin variant
by Zhuohao Lee (Code Review) 24 Jun '20

24 Jun '20

Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42709 ) Change subject: volteer: Create delbin variant ...................................................................... volteer: Create delbin variant Create the delbin variant of the volteer reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.1.1). BUG=b:158797761 BRANCH=None TEST=util/abuild/abuild -p none -t google/volteer -x -a make sure the build includes GOOGLE_DELBIN Signed-off-by: Zhuohao Lee <zhuohao(a)chromium.org> Change-Id: Icf5fc6b9cc6a7c47e52103b2d396bcddb26adf50 --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/Kconfig.name A src/mainboard/google/volteer/variants/delbin/include/variant/ec.h A src/mainboard/google/volteer/variants/delbin/include/variant/gpio.h A src/mainboard/google/volteer/variants/delbin/overridetree.cb 5 files changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/42709/1 diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 99a08a3..fa39ddf 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -73,6 +73,7 @@ default "Trondo" if BOARD_GOOGLE_TRONDO default "Volteer" if BOARD_GOOGLE_VOLTEER default "Voxel" if BOARD_GOOGLE_VOXEL + default "Delbin" if BOARD_GOOGLE_DELBIN config MAX_CPUS int @@ -105,6 +106,7 @@ default "trondo" if BOARD_GOOGLE_TRONDO default "volteer" if BOARD_GOOGLE_VOLTEER default "voxel" if BOARD_GOOGLE_VOXEL + default "delbin" if BOARD_GOOGLE_DELBIN config VARIANT_HAS_MIPI_CAMERA bool diff --git a/src/mainboard/google/volteer/Kconfig.name b/src/mainboard/google/volteer/Kconfig.name index 6920aaf..0aa91ab 100644 --- a/src/mainboard/google/volteer/Kconfig.name +++ b/src/mainboard/google/volteer/Kconfig.name @@ -29,3 +29,7 @@ config BOARD_GOOGLE_VOXEL bool "-> Voxel" select BOARD_GOOGLE_BASEBOARD_VOLTEER + +config BOARD_GOOGLE_DELBIN + bool "-> Delbin" + select BOARD_GOOGLE_BASEBOARD_VOLTEER diff --git a/src/mainboard/google/volteer/variants/delbin/include/variant/ec.h b/src/mainboard/google/volteer/variants/delbin/include/variant/ec.h new file mode 100644 index 0000000..7a2a6ff --- /dev/null +++ b/src/mainboard/google/volteer/variants/delbin/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/volteer/variants/delbin/include/variant/gpio.h b/src/mainboard/google/volteer/variants/delbin/include/variant/gpio.h new file mode 100644 index 0000000..5839395 --- /dev/null +++ b/src/mainboard/google/volteer/variants/delbin/include/variant/gpio.h @@ -0,0 +1,26 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +/* Memory configuration board straps */ +/* Copied from baseboard and may need to change for the new variant. */ +#define GPIO_MEM_CONFIG_0 GPP_C12 +#define GPIO_MEM_CONFIG_1 GPP_C15 +#define GPIO_MEM_CONFIG_2 GPP_C14 +#define GPIO_MEM_CONFIG_3 GPP_D15 + +#endif diff --git a/src/mainboard/google/volteer/variants/delbin/overridetree.cb b/src/mainboard/google/volteer/variants/delbin/overridetree.cb new file mode 100644 index 0000000..32204c5 --- /dev/null +++ b/src/mainboard/google/volteer/variants/delbin/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/tigerlake + + device domain 0 on + end + +end -- To view, visit https://review.coreboot.org/c/coreboot/+/42709 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf5fc6b9cc6a7c47e52103b2d396bcddb26adf50 Gerrit-Change-Number: 42709 Gerrit-PatchSet: 1 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/mainboard/google/volteer: Add dptf.asl to the template
by Zhuohao Lee (Code Review) 24 Jun '20

24 Jun '20

Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42715 ) Change subject: util/mainboard/google/volteer: Add dptf.asl to the template ...................................................................... util/mainboard/google/volteer: Add dptf.asl to the template The dptf.asl is needed when creating a new volteer variant, otherwise, it will make the variant build failed. The error could be found from this link: https://review.coreboot.org/c/coreboot/+/42709 BUG=b:158797761 TEST=Generate the Delbin correctly Change-Id: Ib4059df9e08d6a1dba88f0299bb39c8c6ae406ae --- A util/mainboard/google/volteer/template/include/variant/acpi/dptf.asl 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/42715/1 diff --git a/util/mainboard/google/volteer/template/include/variant/acpi/dptf.asl b/util/mainboard/google/volteer/template/include/variant/acpi/dptf.asl new file mode 100644 index 0000000..189cafe --- /dev/null +++ b/util/mainboard/google/volteer/template/include/variant/acpi/dptf.asl @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/acpi/dptf.asl> -- To view, visit https://review.coreboot.org/c/coreboot/+/42715 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4059df9e08d6a1dba88f0299bb39c8c6ae406ae Gerrit-Change-Number: 42715 Gerrit-PatchSet: 1 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-MessageType: newchange

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