coreboot-gerrit April 2020

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Change in coreboot[master]: sb/intel/lynxpoint: drop IGD-related NVS variables
by Matt DeVillier (Code Review) 02 Apr '20

02 Apr '20

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39951 ) Change subject: sb/intel/lynxpoint: drop IGD-related NVS variables ...................................................................... sb/intel/lynxpoint: drop IGD-related NVS variables NDID/DID entries are no longer used by the GMA SSDT generator, so drop them. SSDT generation will be simplified in a subsequent commit. Change-Id: Iec3a18871725fd5f5c4c568c2bd771bb56245bc7 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/southbridge/intel/lynxpoint/acpi/globalnvs.asl M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/nvs.h 3 files changed, 1 insertion(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/39951/1 diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl index 6dcec0d..a8de07c 100644 --- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl +++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl @@ -88,13 +88,6 @@ TLST, 8, // 0x3d - Display Toggle List pointer CADL, 8, // 0x3e - Currently Attached Devices List PADL, 8, // 0x3f - Previously Attached Devices List - Offset (0x46), - NDID, 8, // 0x46 - Number of Device IDs - DID1, 32, // 0x47 - Device ID 1 - DID2, 32, // 0x4b - Device ID 2 - DID3, 32, // 0x4f - Device ID 3 - DID4, 32, // 0x53 - Device ID 4 - DID5, 32, // 0x57 - Device ID 5 /* TPM support */ Offset (0x5b), diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 745c231..aeed747 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -31,7 +31,6 @@ #include "nvs.h" #include "pch.h" #include <arch/acpigen.h> -#include <drivers/intel/gma/i915.h> #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/rtc.h> #include <southbridge/intel/common/spi.h> @@ -724,8 +723,6 @@ } if (gnvs) { - const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info(); - acpi_create_gnvs(gnvs); gnvs->apic = 1; @@ -739,11 +736,6 @@ /* Update the mem console pointer. */ gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE); - if (gfx) { - gnvs->ndid = gfx->ndid; - memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); - } - /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h index 3f2ce55..b170141 100644 --- a/src/southbridge/intel/lynxpoint/nvs.h +++ b/src/southbridge/intel/lynxpoint/nvs.h @@ -75,9 +75,7 @@ u8 tlst; /* 0x3d - Display Toggle List Pointer */ u8 cadl; /* 0x3e - currently attached devices */ u8 padl; /* 0x3f - previously attached devices */ - u16 rsvd14[3]; - u8 ndid; /* 0x46 - number of device ids */ - u32 did[5]; /* 0x47 - 5b device id 1..5 */ + u8 rsvd14[27]; /* TPM support */ u8 tpmp; /* 0x5b - TPM Present */ u8 tpme; /* 0x5c - TPM Enable */ -- To view, visit https://review.coreboot.org/c/coreboot/+/39951 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec3a18871725fd5f5c4c568c2bd771bb56245bc7 Gerrit-Change-Number: 39951 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/broadwell: add ACPI backlight support
by Matt DeVillier (Code Review) 02 Apr '20

02 Apr '20

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39941 ) Change subject: soc/intel/broadwell: add ACPI backlight support ...................................................................... soc/intel/broadwell: add ACPI backlight support Add framework to generate ACPI methods in SSDT for screen backlight control. Adjust params for gtt_ methods to match prototypes in i915.h and avoid conflicts. To make use of this, individual boards will need to include default_brightness_levels.asl in their dsdt, as well as add 'register "gfx" = "GMA_STATIC_DISPLAYS(0)"' to their devicetree. Change-Id: If93b7690ef36b5d19ca43957e8a1bef91ec5821d Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/broadwell/chip.h M src/soc/intel/broadwell/igd.c 2 files changed, 29 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/39941/1 diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h index fabb95a..5ad7086 100644 --- a/src/soc/intel/broadwell/chip.h +++ b/src/soc/intel/broadwell/chip.h @@ -12,6 +12,8 @@ * GNU General Public License for more details. */ +#include <drivers/intel/gma/i915.h> + #ifndef _SOC_INTEL_BROADWELL_CHIP_H_ #define _SOC_INTEL_BROADWELL_CHIP_H_ @@ -130,6 +132,8 @@ */ int cdclk; + struct i915_gpu_controller_info gfx; + /* Enable S0iX support */ int s0ix_enable; diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index ecb5417..7769410 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -24,11 +24,13 @@ #include <string.h> #include <reg_script.h> #include <cbmem.h> +#include <drivers/intel/gma/i915.h> #include <drivers/intel/gma/i915_reg.h> #include <drivers/intel/gma/libgfxinit.h> #include <drivers/intel/gma/opregion.h> #include <soc/cpu.h> #include <soc/nvs.h> +#include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/ramstage.h> #include <soc/systemagent.h> @@ -258,7 +260,7 @@ static struct resource *gtt_res = NULL; -static unsigned long gtt_read(unsigned long reg) +u32 gtt_read(u32 reg) { u32 val; val = read32(res2mmio(gtt_res, reg, 0)); @@ -266,7 +268,7 @@ } -static void gtt_write(unsigned long reg, unsigned long data) +void gtt_write(u32 reg, u32 data) { write32(res2mmio(gtt_res, reg, 0), data); } @@ -279,9 +281,8 @@ gtt_write(reg, val); } -static int gtt_poll(u32 reg, u32 mask, u32 value) -{ - unsigned int try = GT_RETRY; +int gtt_poll(u32 reg, u32 mask, u32 value) +{ unsigned int try = GT_RETRY; u32 data; while (try--) { @@ -627,11 +628,30 @@ return current; } +const struct i915_gpu_controller_info * +intel_gma_get_controller_info(void) +{ + struct device *dev = pcidev_on_root(SA_DEV_SLOT_IGD, 0); + if (!dev || !dev->enabled) + return NULL; + + struct soc_intel_broadwell_config *chip = dev->chip_info; + return &chip->gfx; +} + +static void gma_ssdt(struct device *device) +{ + const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info(); + if (gfx) + drivers_intel_gma_displays_ssdt_generate(gfx); +} + static struct device_operations igd_ops = { .read_resources = &pci_dev_read_resources, .set_resources = &pci_dev_set_resources, .enable_resources = &pci_dev_enable_resources, .init = &igd_init, + .acpi_fill_ssdt_generator = gma_ssdt, .ops_pci = &broadwell_pci_ops, .write_acpi_tables = gma_write_acpi_tables, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/39941 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If93b7690ef36b5d19ca43957e8a1bef91ec5821d Gerrit-Change-Number: 39941 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/gma/acpi: Bail out on empty display list
by Nico Huber (Code Review) 02 Apr '20

02 Apr '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39978 ) Change subject: drivers/intel/gma/acpi: Bail out on empty display list ...................................................................... drivers/intel/gma/acpi: Bail out on empty display list Whether the GMA is used depends on the mainboard, so we shouldn't rely on the presence of the static ACPI code around `GFX0`. Change-Id: I4d20b459b8361e43435b535b2b395f51ce1704e6 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M src/drivers/intel/gma/acpi.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/39978/1 diff --git a/src/drivers/intel/gma/acpi.c b/src/drivers/intel/gma/acpi.c index c0eef88..5a10ab4 100644 --- a/src/drivers/intel/gma/acpi.c +++ b/src/drivers/intel/gma/acpi.c @@ -13,6 +13,9 @@ const char *names[] = { "UNK", "VGA", "TV", "DVI", "LCD" }; int counters[ARRAY_SIZE(names)] = { 0 }; + if (!conf->ndid) + return; + acpigen_write_scope("\\_SB.PCI0.GFX0"); /* -- To view, visit https://review.coreboot.org/c/coreboot/+/39978 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d20b459b8361e43435b535b2b395f51ce1704e6 Gerrit-Change-Number: 39978 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`
by Nico Huber (Code Review) 02 Apr '20

02 Apr '20

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39977 ) Change subject: Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` ...................................................................... Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` These two identifiers were always very confusing. We're not filling and injecting generators. We are filling SSDTs and injecting into the DSDT. So drop the `_generator` suffix. Hopefully, this also makes ACPI look a little less scary. Change-Id: I6f0e79632c9c855f38fe24c0186388a25990c44d Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M src/arch/x86/acpi.c M src/device/pci_device.c M src/drivers/crb/tis.c M src/drivers/generic/adau7002/adau7002.c M src/drivers/generic/generic/generic.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/generic/max98357a/max98357a.c M src/drivers/gfx/generic/generic.c M src/drivers/i2c/da7219/da7219.c M src/drivers/i2c/generic/generic.c M src/drivers/i2c/hid/hid.c M src/drivers/i2c/max98373/max98373.c M src/drivers/i2c/max98927/max98927.c M src/drivers/i2c/nau8825/nau8825.c M src/drivers/i2c/rt1011/rt1011.c M src/drivers/i2c/rt5663/rt5663.c M src/drivers/i2c/sx9310/sx9310.c M src/drivers/i2c/tpm/chip.c M src/drivers/intel/ish/ish.c M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/wifi/wifi.c M src/drivers/ipmi/ipmi_kcs_ops.c M src/drivers/net/r8168.c M src/drivers/pc80/tpm/tis.c M src/drivers/spi/acpi/acpi.c M src/drivers/usb/acpi/usb_acpi.c M src/ec/google/chromeec/ec_lpc.c M src/ec/google/wilco/chip.c M src/ec/lenovo/h8/h8.c M src/include/device/device.h M src/mainboard/google/auron/mainboard.c M src/mainboard/google/beltino/mainboard.c M src/mainboard/google/butterfly/mainboard.c M src/mainboard/google/cyan/mainboard.c M src/mainboard/google/dedede/mainboard.c M src/mainboard/google/deltaur/mainboard.c M src/mainboard/google/dragonegg/mainboard.c M src/mainboard/google/drallion/ramstage.c M src/mainboard/google/eve/mainboard.c M src/mainboard/google/fizz/mainboard.c M src/mainboard/google/glados/mainboard.c M src/mainboard/google/hatch/ramstage.c M src/mainboard/google/jecht/mainboard.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/link/mainboard.c M src/mainboard/google/octopus/mainboard.c M src/mainboard/google/parrot/mainboard.c M src/mainboard/google/poppy/mainboard.c M src/mainboard/google/rambi/mainboard.c M src/mainboard/google/reef/mainboard.c M src/mainboard/google/sarien/ramstage.c M src/mainboard/google/slippy/mainboard.c M src/mainboard/google/stout/mainboard.c M src/mainboard/google/volteer/mainboard.c M src/mainboard/intel/baskingridge/mainboard.c M src/mainboard/intel/cannonlake_rvp/mainboard.c M src/mainboard/intel/coffeelake_rvp/mainboard.c M src/mainboard/intel/emeraldlake2/mainboard.c M src/mainboard/intel/glkrvp/mainboard.c M src/mainboard/intel/icelake_rvp/mainboard.c M src/mainboard/intel/jasperlake_rvp/mainboard.c M src/mainboard/intel/kblrvp/mainboard.c M src/mainboard/intel/kunimitsu/mainboard.c M src/mainboard/intel/strago/mainboard.c M src/mainboard/intel/tglrvp/mainboard.c M src/mainboard/intel/wtm2/mainboard.c M src/mainboard/lenovo/x200/mainboard.c M src/mainboard/lenovo/x201/mainboard.c M src/mainboard/lenovo/x60/mainboard.c M src/mainboard/samsung/lumpy/mainboard.c M src/mainboard/samsung/stumpy/mainboard.c M src/northbridge/amd/agesa/family14/northbridge.c M src/northbridge/amd/agesa/family15tn/northbridge.c M src/northbridge/amd/agesa/family16kb/northbridge.c M src/northbridge/amd/pi/00630F01/northbridge.c M src/northbridge/amd/pi/00660F01/northbridge.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/intel/gm45/gma.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/haswell/northbridge.c M src/northbridge/intel/i945/gma.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/ironlake/gma.c M src/northbridge/intel/ironlake/northbridge.c M src/northbridge/intel/pineview/gma.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/gma.c M src/northbridge/intel/sandybridge/northbridge.c M src/northbridge/intel/x4x/gma.c M src/northbridge/intel/x4x/northbridge.c M src/soc/amd/common/block/lpc/lpc.c M src/soc/amd/picasso/chip.c M src/soc/amd/picasso/i2c.c M src/soc/amd/picasso/northbridge.c M src/soc/amd/stoneyridge/chip.c M src/soc/amd/stoneyridge/i2c.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/intel/apollolake/chip.c M src/soc/intel/baytrail/northcluster.c M src/soc/intel/baytrail/southcluster.c M src/soc/intel/braswell/northcluster.c M src/soc/intel/braswell/southcluster.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/broadwell/systemagent.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/common/block/scs/sd.c M src/soc/intel/denverton_ns/chip.c M src/soc/intel/denverton_ns/lpc.c M src/soc/intel/icelake/chip.c M src/soc/intel/jasperlake/chip.c M src/soc/intel/skylake/chip.c M src/soc/intel/tigerlake/chip.c M src/soc/intel/xeon_sp/skx/chip.c M src/soc/intel/xeon_sp/uncore.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/bd82x6x/sata.c M src/southbridge/intel/i82371eb/isa.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/ibexpeak/sata.c M src/southbridge/intel/lynxpoint/lpc.c M src/superio/aspeed/ast2400/superio.c M src/superio/common/generic.c M src/superio/nuvoton/nct5539d/superio.c M src/superio/nuvoton/nct6791d/superio.c M src/superio/nuvoton/npcd378/superio.c 133 files changed, 311 insertions(+), 312 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/39977/1 diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index 317cd48..6eded1d 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -430,8 +430,8 @@ { struct device *dev; for (dev = all_devices; dev; dev = dev->next) - if (dev->ops && dev->ops->acpi_fill_ssdt_generator) - dev->ops->acpi_fill_ssdt_generator(dev); + if (dev->ops && dev->ops->acpi_fill_ssdt) + dev->ops->acpi_fill_ssdt(dev); current = (unsigned long) acpigen_get_current(); } @@ -1366,8 +1366,8 @@ acpigen_set_current((char *) current); for (dev = all_devices; dev; dev = dev->next) - if (dev->ops && dev->ops->acpi_inject_dsdt_generator) - dev->ops->acpi_inject_dsdt_generator(dev); + if (dev->ops && dev->ops->acpi_inject_dsdt) + dev->ops->acpi_inject_dsdt(dev); current = (unsigned long) acpigen_get_current(); memcpy((char *)current, (char *)dsdt_file + sizeof(acpi_header_t), diff --git a/src/device/pci_device.c b/src/device/pci_device.c index b1e88a6..0cbb02d 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -768,7 +768,7 @@ .enable_resources = pci_dev_enable_resources, #if CONFIG(HAVE_ACPI_TABLES) .write_acpi_tables = pci_rom_write_acpi_tables, - .acpi_fill_ssdt_generator = pci_rom_ssdt, + .acpi_fill_ssdt = pci_rom_ssdt, #endif .init = pci_dev_init, .scan_bus = 0, diff --git a/src/drivers/crb/tis.c b/src/drivers/crb/tis.c index b1fbad0..32d1550 100644 --- a/src/drivers/crb/tis.c +++ b/src/drivers/crb/tis.c @@ -141,7 +141,7 @@ .set_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) .acpi_name = crb_tpm_acpi_name, - .acpi_fill_ssdt_generator = crb_tpm_fill_ssdt, + .acpi_fill_ssdt = crb_tpm_fill_ssdt, #endif }; diff --git a/src/drivers/generic/adau7002/adau7002.c b/src/drivers/generic/adau7002/adau7002.c index 7f73cef..0a3d623 100644 --- a/src/drivers/generic/adau7002/adau7002.c +++ b/src/drivers/generic/adau7002/adau7002.c @@ -65,12 +65,12 @@ #endif static struct device_operations adau7002_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = adau7002_acpi_name, - .acpi_fill_ssdt_generator = adau7002_fill_ssdt, + .acpi_name = adau7002_acpi_name, + .acpi_fill_ssdt = adau7002_fill_ssdt, #endif }; diff --git a/src/drivers/generic/generic/generic.c b/src/drivers/generic/generic/generic.c index c68fa3a..0ba2d53 100644 --- a/src/drivers/generic/generic/generic.c +++ b/src/drivers/generic/generic/generic.c @@ -78,11 +78,11 @@ } static struct device_operations generic_dev_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = generic_dev_acpi_name, - .acpi_fill_ssdt_generator = generic_dev_fill_ssdt_generator, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = generic_dev_acpi_name, + .acpi_fill_ssdt = generic_dev_fill_ssdt_generator, }; static void generic_dev_enable(struct device *dev) diff --git a/src/drivers/generic/gpio_keys/gpio_keys.c b/src/drivers/generic/gpio_keys/gpio_keys.c index 753a555..67c5913 100644 --- a/src/drivers/generic/gpio_keys/gpio_keys.c +++ b/src/drivers/generic/gpio_keys/gpio_keys.c @@ -112,11 +112,11 @@ } static struct device_operations gpio_keys_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = gpio_keys_acpi_name, - .acpi_fill_ssdt_generator = gpio_keys_fill_ssdt_generator, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = gpio_keys_acpi_name, + .acpi_fill_ssdt = gpio_keys_fill_ssdt_generator, }; static void gpio_keys_enable(struct device *dev) diff --git a/src/drivers/generic/gpio_regulator/gpio_regulator.c b/src/drivers/generic/gpio_regulator/gpio_regulator.c index 23c044d..b476126 100644 --- a/src/drivers/generic/gpio_regulator/gpio_regulator.c +++ b/src/drivers/generic/gpio_regulator/gpio_regulator.c @@ -73,7 +73,7 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .acpi_name = gpio_regulator_acpi_name, - .acpi_fill_ssdt_generator = gpio_regulator_fill_ssdt_generator, + .acpi_fill_ssdt = gpio_regulator_fill_ssdt_generator, }; static void gpio_regulator_enable(struct device *dev) diff --git a/src/drivers/generic/max98357a/max98357a.c b/src/drivers/generic/max98357a/max98357a.c index 56fd26c..6f724f8 100644 --- a/src/drivers/generic/max98357a/max98357a.c +++ b/src/drivers/generic/max98357a/max98357a.c @@ -80,12 +80,12 @@ #endif static struct device_operations max98357a_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = max98357a_acpi_name, - .acpi_fill_ssdt_generator = max98357a_fill_ssdt, + .acpi_name = max98357a_acpi_name, + .acpi_fill_ssdt = max98357a_fill_ssdt, #endif }; diff --git a/src/drivers/gfx/generic/generic.c b/src/drivers/gfx/generic/generic.c index 9e952e8..a20279f 100644 --- a/src/drivers/gfx/generic/generic.c +++ b/src/drivers/gfx/generic/generic.c @@ -151,8 +151,8 @@ } static struct device_operations gfx_ops = { - .acpi_name = gfx_acpi_name, - .acpi_fill_ssdt_generator = gfx_fill_ssdt_generator, + .acpi_name = gfx_acpi_name, + .acpi_fill_ssdt = gfx_fill_ssdt_generator, }; static void gfx_enable(struct device *dev) diff --git a/src/drivers/i2c/da7219/da7219.c b/src/drivers/i2c/da7219/da7219.c index f82cd9f..5c67eda 100644 --- a/src/drivers/i2c/da7219/da7219.c +++ b/src/drivers/i2c/da7219/da7219.c @@ -108,12 +108,12 @@ #endif static struct device_operations da7219_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = da7219_acpi_name, - .acpi_fill_ssdt_generator = da7219_fill_ssdt, + .acpi_name = da7219_acpi_name, + .acpi_fill_ssdt = da7219_fill_ssdt, #endif }; diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c index 0b36e5f..592e791 100644 --- a/src/drivers/i2c/generic/generic.c +++ b/src/drivers/i2c/generic/generic.c @@ -190,12 +190,12 @@ #endif static struct device_operations i2c_generic_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = i2c_generic_acpi_name, - .acpi_fill_ssdt_generator = i2c_generic_fill_ssdt_generator, + .acpi_name = i2c_generic_acpi_name, + .acpi_fill_ssdt = i2c_generic_fill_ssdt_generator, #endif }; diff --git a/src/drivers/i2c/hid/hid.c b/src/drivers/i2c/hid/hid.c index b8185d0..6e4169e 100644 --- a/src/drivers/i2c/hid/hid.c +++ b/src/drivers/i2c/hid/hid.c @@ -47,12 +47,12 @@ #endif static struct device_operations i2c_hid_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = i2c_hid_acpi_name, - .acpi_fill_ssdt_generator = i2c_hid_fill_ssdt_generator, + .acpi_name = i2c_hid_acpi_name, + .acpi_fill_ssdt = i2c_hid_fill_ssdt_generator, #endif }; diff --git a/src/drivers/i2c/max98373/max98373.c b/src/drivers/i2c/max98373/max98373.c index 48db3e1..71ba75b 100644 --- a/src/drivers/i2c/max98373/max98373.c +++ b/src/drivers/i2c/max98373/max98373.c @@ -85,11 +85,11 @@ } static struct device_operations max98373_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = max98373_acpi_name, - .acpi_fill_ssdt_generator = max98373_fill_ssdt, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = max98373_acpi_name, + .acpi_fill_ssdt = max98373_fill_ssdt, }; static void max98373_enable(struct device *dev) diff --git a/src/drivers/i2c/max98927/max98927.c b/src/drivers/i2c/max98927/max98927.c index 1cc72d3..7979fe3 100644 --- a/src/drivers/i2c/max98927/max98927.c +++ b/src/drivers/i2c/max98927/max98927.c @@ -81,11 +81,11 @@ } static struct device_operations max98927_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = max98927_acpi_name, - .acpi_fill_ssdt_generator = max98927_fill_ssdt, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = max98927_acpi_name, + .acpi_fill_ssdt = max98927_fill_ssdt, }; static void max98927_enable(struct device *dev) diff --git a/src/drivers/i2c/nau8825/nau8825.c b/src/drivers/i2c/nau8825/nau8825.c index 33b3421..5d56b24 100644 --- a/src/drivers/i2c/nau8825/nau8825.c +++ b/src/drivers/i2c/nau8825/nau8825.c @@ -96,12 +96,12 @@ #endif static struct device_operations nau8825_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = nau8825_acpi_name, - .acpi_fill_ssdt_generator = nau8825_fill_ssdt, + .acpi_name = nau8825_acpi_name, + .acpi_fill_ssdt = nau8825_fill_ssdt, #endif }; diff --git a/src/drivers/i2c/rt1011/rt1011.c b/src/drivers/i2c/rt1011/rt1011.c index 8dc3cd9..cfaeae8 100644 --- a/src/drivers/i2c/rt1011/rt1011.c +++ b/src/drivers/i2c/rt1011/rt1011.c @@ -99,7 +99,7 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .acpi_name = rt1011_acpi_name, - .acpi_fill_ssdt_generator = rt1011_fill_ssdt, + .acpi_fill_ssdt = rt1011_fill_ssdt, }; static void rt1011_enable(struct device *dev) diff --git a/src/drivers/i2c/rt5663/rt5663.c b/src/drivers/i2c/rt5663/rt5663.c index 6f4e032..15014cd 100644 --- a/src/drivers/i2c/rt5663/rt5663.c +++ b/src/drivers/i2c/rt5663/rt5663.c @@ -85,11 +85,11 @@ } static struct device_operations rt5663_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = rt5663_acpi_name, - .acpi_fill_ssdt_generator = rt5663_fill_ssdt, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = rt5663_acpi_name, + .acpi_fill_ssdt = rt5663_fill_ssdt, }; static void rt5663_enable(struct device *dev) diff --git a/src/drivers/i2c/sx9310/sx9310.c b/src/drivers/i2c/sx9310/sx9310.c index 9da6875..781d09d 100644 --- a/src/drivers/i2c/sx9310/sx9310.c +++ b/src/drivers/i2c/sx9310/sx9310.c @@ -89,11 +89,11 @@ } static struct device_operations i2c_sx9310_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = i2c_sx9310_acpi_name, - .acpi_fill_ssdt_generator = i2c_sx9310_fill_ssdt, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = i2c_sx9310_acpi_name, + .acpi_fill_ssdt = i2c_sx9310_fill_ssdt, }; static void i2c_sx9310_enable(struct device *dev) diff --git a/src/drivers/i2c/tpm/chip.c b/src/drivers/i2c/tpm/chip.c index b13f6667..d36e4c2 100644 --- a/src/drivers/i2c/tpm/chip.c +++ b/src/drivers/i2c/tpm/chip.c @@ -72,11 +72,11 @@ } static struct device_operations i2c_tpm_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = i2c_tpm_acpi_name, - .acpi_fill_ssdt_generator = i2c_tpm_fill_ssdt, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = i2c_tpm_acpi_name, + .acpi_fill_ssdt = i2c_tpm_fill_ssdt, }; static void i2c_tpm_enable(struct device *dev) diff --git a/src/drivers/intel/ish/ish.c b/src/drivers/intel/ish/ish.c index d542bd3..256b486 100644 --- a/src/drivers/intel/ish/ish.c +++ b/src/drivers/intel/ish/ish.c @@ -40,10 +40,10 @@ } static struct device_operations intel_ish_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_fill_ssdt_generator = ish_fill_ssdt_generator, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_fill_ssdt = ish_fill_ssdt_generator, }; static void intel_ish_enable(struct device *dev) diff --git a/src/drivers/intel/mipi_camera/camera.c b/src/drivers/intel/mipi_camera/camera.c index 0cada81..92fa00b 100644 --- a/src/drivers/intel/mipi_camera/camera.c +++ b/src/drivers/intel/mipi_camera/camera.c @@ -78,11 +78,11 @@ } static struct device_operations camera_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = camera_acpi_name, - .acpi_fill_ssdt_generator = camera_fill_ssdt, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = camera_acpi_name, + .acpi_fill_ssdt = camera_fill_ssdt, }; static void camera_enable(struct device *dev) diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c index e5efbe1..af7407d 100644 --- a/src/drivers/intel/wifi/wifi.c +++ b/src/drivers/intel/wifi/wifi.c @@ -90,17 +90,17 @@ }; struct device_operations device_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = wifi_pci_dev_init, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = wifi_pci_dev_init, #if CONFIG(GENERATE_SMBIOS_TABLES) - .get_smbios_data = smbios_write_wifi, + .get_smbios_data = smbios_write_wifi, #endif - .ops_pci = &pci_ops, + .ops_pci = &pci_ops, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = generic_wifi_acpi_name, - .acpi_fill_ssdt_generator = intel_wifi_fill_ssdt, + .acpi_name = generic_wifi_acpi_name, + .acpi_fill_ssdt = intel_wifi_fill_ssdt, #endif }; diff --git a/src/drivers/ipmi/ipmi_kcs_ops.c b/src/drivers/ipmi/ipmi_kcs_ops.c index e0fa1b0..e5f60fe 100644 --- a/src/drivers/ipmi/ipmi_kcs_ops.c +++ b/src/drivers/ipmi/ipmi_kcs_ops.c @@ -362,7 +362,7 @@ .init = ipmi_kcs_init, #if CONFIG(HAVE_ACPI_TABLES) .write_acpi_tables = ipmi_write_acpi_tables, - .acpi_fill_ssdt_generator = ipmi_ssdt, + .acpi_fill_ssdt = ipmi_ssdt, #endif #if CONFIG(GENERATE_SMBIOS_TABLES) .get_smbios_data = ipmi_smbios_data, diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index a3e1e1b..c764b43 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -374,8 +374,8 @@ .init = r8168_init, .scan_bus = 0, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = r8168_net_acpi_name, - .acpi_fill_ssdt_generator = r8168_net_fill_ssdt, + .acpi_name = r8168_net_acpi_name, + .acpi_fill_ssdt = r8168_net_fill_ssdt, #endif }; diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c index a35ef83..b9fd0cf 100644 --- a/src/drivers/pc80/tpm/tis.c +++ b/src/drivers/pc80/tpm/tis.c @@ -988,8 +988,8 @@ .read_resources = lpc_tpm_read_resources, .set_resources = lpc_tpm_set_resources, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = lpc_tpm_acpi_name, - .acpi_fill_ssdt_generator = lpc_tpm_fill_ssdt, + .acpi_name = lpc_tpm_acpi_name, + .acpi_fill_ssdt = lpc_tpm_fill_ssdt, #endif }; diff --git a/src/drivers/spi/acpi/acpi.c b/src/drivers/spi/acpi/acpi.c index 7e107d6..30a8126 100644 --- a/src/drivers/spi/acpi/acpi.c +++ b/src/drivers/spi/acpi/acpi.c @@ -200,11 +200,11 @@ } static struct device_operations spi_acpi_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .acpi_name = spi_acpi_name, - .acpi_fill_ssdt_generator = spi_acpi_fill_ssdt_generator, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_name = spi_acpi_name, + .acpi_fill_ssdt = spi_acpi_fill_ssdt_generator, }; static void spi_acpi_enable(struct device *dev) diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c index a312c88..2402e8b 100644 --- a/src/drivers/usb/acpi/usb_acpi.c +++ b/src/drivers/usb/acpi/usb_acpi.c @@ -80,11 +80,11 @@ } static struct device_operations usb_acpi_ops = { - .read_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .enable_resources = DEVICE_NOOP, - .scan_bus = scan_static_bus, - .acpi_fill_ssdt_generator = usb_acpi_fill_ssdt_generator, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .scan_bus = scan_static_bus, + .acpi_fill_ssdt = usb_acpi_fill_ssdt_generator, }; static void usb_acpi_enable(struct device *dev) diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 4b97ff9..c621a39 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -452,8 +452,8 @@ .enable_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_name = google_chromeec_acpi_name, - .acpi_fill_ssdt_generator = google_chromeec_fill_ssdt_generator, + .acpi_name = google_chromeec_acpi_name, + .acpi_fill_ssdt = google_chromeec_fill_ssdt_generator, #endif }; diff --git a/src/ec/google/wilco/chip.c b/src/ec/google/wilco/chip.c index e1181ee..acbd487 100644 --- a/src/ec/google/wilco/chip.c +++ b/src/ec/google/wilco/chip.c @@ -228,12 +228,12 @@ } static struct device_operations ops = { - .init = wilco_ec_init, - .read_resources = wilco_ec_read_resources, - .enable_resources = DEVICE_NOOP, - .set_resources = DEVICE_NOOP, - .acpi_fill_ssdt_generator = wilco_ec_fill_ssdt_generator, - .acpi_name = wilco_ec_acpi_name, + .init = wilco_ec_init, + .read_resources = wilco_ec_read_resources, + .enable_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .acpi_fill_ssdt = wilco_ec_fill_ssdt_generator, + .acpi_name = wilco_ec_acpi_name, }; static struct pnp_info info[] = { diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index cafbe64..3bdb50d 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -227,7 +227,7 @@ .get_smbios_strings = h8_smbios_strings, #endif #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = h8_ssdt_generator, + .acpi_fill_ssdt = h8_ssdt_generator, .acpi_name = h8_acpi_name, #endif .init = h8_init, diff --git a/src/include/device/device.h b/src/include/device/device.h index 333ac5d..9ba4d31 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -50,8 +50,8 @@ #if CONFIG(HAVE_ACPI_TABLES) unsigned long (*write_acpi_tables)(struct device *dev, unsigned long start, struct acpi_rsdp *rsdp); - void (*acpi_fill_ssdt_generator)(struct device *dev); - void (*acpi_inject_dsdt_generator)(struct device *dev); + void (*acpi_fill_ssdt)(struct device *dev); + void (*acpi_inject_dsdt)(struct device *dev); const char *(*acpi_name)(const struct device *dev); /* Returns the optional _HID (Hardware ID) */ const char *(*acpi_hid)(const struct device *dev); diff --git a/src/mainboard/google/auron/mainboard.c b/src/mainboard/google/auron/mainboard.c index da72d8f..3cb44f9 100644 --- a/src/mainboard/google/auron/mainboard.c +++ b/src/mainboard/google/auron/mainboard.c @@ -41,7 +41,7 @@ { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = mainboard_smbios_data; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/google/beltino/mainboard.c b/src/mainboard/google/beltino/mainboard.c index 2b42ceb..43f8010 100644 --- a/src/mainboard/google/beltino/mainboard.c +++ b/src/mainboard/google/beltino/mainboard.c @@ -40,7 +40,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/butterfly/mainboard.c b/src/mainboard/google/butterfly/mainboard.c index 37c17ee..03a1df4 100644 --- a/src/mainboard/google/butterfly/mainboard.c +++ b/src/mainboard/google/butterfly/mainboard.c @@ -271,7 +271,7 @@ { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = butterfly_onboard_smbios_data; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/google/cyan/mainboard.c b/src/mainboard/google/cyan/mainboard.c index 0d137f1..2ef44d4 100644 --- a/src/mainboard/google/cyan/mainboard.c +++ b/src/mainboard/google/cyan/mainboard.c @@ -28,7 +28,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } diff --git a/src/mainboard/google/dedede/mainboard.c b/src/mainboard/google/dedede/mainboard.c index 4df190c..aa2de37 100644 --- a/src/mainboard/google/dedede/mainboard.c +++ b/src/mainboard/google/dedede/mainboard.c @@ -35,7 +35,7 @@ { dev->ops->init = mainboard_dev_init; dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/deltaur/mainboard.c b/src/mainboard/google/deltaur/mainboard.c index eca5ee8..0a906d6 100644 --- a/src/mainboard/google/deltaur/mainboard.c +++ b/src/mainboard/google/deltaur/mainboard.c @@ -14,7 +14,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } static void mainboard_chip_init(void *chip_info) diff --git a/src/mainboard/google/dragonegg/mainboard.c b/src/mainboard/google/dragonegg/mainboard.c index 64f7a92..225b072 100644 --- a/src/mainboard/google/dragonegg/mainboard.c +++ b/src/mainboard/google/dragonegg/mainboard.c @@ -34,7 +34,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->write_acpi_tables = NULL; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/drallion/ramstage.c b/src/mainboard/google/drallion/ramstage.c index 38dc133..1c537d5 100644 --- a/src/mainboard/google/drallion/ramstage.c +++ b/src/mainboard/google/drallion/ramstage.c @@ -69,7 +69,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/eve/mainboard.c b/src/mainboard/google/eve/mainboard.c index 37b4b67..106d6ac 100644 --- a/src/mainboard/google/eve/mainboard.c +++ b/src/mainboard/google/eve/mainboard.c @@ -70,7 +70,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; dev->ops->write_acpi_tables = mainboard_write_acpi_tables; } diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index 6bb298b..ef23dc5 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -230,7 +230,7 @@ mainboard_set_power_limits(conf); dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; dev->ops->write_acpi_tables = mainboard_write_acpi_tables; } diff --git a/src/mainboard/google/glados/mainboard.c b/src/mainboard/google/glados/mainboard.c index 1f5f6a8..4f58599 100644 --- a/src/mainboard/google/glados/mainboard.c +++ b/src/mainboard/google/glados/mainboard.c @@ -108,7 +108,7 @@ { dev->ops->init = mainboard_init; dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } static void mainboard_chip_init(void *chip_info) diff --git a/src/mainboard/google/hatch/ramstage.c b/src/mainboard/google/hatch/ramstage.c index 005a1a9..9b940b4 100644 --- a/src/mainboard/google/hatch/ramstage.c +++ b/src/mainboard/google/hatch/ramstage.c @@ -48,7 +48,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; variant_mainboard_enable(dev); } diff --git a/src/mainboard/google/jecht/mainboard.c b/src/mainboard/google/jecht/mainboard.c index 2a8a7fc..0c621cd 100644 --- a/src/mainboard/google/jecht/mainboard.c +++ b/src/mainboard/google/jecht/mainboard.c @@ -34,7 +34,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index 9650298..968cd7c 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -169,7 +169,7 @@ /* Initialize the PIRQ data structures for consumption */ pirq_setup(); - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c index 4551be8..23ae30b 100644 --- a/src/mainboard/google/link/mainboard.c +++ b/src/mainboard/google/link/mainboard.c @@ -184,7 +184,7 @@ { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = link_onboard_smbios_data; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; #if CONFIG(VGA_ROM_RUN) /* Install custom int15 handler for VGA OPROM */ mainboard_interrupt_handlers(0x15, &int15_handler); diff --git a/src/mainboard/google/octopus/mainboard.c b/src/mainboard/google/octopus/mainboard.c index 6dc661d..7b73b9d 100644 --- a/src/mainboard/google/octopus/mainboard.c +++ b/src/mainboard/google/octopus/mainboard.c @@ -108,7 +108,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/parrot/mainboard.c b/src/mainboard/google/parrot/mainboard.c index 6b242ff..98939b4 100644 --- a/src/mainboard/google/parrot/mainboard.c +++ b/src/mainboard/google/parrot/mainboard.c @@ -74,7 +74,7 @@ { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = parrot_onboard_smbios_data; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/google/poppy/mainboard.c b/src/mainboard/google/poppy/mainboard.c index 4c75a10..a375d1f 100644 --- a/src/mainboard/google/poppy/mainboard.c +++ b/src/mainboard/google/poppy/mainboard.c @@ -59,7 +59,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; dev->ops->write_acpi_tables = mainboard_write_acpi_tables; } diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c index 4ecb08e..4a1fd91 100644 --- a/src/mainboard/google/rambi/mainboard.c +++ b/src/mainboard/google/rambi/mainboard.c @@ -161,7 +161,7 @@ { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = mainboard_smbios_data; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; #if CONFIG(VGA_ROM_RUN) /* Install custom int15 handler for VGA OPROM */ mainboard_interrupt_handlers(0x15, &int15_handler); diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c index 2ba1e67..ec09963 100644 --- a/src/mainboard/google/reef/mainboard.c +++ b/src/mainboard/google/reef/mainboard.c @@ -137,7 +137,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/sarien/ramstage.c b/src/mainboard/google/sarien/ramstage.c index 7df73b0..6676e91 100644 --- a/src/mainboard/google/sarien/ramstage.c +++ b/src/mainboard/google/sarien/ramstage.c @@ -81,7 +81,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/slippy/mainboard.c b/src/mainboard/google/slippy/mainboard.c index b7af366..2a2b13b 100644 --- a/src/mainboard/google/slippy/mainboard.c +++ b/src/mainboard/google/slippy/mainboard.c @@ -81,7 +81,7 @@ { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = mainboard_smbios_data; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/google/stout/mainboard.c b/src/mainboard/google/stout/mainboard.c index 23d2889..b411763 100644 --- a/src/mainboard/google/stout/mainboard.c +++ b/src/mainboard/google/stout/mainboard.c @@ -57,7 +57,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c index 2d505e1..4e9843c 100644 --- a/src/mainboard/google/volteer/mainboard.c +++ b/src/mainboard/google/volteer/mainboard.c @@ -24,7 +24,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } static void mainboard_chip_init(void *chip_info) diff --git a/src/mainboard/intel/baskingridge/mainboard.c b/src/mainboard/intel/baskingridge/mainboard.c index 28dabf0..d60d3bf 100644 --- a/src/mainboard/intel/baskingridge/mainboard.c +++ b/src/mainboard/intel/baskingridge/mainboard.c @@ -31,7 +31,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/intel/cannonlake_rvp/mainboard.c b/src/mainboard/intel/cannonlake_rvp/mainboard.c index 7cf4bfa..3f6174d 100644 --- a/src/mainboard/intel/cannonlake_rvp/mainboard.c +++ b/src/mainboard/intel/cannonlake_rvp/mainboard.c @@ -58,7 +58,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/coffeelake_rvp/mainboard.c b/src/mainboard/intel/coffeelake_rvp/mainboard.c index 6343f88..6077cbf 100644 --- a/src/mainboard/intel/coffeelake_rvp/mainboard.c +++ b/src/mainboard/intel/coffeelake_rvp/mainboard.c @@ -57,7 +57,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/emeraldlake2/mainboard.c b/src/mainboard/intel/emeraldlake2/mainboard.c index d6141c7..74c365b 100644 --- a/src/mainboard/intel/emeraldlake2/mainboard.c +++ b/src/mainboard/intel/emeraldlake2/mainboard.c @@ -24,7 +24,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/intel/glkrvp/mainboard.c b/src/mainboard/intel/glkrvp/mainboard.c index 139d879..0670afe 100644 --- a/src/mainboard/intel/glkrvp/mainboard.c +++ b/src/mainboard/intel/glkrvp/mainboard.c @@ -67,7 +67,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/icelake_rvp/mainboard.c b/src/mainboard/intel/icelake_rvp/mainboard.c index 051c6a6..2f6595f 100644 --- a/src/mainboard/intel/icelake_rvp/mainboard.c +++ b/src/mainboard/intel/icelake_rvp/mainboard.c @@ -30,7 +30,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/jasperlake_rvp/mainboard.c b/src/mainboard/intel/jasperlake_rvp/mainboard.c index 2f84d7a..b765eec 100644 --- a/src/mainboard/intel/jasperlake_rvp/mainboard.c +++ b/src/mainboard/intel/jasperlake_rvp/mainboard.c @@ -29,7 +29,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/kblrvp/mainboard.c b/src/mainboard/intel/kblrvp/mainboard.c index 46c35cb..7e2df10 100644 --- a/src/mainboard/intel/kblrvp/mainboard.c +++ b/src/mainboard/intel/kblrvp/mainboard.c @@ -33,7 +33,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/kunimitsu/mainboard.c b/src/mainboard/intel/kunimitsu/mainboard.c index 40275fd..41453d4 100644 --- a/src/mainboard/intel/kunimitsu/mainboard.c +++ b/src/mainboard/intel/kunimitsu/mainboard.c @@ -95,7 +95,7 @@ { dev->ops->init = mainboard_init; dev->ops->write_acpi_tables = mainboard_write_acpi_tables; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/strago/mainboard.c b/src/mainboard/intel/strago/mainboard.c index 8e7deff..16c89fc 100644 --- a/src/mainboard/intel/strago/mainboard.c +++ b/src/mainboard/intel/strago/mainboard.c @@ -30,7 +30,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } diff --git a/src/mainboard/intel/tglrvp/mainboard.c b/src/mainboard/intel/tglrvp/mainboard.c index 1f24e8b..680472b 100644 --- a/src/mainboard/intel/tglrvp/mainboard.c +++ b/src/mainboard/intel/tglrvp/mainboard.c @@ -40,7 +40,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/wtm2/mainboard.c b/src/mainboard/intel/wtm2/mainboard.c index fbe3981..aa4a707 100644 --- a/src/mainboard/intel/wtm2/mainboard.c +++ b/src/mainboard/intel/wtm2/mainboard.c @@ -30,7 +30,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/lenovo/x200/mainboard.c b/src/mainboard/lenovo/x200/mainboard.c index 37823bc..3406689 100644 --- a/src/mainboard/lenovo/x200/mainboard.c +++ b/src/mainboard/lenovo/x200/mainboard.c @@ -28,7 +28,7 @@ GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 2); - dev->ops->acpi_fill_ssdt_generator = fill_ssdt; + dev->ops->acpi_fill_ssdt = fill_ssdt; if (CONFIG(BOARD_LENOVO_X200)) init_dock(); } diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index 212f3a9..dbbb755 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -29,7 +29,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_fill_ssdt_generator = fill_ssdt; + dev->ops->acpi_fill_ssdt = fill_ssdt; /* If we're resuming from suspend, blink suspend LED */ if (acpi_is_wakeup_s3()) diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c index 7b399e4..839fdab 100644 --- a/src/mainboard/lenovo/x60/mainboard.c +++ b/src/mainboard/lenovo/x60/mainboard.c @@ -119,7 +119,7 @@ static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_fill_ssdt_generator = fill_ssdt; + dev->ops->acpi_fill_ssdt = fill_ssdt; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/samsung/lumpy/mainboard.c b/src/mainboard/samsung/lumpy/mainboard.c index 44360ee..fcf4140 100644 --- a/src/mainboard/samsung/lumpy/mainboard.c +++ b/src/mainboard/samsung/lumpy/mainboard.c @@ -90,7 +90,7 @@ { dev->ops->init = mainboard_init; dev->ops->get_smbios_data = lumpy_onboard_smbios_data; - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/mainboard/samsung/stumpy/mainboard.c b/src/mainboard/samsung/stumpy/mainboard.c index 45a60c6..757f2fd 100644 --- a/src/mainboard/samsung/stumpy/mainboard.c +++ b/src/mainboard/samsung/stumpy/mainboard.c @@ -23,7 +23,7 @@ static void mainboard_enable(struct device *dev) { - dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 1ac5a69..a1d3457 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -807,7 +807,7 @@ .read_resources = nb_read_resources, .set_resources = nb_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .init = northbridge_init, .enable = 0,.ops_pci = 0, diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index a62e12e..c5f649e 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -561,7 +561,7 @@ .set_resources = nb_set_resources, .enable_resources = pci_dev_enable_resources, .init = DEVICE_NOOP, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .enable = 0, .ops_pci = 0, diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 2cdcb58..d9c3c36 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -560,7 +560,7 @@ .set_resources = set_resources, .enable_resources = pci_dev_enable_resources, .init = DEVICE_NOOP, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .enable = 0, .ops_pci = 0, diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index e90848a..30c68d8 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -555,7 +555,7 @@ .set_resources = set_resources, .enable_resources = pci_dev_enable_resources, .init = DEVICE_NOOP, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .enable = 0, .ops_pci = 0, diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index 2005086..44ff370 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -545,7 +545,7 @@ .set_resources = set_resources, .enable_resources = pci_dev_enable_resources, .init = northbridge_init, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .enable = 0, .ops_pci = 0, diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index f611bd6..0a07dfa 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -775,7 +775,7 @@ .set_resources = set_resources, .enable_resources = pci_dev_enable_resources, .init = northbridge_init, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .enable = 0, .ops_pci = 0, diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index eed0b92..821487a 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -279,7 +279,7 @@ .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = gma_ssdt, + .acpi_fill_ssdt = gma_ssdt, .init = gma_func0_init, .scan_bus = 0, .enable = 0, diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index a0ff04f..9484cd9 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -233,7 +233,7 @@ .init = mch_domain_init, .scan_bus = pci_domain_scan_bus, .write_acpi_tables = northbridge_write_acpi_tables, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, .acpi_name = northbridge_acpi_name, }; diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 65c5cf3..c0eaf6d 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -573,15 +573,15 @@ }; static struct device_operations gma_func0_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = gma_func0_init, - .acpi_fill_ssdt_generator = gma_ssdt, - .scan_bus = NULL, - .enable = NULL, - .ops_pci = &gma_pci_ops, - .write_acpi_tables = gma_write_acpi_tables, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = gma_func0_init, + .acpi_fill_ssdt = gma_ssdt, + .scan_bus = NULL, + .enable = NULL, + .ops_pci = &gma_pci_ops, + .write_acpi_tables = gma_write_acpi_tables, }; static const unsigned short pci_device_ids[] = { diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index c8273a1..4e16ca0 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -472,13 +472,13 @@ }; static struct device_operations mc_ops = { - .read_resources = mc_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = northbridge_init, - .acpi_fill_ssdt_generator = generate_cpu_entries, - .scan_bus = NULL, - .ops_pci = &intel_pci_ops, + .read_resources = mc_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = northbridge_init, + .acpi_fill_ssdt = generate_cpu_entries, + .scan_bus = NULL, + .ops_pci = &intel_pci_ops, }; static const unsigned short mc_pci_device_ids[] = { diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index f4d6aaf..c26ffb4 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -829,7 +829,7 @@ .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = gma_func0_init, - .acpi_fill_ssdt_generator = gma_ssdt, + .acpi_fill_ssdt = gma_ssdt, .scan_bus = 0, .enable = 0, .disable = gma_func0_disable, diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index a91efbf..16cf5e6 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -195,7 +195,7 @@ .read_resources = mc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, .scan_bus = 0, .ops_pci = &intel_pci_ops, }; diff --git a/src/northbridge/intel/ironlake/gma.c b/src/northbridge/intel/ironlake/gma.c index cba25aa..b35305b 100644 --- a/src/northbridge/intel/ironlake/gma.c +++ b/src/northbridge/intel/ironlake/gma.c @@ -269,7 +269,7 @@ .read_resources = gma_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = gma_ssdt, + .acpi_fill_ssdt = gma_ssdt, .init = gma_func0_init, .scan_bus = 0, .enable = 0, diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c index 1af4a1c..4637175 100644 --- a/src/northbridge/intel/ironlake/northbridge.c +++ b/src/northbridge/intel/ironlake/northbridge.c @@ -255,7 +255,7 @@ .set_resources = mc_set_resources, .enable_resources = pci_dev_enable_resources, .init = northbridge_init, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, .scan_bus = 0, .ops_pci = &intel_pci_ops, }; diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c index 0b04ade..307529d 100644 --- a/src/northbridge/intel/pineview/gma.c +++ b/src/northbridge/intel/pineview/gma.c @@ -334,16 +334,16 @@ }; static struct device_operations gma_func0_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = NULL, - .init = gma_func0_init, - .scan_bus = NULL, - .enable = NULL, - .ops_pci = &gma_pci_ops, - .acpi_name = gma_acpi_name, - .write_acpi_tables = gma_write_acpi_tables, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .acpi_fill_ssdt = NULL, + .init = gma_func0_init, + .scan_bus = NULL, + .enable = NULL, + .ops_pci = &gma_pci_ops, + .acpi_name = gma_acpi_name, + .write_acpi_tables = gma_write_acpi_tables, }; static const unsigned short pci_device_ids[] = diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index 727db82..87443ca 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -184,12 +184,12 @@ } static struct device_operations pci_domain_ops = { - .read_resources = mch_domain_read_resources, - .set_resources = mch_domain_set_resources, - .init = mch_domain_init, - .scan_bus = pci_domain_scan_bus, - .acpi_fill_ssdt_generator = generate_cpu_entries, - .acpi_name = northbridge_acpi_name, + .read_resources = mch_domain_read_resources, + .set_resources = mch_domain_set_resources, + .init = mch_domain_init, + .scan_bus = pci_domain_scan_bus, + .acpi_fill_ssdt = generate_cpu_entries, + .acpi_name = northbridge_acpi_name, }; static struct device_operations cpu_bus_ops = { diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 1680b1e..e79277c 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -707,17 +707,17 @@ }; static struct device_operations gma_func0_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = gma_ssdt, - .init = gma_func0_init, - .scan_bus = NULL, - .enable = NULL, - .disable = gma_func0_disable, - .ops_pci = &gma_pci_ops, - .acpi_name = gma_acpi_name, - .write_acpi_tables = gma_write_acpi_tables, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .acpi_fill_ssdt = gma_ssdt, + .init = gma_func0_init, + .scan_bus = NULL, + .enable = NULL, + .disable = gma_func0_disable, + .ops_pci = &gma_pci_ops, + .acpi_name = gma_acpi_name, + .write_acpi_tables = gma_write_acpi_tables, }; static const unsigned short pci_device_ids[] = { diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index ef03865..ff5d7f2 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -440,13 +440,13 @@ }; static struct device_operations mc_ops = { - .read_resources = mc_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = northbridge_init, - .scan_bus = NULL, - .ops_pci = &intel_pci_ops, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .read_resources = mc_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = northbridge_init, + .scan_bus = NULL, + .ops_pci = &intel_pci_ops, + .acpi_fill_ssdt = generate_cpu_entries, }; static const unsigned short pci_device_ids[] = { diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c index d43ddf9..ff8820c 100644 --- a/src/northbridge/intel/x4x/gma.c +++ b/src/northbridge/intel/x4x/gma.c @@ -149,7 +149,7 @@ .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = gma_ssdt, + .acpi_fill_ssdt = gma_ssdt, .init = gma_func0_init, .ops_pci = &gma_pci_ops, .disable = gma_func0_disable, diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 732d97e..63243f1 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -183,7 +183,7 @@ .init = mch_domain_init, .scan_bus = pci_domain_scan_bus, .write_acpi_tables = northbridge_write_acpi_tables, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, .acpi_name = northbridge_acpi_name, }; diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c index ff7d561..7f9b715 100644 --- a/src/soc/amd/common/block/lpc/lpc.c +++ b/src/soc/amd/common/block/lpc/lpc.c @@ -325,7 +325,7 @@ .read_resources = lpc_read_resources, .set_resources = lpc_set_resources, .enable_resources = lpc_enable_resources, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, + .acpi_inject_dsdt = southbridge_inject_dsdt, .write_acpi_tables = southbridge_write_acpi_tables, .init = lpc_init, .scan_bus = scan_static_bus, diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index a7b0c26..cf9bd54 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -34,7 +34,7 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .init = picasso_init_cpus, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, }; const char *soc_acpi_name(const struct device *dev) diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c index 5e5db9e..e2da961 100644 --- a/src/soc/amd/picasso/i2c.c +++ b/src/soc/amd/picasso/i2c.c @@ -144,7 +144,7 @@ .enable_resources = DEVICE_NOOP, .scan_bus = scan_smbus, .acpi_name = i2c_acpi_name, - .acpi_fill_ssdt_generator = dw_i2c_acpi_fill_ssdt, + .acpi_fill_ssdt = dw_i2c_acpi_fill_ssdt, }; /* diff --git a/src/soc/amd/picasso/northbridge.c b/src/soc/amd/picasso/northbridge.c index 7be5aef..20589a9 100644 --- a/src/soc/amd/picasso/northbridge.c +++ b/src/soc/amd/picasso/northbridge.c @@ -203,7 +203,7 @@ .read_resources = read_resources, .set_resources = set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .enable = 0, .ops_pci = 0, diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index aa3c322..2719533 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -39,7 +39,7 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .init = stoney_init_cpus, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, }; const char *soc_acpi_name(const struct device *dev) diff --git a/src/soc/amd/stoneyridge/i2c.c b/src/soc/amd/stoneyridge/i2c.c index e5c2d98..8db2638 100644 --- a/src/soc/amd/stoneyridge/i2c.c +++ b/src/soc/amd/stoneyridge/i2c.c @@ -141,7 +141,7 @@ .enable_resources = DEVICE_NOOP, .scan_bus = scan_smbus, .acpi_name = i2c_acpi_name, - .acpi_fill_ssdt_generator = dw_i2c_acpi_fill_ssdt, + .acpi_fill_ssdt = dw_i2c_acpi_fill_ssdt, }; /* diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 3707049..afcd498 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -356,7 +356,7 @@ .set_resources = set_resources, .enable_resources = pci_dev_enable_resources, .init = northbridge_init, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .acpi_fill_ssdt = northbridge_fill_ssdt_generator, .write_acpi_tables = agesa_write_acpi_tables, .enable = 0, .ops_pci = 0, diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 5a65260..ee533bb 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -226,7 +226,7 @@ .enable_resources = DEVICE_NOOP, .init = apollolake_init_cpus, .scan_bus = NULL, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, }; static void enable_dev(struct device *dev) diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c index d7f1748..0b61fe7 100644 --- a/src/soc/intel/baytrail/northcluster.c +++ b/src/soc/intel/baytrail/northcluster.c @@ -136,7 +136,7 @@ static struct device_operations nc_ops = { .read_resources = nc_read_resources, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, .set_resources = NULL, .enable_resources = NULL, .init = NULL, diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 746a353..be58f42 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -521,7 +521,7 @@ static struct device_operations device_ops = { .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, - .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .acpi_inject_dsdt = southcluster_inject_dsdt, .write_acpi_tables = acpi_write_hpet, .enable_resources = NULL, .init = sc_init, diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c index f8e3391..4acef25 100644 --- a/src/soc/intel/braswell/northcluster.c +++ b/src/soc/intel/braswell/northcluster.c @@ -166,9 +166,9 @@ } static struct device_operations nc_ops = { - .acpi_fill_ssdt_generator = generate_cpu_entries, - .read_resources = nc_read_resources, - .ops_pci = &soc_pci_ops, + .acpi_fill_ssdt = generate_cpu_entries, + .read_resources = nc_read_resources, + .ops_pci = &soc_pci_ops, }; static const struct pci_driver nc_driver __pci_driver = { diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index be0d910..aa054d6 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -573,7 +573,7 @@ .read_resources = sc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = NULL, - .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .acpi_inject_dsdt = southcluster_inject_dsdt, .write_acpi_tables = southcluster_write_acpi_tables, .init = sc_init, .enable = southcluster_enable_dev, diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 15b383c..bc6bc6b 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -623,7 +623,7 @@ .read_resources = &pch_lpc_read_resources, .set_resources = &pci_dev_set_resources, .enable_resources = &pci_dev_enable_resources, - .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .acpi_inject_dsdt = southcluster_inject_dsdt, .write_acpi_tables = broadwell_write_acpi_tables, .init = &lpc_init, .scan_bus = &scan_static_bus, diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c index 1af554a..fdaa9f6 100644 --- a/src/soc/intel/broadwell/systemagent.c +++ b/src/soc/intel/broadwell/systemagent.c @@ -440,7 +440,7 @@ static struct device_operations systemagent_ops = { .read_resources = systemagent_read_resources, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = systemagent_init, diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index a53c1a8..a2a678b 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -199,7 +199,7 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .init = DEVICE_NOOP, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, }; static void soc_enable(struct device *dev) diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index e1eb6fe..55c181b 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -126,16 +126,16 @@ } static const struct device_operations graphics_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = graphics_soc_init, - .ops_pci = &pci_dev_ops_pci, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = graphics_soc_init, + .ops_pci = &pci_dev_ops_pci, #if CONFIG(HAVE_ACPI_TABLES) - .write_acpi_tables = graphics_soc_write_acpi_opregion, - .acpi_fill_ssdt_generator = gma_generate_ssdt, + .write_acpi_tables = graphics_soc_write_acpi_opregion, + .acpi_fill_ssdt = gma_generate_ssdt, #endif - .scan_bus = scan_generic_bus, + .scan_bus = scan_generic_bus, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index b5ea15e..6612210 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -175,15 +175,15 @@ } static struct device_operations i2c_dev_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .scan_bus = scan_smbus, - .ops_i2c_bus = &dw_i2c_bus_ops, - .ops_pci = &pci_dev_ops_pci, - .init = dw_i2c_device_init, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_smbus, + .ops_i2c_bus = &dw_i2c_bus_ops, + .ops_pci = &pci_dev_ops_pci, + .init = dw_i2c_device_init, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = dw_i2c_acpi_fill_ssdt, + .acpi_fill_ssdt = dw_i2c_acpi_fill_ssdt, #endif }; diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index e65beb4..4cfd6f4 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -108,16 +108,16 @@ } static struct device_operations device_ops = { - .read_resources = pch_lpc_read_resources, - .set_resources = pch_lpc_set_resources, - .enable_resources = pci_dev_enable_resources, + .read_resources = pch_lpc_read_resources, + .set_resources = pch_lpc_set_resources, + .enable_resources = pci_dev_enable_resources, #if CONFIG(HAVE_ACPI_TABLES) - .write_acpi_tables = southbridge_write_acpi_tables, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, + .write_acpi_tables = southbridge_write_acpi_tables, + .acpi_inject_dsdt = southbridge_inject_dsdt, #endif - .init = lpc_soc_init, - .scan_bus = scan_static_bus, - .ops_pci = &pci_dev_ops_pci, + .init = lpc_soc_init, + .scan_bus = scan_static_bus, + .ops_pci = &pci_dev_ops_pci, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/scs/sd.c b/src/soc/intel/common/block/scs/sd.c index 56af940..d529faa 100644 --- a/src/soc/intel/common/block/scs/sd.c +++ b/src/soc/intel/common/block/scs/sd.c @@ -54,13 +54,13 @@ #endif static struct device_operations dev_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = sd_fill_ssdt, + .acpi_fill_ssdt = sd_fill_ssdt, #endif - .ops_pci = &pci_dev_ops_pci, + .ops_pci = &pci_dev_ops_pci, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c index f71b596..c41d857 100644 --- a/src/soc/intel/denverton_ns/chip.c +++ b/src/soc/intel/denverton_ns/chip.c @@ -48,7 +48,7 @@ .init = denverton_init_cpus, .scan_bus = NULL, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, #endif }; diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c index bf9263d..f695d61 100644 --- a/src/soc/intel/denverton_ns/lpc.c +++ b/src/soc/intel/denverton_ns/lpc.c @@ -552,7 +552,7 @@ .read_resources = lpc_read_resources, .set_resources = pci_dev_set_resources, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_inject_dsdt_generator = southcluster_inject_dsdt, + .acpi_inject_dsdt = southcluster_inject_dsdt, .write_acpi_tables = southcluster_write_acpi_tables, #endif .enable_resources = lpc_enable_resources, diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index d2427b9..304f7e3 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -155,7 +155,7 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .init = DEVICE_NOOP, - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, }; static void soc_enable(struct device *dev) diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c index b7ed9df..2b00f96 100644 --- a/src/soc/intel/jasperlake/chip.c +++ b/src/soc/intel/jasperlake/chip.c @@ -163,7 +163,7 @@ .enable_resources = DEVICE_NOOP, .init = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, #endif }; diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 0ab10ca..40d5b1d 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -111,7 +111,7 @@ .enable_resources = DEVICE_NOOP, .init = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, #endif }; diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c index 1c7078d..231623c 100644 --- a/src/soc/intel/tigerlake/chip.c +++ b/src/soc/intel/tigerlake/chip.c @@ -163,7 +163,7 @@ .enable_resources = DEVICE_NOOP, .init = DEVICE_NOOP, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, #endif }; diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c index 7a737ac..764e70f 100644 --- a/src/soc/intel/xeon_sp/skx/chip.c +++ b/src/soc/intel/xeon_sp/skx/chip.c @@ -489,7 +489,7 @@ .scan_bus = NULL, #if CONFIG(HAVE_ACPI_TABLES) /* defined in src/soc/intel/common/block/acpi/acpi.c */ - .acpi_fill_ssdt_generator = generate_cpu_entries, + .acpi_fill_ssdt = generate_cpu_entries, #endif }; diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index c72c6c3..f549eec 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -288,7 +288,7 @@ .init = mmapvtd_init, .ops_pci = &soc_pci_ops, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_inject_dsdt_generator = NULL, + .acpi_inject_dsdt = NULL, #endif }; diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 46ab5fc..1f92193 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -884,8 +884,8 @@ .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .write_acpi_tables = acpi_write_hpet, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, - .acpi_fill_ssdt_generator = southbridge_fill_ssdt, + .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, .init = lpc_init, .final = lpc_final, diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index ba3630a..4d2ac1c 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -255,8 +255,7 @@ .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator - = sata_fill_ssdt, + .acpi_fill_ssdt = sata_fill_ssdt, .init = sata_init, .enable = sata_enable, .scan_bus = 0, diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 6e1347d..7fe243f 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -130,8 +130,8 @@ .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, #if CONFIG(HAVE_ACPI_TABLES) - .write_acpi_tables = acpi_write_hpet, - .acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator, + .write_acpi_tables = acpi_write_hpet, + .acpi_fill_ssdt = southbridge_acpi_fill_ssdt_generator, #endif .init = isa_init, .scan_bus = scan_static_bus, diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 743dbba..db0dc41 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -684,9 +684,9 @@ .read_resources = i82801gx_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, + .acpi_inject_dsdt = southbridge_inject_dsdt, .write_acpi_tables = acpi_write_hpet, - .acpi_fill_ssdt_generator = southbridge_fill_ssdt, + .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, .init = lpc_init, .scan_bus = scan_static_bus, diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 8b5efd9..6260164 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -530,9 +530,9 @@ .read_resources = i82801ix_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, + .acpi_inject_dsdt = southbridge_inject_dsdt, .write_acpi_tables = acpi_write_hpet, - .acpi_fill_ssdt_generator = southbridge_fill_ssdt, + .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, .init = lpc_init, .scan_bus = scan_static_bus, diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index e3fdde7..5f02d74 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -688,9 +688,9 @@ .read_resources = i82801jx_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, + .acpi_inject_dsdt = southbridge_inject_dsdt, .write_acpi_tables = acpi_write_hpet, - .acpi_fill_ssdt_generator = southbridge_fill_ssdt, + .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, .init = lpc_init, .scan_bus = scan_static_bus, diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 0062e09..5f76313 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -765,8 +765,8 @@ .read_resources = pch_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, - .acpi_fill_ssdt_generator = southbridge_fill_ssdt, + .acpi_inject_dsdt = southbridge_inject_dsdt, + .acpi_fill_ssdt = southbridge_fill_ssdt, .acpi_name = lpc_acpi_name, .write_acpi_tables = acpi_write_hpet, .init = lpc_init, diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index 33437ef..555b5ca 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -240,7 +240,7 @@ .enable_resources = pci_dev_enable_resources, .init = sata_init, .enable = sata_enable, - .acpi_fill_ssdt_generator = sata_fill_ssdt, + .acpi_fill_ssdt = sata_fill_ssdt, .scan_bus = 0, .ops_pci = &sata_pci_ops, }; diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 745c231..f0b88b2 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -963,8 +963,8 @@ .read_resources = pch_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .acpi_fill_ssdt_generator = southbridge_fill_ssdt, - .acpi_inject_dsdt_generator = southbridge_inject_dsdt, + .acpi_fill_ssdt = southbridge_fill_ssdt, + .acpi_inject_dsdt = southbridge_inject_dsdt, .acpi_name = lpc_acpi_name, .write_acpi_tables = southbridge_write_acpi_tables, .init = lpc_init, diff --git a/src/superio/aspeed/ast2400/superio.c b/src/superio/aspeed/ast2400/superio.c index 4867f6e..a896b64 100644 --- a/src/superio/aspeed/ast2400/superio.c +++ b/src/superio/aspeed/ast2400/superio.c @@ -66,7 +66,7 @@ .init = ast2400_init, .ops_pnp_mode = &pnp_conf_mode_a5a5_aa, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = superio_common_fill_ssdt_generator, + .acpi_fill_ssdt = superio_common_fill_ssdt_generator, .acpi_name = superio_common_ldn_acpi_name, .acpi_hid = ast2400_acpi_hid, #endif diff --git a/src/superio/common/generic.c b/src/superio/common/generic.c index de78199..1aba80a 100644 --- a/src/superio/common/generic.c +++ b/src/superio/common/generic.c @@ -301,8 +301,8 @@ .enable_resources = DEVICE_NOOP, .scan_bus = scan_static_bus, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = generic_ssdt, - .acpi_name = generic_acpi_name, + .acpi_fill_ssdt = generic_ssdt, + .acpi_name = generic_acpi_name, #endif }; diff --git a/src/superio/nuvoton/nct5539d/superio.c b/src/superio/nuvoton/nct5539d/superio.c index 5402b2e..9a620c9 100644 --- a/src/superio/nuvoton/nct5539d/superio.c +++ b/src/superio/nuvoton/nct5539d/superio.c @@ -52,9 +52,9 @@ .init = nct5539d_init, .ops_pnp_mode = &pnp_conf_mode_8787_aa, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = superio_common_fill_ssdt_generator, - .acpi_name = superio_common_ldn_acpi_name, - .acpi_hid = nct5539d_acpi_hid, + .acpi_fill_ssdt = superio_common_fill_ssdt_generator, + .acpi_name = superio_common_ldn_acpi_name, + .acpi_hid = nct5539d_acpi_hid, #endif }; diff --git a/src/superio/nuvoton/nct6791d/superio.c b/src/superio/nuvoton/nct6791d/superio.c index a8e267b..e04a923 100644 --- a/src/superio/nuvoton/nct6791d/superio.c +++ b/src/superio/nuvoton/nct6791d/superio.c @@ -50,9 +50,9 @@ .init = nct6791d_init, .ops_pnp_mode = &pnp_conf_mode_8787_aa, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = superio_common_fill_ssdt_generator, - .acpi_name = superio_common_ldn_acpi_name, - .acpi_hid = nct6791d_acpi_hid, + .acpi_fill_ssdt = superio_common_fill_ssdt_generator, + .acpi_name = superio_common_ldn_acpi_name, + .acpi_hid = nct6791d_acpi_hid, #endif }; diff --git a/src/superio/nuvoton/npcd378/superio.c b/src/superio/nuvoton/npcd378/superio.c index a07afdc..3ca6c50 100644 --- a/src/superio/nuvoton/npcd378/superio.c +++ b/src/superio/nuvoton/npcd378/superio.c @@ -424,16 +424,16 @@ #endif static struct device_operations ops = { - .read_resources = pnp_read_resources, - .set_resources = pnp_set_resources, - .enable_resources = pnp_enable_resources, - .enable = pnp_alt_enable, - .init = npcd378_init, - .ops_pnp_mode = &pnp_conf_mode_8787_aa, + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_alt_enable, + .init = npcd378_init, + .ops_pnp_mode = &pnp_conf_mode_8787_aa, #if CONFIG(HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = npcd378_fill_ssdt_generator, - .acpi_name = superio_common_ldn_acpi_name, - .acpi_hid = npcd378_acpi_hid, + .acpi_fill_ssdt = npcd378_fill_ssdt_generator, + .acpi_name = superio_common_ldn_acpi_name, + .acpi_hid = npcd378_acpi_hid, #endif }; -- To view, visit https://review.coreboot.org/c/coreboot/+/39977 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f0e79632c9c855f38fe24c0186388a25990c44d Gerrit-Change-Number: 39977 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

7 8

Change in coreboot[master]: [WIP] mainboard: Add Acer ES1-572
by Benjamin Doron (Code Review) 02 Apr '20

02 Apr '20

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38978 ) Change subject: [WIP] mainboard: Add Acer ES1-572 ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/c/coreboot/+/38978/5//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/38978/5//COMMIT_MSG@31 PS5, Line 31: - Battery. I have it somewhere. > wut? only ACPI? we don't have a driver for the EC ENE ECs have their own ROMs. I have a board with a similar EC (KB9028 or KB9038) and a driver isn't needed. It's presently selecting EC_ACPI, but it is possible that this isn't necessary. -- To view, visit https://review.coreboot.org/c/coreboot/+/38978 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id98788a2c5e54f70fd1cacbd70d636f5e63b2619 Gerrit-Change-Number: 38978 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Comment-Date: Thu, 02 Apr 2020 19:49:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/ocp/tiogapass: use common GPIO config
by Maxim Polyakov (Code Review) 02 Apr '20

02 Apr '20

Hello build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39427 to look at the new patch set (#24). Change subject: mb/ocp/tiogapass: use common GPIO config ...................................................................... mb/ocp/tiogapass: use common GPIO config According to changes in the soc/xeon_sp code [1,2], server motherboards with Lewisburg PCH can use the common pad configuration from soc/intel/ common, using macros PAD_CFG_ instead of the FSP-style GPIO definitions. This patch adds the GPIO configuration, which has the format required by the driver from common/gpio. The data for this was taken from the inteltool register dump with AMI firmware and converted to macros using intelp2m (pch-pads-parser) [3,4]. [1] https://review.coreboot.org/c/coreboot/+/39425 [2] https://review.coreboot.org/c/coreboot/+/39428 [3] https://review.coreboot.org/c/coreboot/+/35643 [4] https://github.com/maxpoliak/pch-pads-parser Change-Id: I818d040fa33f3e7b94b73c9bbbafca5df424616d Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/bootblock.c A src/mainboard/ocp/tiogapass/gpio.h M src/mainboard/ocp/tiogapass/ramstage.c M src/mainboard/ocp/tiogapass/romstage.c 5 files changed, 619 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/39427/24 -- To view, visit https://review.coreboot.org/c/coreboot/+/39427 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I818d040fa33f3e7b94b73c9bbbafca5df424616d Gerrit-Change-Number: 39427 Gerrit-PatchSet: 24 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/xeon_sp: Add Lewisburg defs for common/gpio driver
by Maxim Polyakov (Code Review) 02 Apr '20

02 Apr '20

Hello build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39425 to look at the new patch set (#18). Change subject: soc/intel/xeon_sp: Add Lewisburg defs for common/gpio driver ...................................................................... soc/intel/xeon_sp: Add Lewisburg defs for common/gpio driver Adds definitions that allow to use the common GPIO driver to configure the Lewisburg PCH pads. Using the GPIO configuration from common/gpio, unlike the FSP-style definitions from Intel RefCode [1] definitions, is more understandable and makes the motherboards code much cleaner. In addition, we can use utilities, such as intetool, to analyze the configuration of proprietary firmware to add support for new server motherboards with Skylake-SP processors. The pin layout in this patch corresponds to the driver in the Linux kernel for Lewisburg PCH GPIO hardware [2] [1] https://designintools.intel.com/product_p/stlgrn45.htm [2] drivers/pinctrl/intel/pinctrl-lewisburg.c These changes are in accordance with the documentation: [*] page 39, Intel(R) C620 Series Chipset Platform Controller Hub (PCH) Datasheet, May 2019. Document Number: 336067-007US Change-Id: Idde32fdd53f1966e3ba6b7f5598ae8f51488d5a5 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/soc/intel/xeon_sp/Makefile.inc A src/soc/intel/xeon_sp/gpio.c A src/soc/intel/xeon_sp/include/soc/gpio.h A src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h M src/soc/intel/xeon_sp/include/soc/pcr_ids.h 5 files changed, 884 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/39425/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/39425 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idde32fdd53f1966e3ba6b7f5598ae8f51488d5a5 Gerrit-Change-Number: 39425 Gerrit-PatchSet: 18 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: Add macros and SPD information for DDR4
by Furquan Shaikh (Code Review) 02 Apr '20

02 Apr '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39866 ) Change subject: soc/intel/tigerlake: Add macros and SPD information for DDR4 ...................................................................... soc/intel/tigerlake: Add macros and SPD information for DDR4 This change adds new memory topologies (SODIMM, MIXED) that are supported by DDR4 and macros required for DDR4 support. Memory initialization support for DDR4 will be added in a follow-up change. Signed-off-by: Furquan Shaikh <furquan(a)google.com> Change-Id: I4b565c3d71bbf437da64ac29597cc19e58f1b98a --- M src/soc/intel/tigerlake/include/soc/meminit_tgl.h 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/39866/1 diff --git a/src/soc/intel/tigerlake/include/soc/meminit_tgl.h b/src/soc/intel/tigerlake/include/soc/meminit_tgl.h index 82d632e..652cbab 100644 --- a/src/soc/intel/tigerlake/include/soc/meminit_tgl.h +++ b/src/soc/intel/tigerlake/include/soc/meminit_tgl.h @@ -12,6 +12,7 @@ #include <stdint.h> #include <fsp/soc_binding.h> +#define DIMMS_PER_CHANNEL 2 #define BYTES_PER_CHANNEL 2 #define BITS_PER_BYTE 8 #define DQ_PER_CHANNEL (BYTES_PER_CHANNEL * BITS_PER_BYTE) @@ -20,8 +21,13 @@ #define LPDDR4X_CHANNELS 8 +#define DDR4_CHANNELS 2 +#define DDR4_DIMM_SLOTS (DIMMS_PER_CHANNEL * DDR4_CHANNELS) + enum mem_topology { MEMORY_DOWN, /* Supports reading SPD from CBFS or in-memory pointer. */ + SODIMM, /* Supports reading SPD using SMBus. */ + MIXED, /* Only DDR4 supports this (CH0 = MD, CH1 = SODIMM) */ }; enum md_spd_loc { @@ -44,6 +50,9 @@ uintptr_t data_ptr; size_t data_len; }; + + /* SPD info for SODIMM topology */ + uint8_t smbus_addr[DDR4_DIMM_SLOTS]; }; /* Board-specific memory configuration information */ -- To view, visit https://review.coreboot.org/c/coreboot/+/39866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b565c3d71bbf437da64ac29597cc19e58f1b98a Gerrit-Change-Number: 39866 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tigerlake: Reorganize memory initialization support
by Furquan Shaikh (Code Review) 02 Apr '20

02 Apr '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39865 ) Change subject: soc/intel/tigerlake: Reorganize memory initialization support ...................................................................... soc/intel/tigerlake: Reorganize memory initialization support This change reorganizes memory initialization code for LPDDR4x on TGL to allow sharing of code when adding support for other memory types. In follow-up changes, support for DDR4 will be added. It adds configuration for memory topology which is currently only MEMORY_DOWN, however DDR4 requires more topologies to be supported. Additionally, spd_info structure is organized to allow mixed topologies as well. TEST=Verified that volteer still boots and memory initialization is successful. Signed-off-by: Furquan Shaikh <furquan(a)google.com> Change-Id: Ib625f2ab30a6e1362a310d9abb3f2051f85c3013 --- M src/mainboard/google/volteer/romstage.c M src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/volteer/variants/baseboard/memory.c M src/soc/intel/tigerlake/include/soc/meminit_tgl.h M src/soc/intel/tigerlake/meminit_tgl.c 5 files changed, 219 insertions(+), 145 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/39865/1 diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 5d588b2..2a51276 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -17,12 +17,13 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; - const struct mb_lpddr4x_cfg *board_cfg = variant_memory_params(); + const struct lpddr4x_cfg *board_cfg = variant_memory_params(); const struct spd_info spd_info = { - .read_type = READ_SPD_CBFS, - .spd_spec.spd_index = variant_memory_sku(), + .topology = MEMORY_DOWN, + .md_spd_loc = SPD_CBFS, + .cbfs_index = variant_memory_sku(), }; bool half_populated = gpio_get(GPIO_MEM_CH_SEL); - meminit_lpddr4x_dimm0(mem_cfg, board_cfg, &spd_info, half_populated); + meminit_lpddr4x(mem_cfg, board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h index f368d88..8ab4531 100644 --- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h @@ -23,7 +23,7 @@ const struct cros_gpio *variant_cros_gpios(size_t *num); -const struct mb_lpddr4x_cfg *variant_memory_params(void); +const struct lpddr4x_cfg *variant_memory_params(void); int variant_memory_sku(void); #endif /* __BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/volteer/variants/baseboard/memory.c b/src/mainboard/google/volteer/variants/baseboard/memory.c index db2946d..d16de47 100644 --- a/src/mainboard/google/volteer/variants/baseboard/memory.c +++ b/src/mainboard/google/volteer/variants/baseboard/memory.c @@ -9,7 +9,7 @@ #include <baseboard/variants.h> #include <gpio.h> -static const struct mb_lpddr4x_cfg baseboard_memcfg = { +static const struct lpddr4x_cfg baseboard_memcfg = { /* DQ byte map */ .dq_map = { { 0, 1, 2, 3, 4, 5, 6, 7, /* Byte 0 */ @@ -40,7 +40,7 @@ .ect = 0, /* Disable Early Command Training */ }; -const struct mb_lpddr4x_cfg *__weak variant_memory_params(void) +const struct lpddr4x_cfg *__weak variant_memory_params(void) { return &baseboard_memcfg; } diff --git a/src/soc/intel/tigerlake/include/soc/meminit_tgl.h b/src/soc/intel/tigerlake/include/soc/meminit_tgl.h index 5573fb7..82d632e 100644 --- a/src/soc/intel/tigerlake/include/soc/meminit_tgl.h +++ b/src/soc/intel/tigerlake/include/soc/meminit_tgl.h @@ -14,35 +14,42 @@ #define BYTES_PER_CHANNEL 2 #define BITS_PER_BYTE 8 -#define DQS_PER_CHANNEL 2 -#define NUM_CHANNELS 8 +#define DQ_PER_CHANNEL (BYTES_PER_CHANNEL * BITS_PER_BYTE) -struct spd_by_pointer { - size_t spd_data_len; - uintptr_t spd_data_ptr; +#define DQS_PER_CHANNEL 2 + +#define LPDDR4X_CHANNELS 8 + +enum mem_topology { + MEMORY_DOWN, /* Supports reading SPD from CBFS or in-memory pointer. */ }; -enum mem_info_read_type { - NOT_EXISTING, /* No memory in this channel */ - READ_SPD_CBFS, /* Find spd file in CBFS. */ - READ_SPD_MEMPTR /* Find spd data from pointer. */ +enum md_spd_loc { + /* Read SPD from pointer provided to memory location. */ + SPD_MEMPTR, + /* Read SPD using index into spd.bin in CBFS. */ + SPD_CBFS, }; struct spd_info { - enum mem_info_read_type read_type; - union spd_data_by { - /* To identify spd file when read_type is READ_SPD_CBFS. */ - int spd_index; + enum mem_topology topology; - /* To find spd data when read_type is READ_SPD_MEMPTR. */ - struct spd_by_pointer spd_data_ptr_info; - } spd_spec; + /* SPD info for Memory down topology */ + enum md_spd_loc md_spd_loc; + union { + /* Used for SPD_CBFS */ + uint8_t cbfs_index; + + /* Used for SPD_MEMPTR */ + uintptr_t data_ptr; + size_t data_len; + }; }; /* Board-specific memory configuration information */ -struct mb_lpddr4x_cfg { +struct lpddr4x_cfg { /* DQ mapping */ - uint8_t dq_map[NUM_CHANNELS][BYTES_PER_CHANNEL * BITS_PER_BYTE]; + uint8_t dq_map[LPDDR4X_CHANNELS][DQ_PER_CHANNEL]; /* * DQS CPU<>DRAM map. Each array entry represents a @@ -51,7 +58,7 @@ * on the memory part, and the values in the array represent which * pin on the CPU that DRAM pin connects to. */ - uint8_t dqs_map[NUM_CHANNELS][DQS_PER_CHANNEL]; + uint8_t dqs_map[LPDDR4X_CHANNELS][DQS_PER_CHANNEL]; /* * Early Command Training Enable/Disable Control @@ -60,10 +67,7 @@ uint8_t ect; }; -/* Initialize default memory configurations for dimm0-only lpddr4x */ -void meminit_lpddr4x_dimm0(FSP_M_CONFIG *mem_cfg, - const struct mb_lpddr4x_cfg *board_cfg, - const struct spd_info *spd, - bool half_populated); +void meminit_lpddr4x(FSP_M_CONFIG *mem_cfg, const struct lpddr4x_cfg *board_cfg, + const struct spd_info *spd, bool half_populated); #endif /* _SOC_MEMINIT_TGL_H_ */ diff --git a/src/soc/intel/tigerlake/meminit_tgl.c b/src/soc/intel/tigerlake/meminit_tgl.c index a0e5107..cc76daf 100644 --- a/src/soc/intel/tigerlake/meminit_tgl.c +++ b/src/soc/intel/tigerlake/meminit_tgl.c @@ -19,145 +19,214 @@ DISABLE_BOTH_DIMMS = 3 }; -#define MEM_INIT_CH_DQ_DQS_MAP(_mem_cfg, _b_cfg, _ch) \ - do { \ - memcpy(&_mem_cfg->DqMapCpu2DramCh ## _ch, \ - &_b_cfg->dq_map[_ch], \ - sizeof(_b_cfg->dq_map[_ch])); \ - memcpy(&_mem_cfg->DqsMapCpu2DramCh ## _ch, \ - &_b_cfg->dqs_map[_ch], \ - sizeof(_b_cfg->dqs_map[_ch])); \ - } while (0) +static uint8_t get_dimm_cfg(uintptr_t dimm0, uintptr_t dimm1) +{ + if (dimm0 && dimm1) + return ENABLE_BOTH_DIMMS; + if (!dimm0 && !dimm1) + return DISABLE_BOTH_DIMMS; + if (!dimm1) + return DISABLE_DIMM1; + if (dimm0) + die("Disabling of only dimm0 is not supported!\n"); + + return DISABLE_BOTH_DIMMS; +} -static void spd_read_from_cbfs(const struct spd_info *spd, - uintptr_t *spd_data_ptr, size_t *spd_data_len) +static void init_spd_upds(FSP_M_CONFIG *mem_cfg, int channel, uintptr_t spd_dimm0, + uintptr_t spd_dimm1) +{ + mem_cfg->Reserved9[channel] = get_dimm_cfg(spd_dimm0, spd_dimm1); + + switch (channel) { + case 0: + mem_cfg->MemorySpdPtr00 = spd_dimm0; + mem_cfg->MemorySpdPtr01 = spd_dimm1; + break; + + case 1: + mem_cfg->MemorySpdPtr02 = spd_dimm0; + mem_cfg->MemorySpdPtr03 = spd_dimm1; + break; + + case 2: + mem_cfg->MemorySpdPtr04 = spd_dimm0; + mem_cfg->MemorySpdPtr05 = spd_dimm1; + break; + + case 3: + mem_cfg->MemorySpdPtr06 = spd_dimm0; + mem_cfg->MemorySpdPtr07 = spd_dimm1; + break; + + case 4: + mem_cfg->MemorySpdPtr08 = spd_dimm0; + mem_cfg->MemorySpdPtr09 = spd_dimm1; + break; + + case 5: + mem_cfg->MemorySpdPtr10 = spd_dimm0; + mem_cfg->MemorySpdPtr11 = spd_dimm1; + break; + + case 6: + mem_cfg->MemorySpdPtr12 = spd_dimm0; + mem_cfg->MemorySpdPtr13 = spd_dimm1; + break; + + case 7: + mem_cfg->MemorySpdPtr14 = spd_dimm0; + mem_cfg->MemorySpdPtr15 = spd_dimm1; + break; + + default: + die("Invalid channel: %d\n", channel); + } +} + +static void init_dq_upds(FSP_M_CONFIG *mem_cfg, int channel, const uint8_t *dq_arr) +{ + uint8_t *dq_upd; + + switch (channel) { + case 0: + dq_upd = mem_cfg->DqMapCpu2DramCh0; + break; + case 1: + dq_upd = mem_cfg->DqMapCpu2DramCh1; + break; + case 2: + dq_upd = mem_cfg->DqMapCpu2DramCh2; + break; + case 3: + dq_upd = mem_cfg->DqMapCpu2DramCh3; + break; + case 4: + dq_upd = mem_cfg->DqMapCpu2DramCh4; + break; + case 5: + dq_upd = mem_cfg->DqMapCpu2DramCh5; + break; + case 6: + dq_upd = mem_cfg->DqMapCpu2DramCh6; + break; + case 7: + dq_upd = mem_cfg->DqMapCpu2DramCh7; + break; + default: + die("Invalid channel: %d\n", channel); + } + + if (dq_arr) + memcpy(dq_upd, dq_arr, DQ_PER_CHANNEL); + else + memset(dq_upd, 0, DQ_PER_CHANNEL); +} + +static void init_dqs_upds(FSP_M_CONFIG *mem_cfg, int channel, const uint8_t *dqs_arr) +{ + uint8_t *dqs_upd; + + switch (channel) { + case 0: + dqs_upd = mem_cfg->DqsMapCpu2DramCh0; + break; + case 1: + dqs_upd = mem_cfg->DqsMapCpu2DramCh1; + break; + case 2: + dqs_upd = mem_cfg->DqsMapCpu2DramCh2; + break; + case 3: + dqs_upd = mem_cfg->DqsMapCpu2DramCh3; + break; + case 4: + dqs_upd = mem_cfg->DqsMapCpu2DramCh4; + break; + case 5: + dqs_upd = mem_cfg->DqsMapCpu2DramCh5; + break; + case 6: + dqs_upd = mem_cfg->DqsMapCpu2DramCh6; + break; + case 7: + dqs_upd = mem_cfg->DqsMapCpu2DramCh7; + break; + default: + die("Invalid channel: %d\n", channel); + } + + if (dqs_arr) + memcpy(dqs_upd, dqs_arr, DQS_PER_CHANNEL); + else + memset(dqs_upd, 0, DQS_PER_CHANNEL); +} + +static void read_spd_from_cbfs(uint8_t index, uintptr_t *data, size_t *len) { struct region_device spd_rdev; - size_t spd_index = spd->spd_spec.spd_index; - printk(BIOS_DEBUG, "SPD INDEX = %lu\n", spd_index); - if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) + printk(BIOS_DEBUG, "SPD INDEX = %d\n", index); + if (get_spd_cbfs_rdev(&spd_rdev, index) < 0) die("spd.bin not found or incorrect index\n"); - *spd_data_len = region_device_sz(&spd_rdev); - /* Memory leak is ok since we have memory mapped boot media */ assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED)); - *spd_data_ptr = (uintptr_t)rdev_mmap_full(&spd_rdev); + *len = region_device_sz(&spd_rdev); + *data = (uintptr_t)rdev_mmap_full(&spd_rdev); } -static void get_spd_data(const struct spd_info *spd, - uintptr_t *spd_data_ptr, size_t *spd_data_len) +static void read_md_spd(const struct spd_info *info, uintptr_t *data, size_t *len) { - if (spd->read_type == READ_SPD_MEMPTR) { - *spd_data_ptr = spd->spd_spec.spd_data_ptr_info.spd_data_ptr; - *spd_data_len = spd->spd_spec.spd_data_ptr_info.spd_data_len; + if (info->md_spd_loc == SPD_MEMPTR) { + *data = info->data_ptr; + *len = info->data_len; return; } - if (spd->read_type == READ_SPD_CBFS) { - spd_read_from_cbfs(spd, spd_data_ptr, spd_data_len); - return; + if (info->md_spd_loc != SPD_CBFS) { + die("Not a valid location(%d) for Memory-down SPD!\n", info->md_spd_loc); } - die("no valid way to read SPD info"); + read_spd_from_cbfs(info->cbfs_index, data, len); } -static void meminit_dq_dqs_map(FSP_M_CONFIG *mem_cfg, - const struct mb_lpddr4x_cfg *board_cfg, - bool half_populated) -{ - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 0); - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 1); - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 2); - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 3); - - if (half_populated) - return; - - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 4); - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 5); - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 6); - MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 7); -} - -static void meminit_channels_dimm0(FSP_M_CONFIG *mem_cfg, - const struct mb_lpddr4x_cfg *board_cfg, - uintptr_t spd_data_ptr, - bool half_populated) -{ - uint8_t dimm_cfg = DISABLE_DIMM1; /* Use only DIMM0 */ - - /* Channel 0 */ - mem_cfg->Reserved9[0] = dimm_cfg; - mem_cfg->MemorySpdPtr00 = spd_data_ptr; - mem_cfg->MemorySpdPtr01 = 0; - - /* Channel 1 */ - mem_cfg->Reserved9[1] = dimm_cfg; - mem_cfg->MemorySpdPtr02 = spd_data_ptr; - mem_cfg->MemorySpdPtr03 = 0; - - /* Channel 2 */ - mem_cfg->Reserved9[2] = dimm_cfg; - mem_cfg->MemorySpdPtr04 = spd_data_ptr; - mem_cfg->MemorySpdPtr05 = 0; - - /* Channel 3 */ - mem_cfg->Reserved9[3] = dimm_cfg; - mem_cfg->MemorySpdPtr06 = spd_data_ptr; - mem_cfg->MemorySpdPtr07 = 0; - - if (half_populated) { - printk(BIOS_INFO, "%s: DRAM half-populated\n", __func__); - dimm_cfg = DISABLE_BOTH_DIMMS; - spd_data_ptr = 0; - } - - /* Channel 4 */ - mem_cfg->Reserved9[4] = dimm_cfg; - mem_cfg->MemorySpdPtr08 = spd_data_ptr; - mem_cfg->MemorySpdPtr09 = 0; - - /* Channel 5 */ - mem_cfg->Reserved9[5] = dimm_cfg; - mem_cfg->MemorySpdPtr10 = spd_data_ptr; - mem_cfg->MemorySpdPtr11 = 0; - - /* Channel 6 */ - mem_cfg->Reserved9[6] = dimm_cfg; - mem_cfg->MemorySpdPtr12 = spd_data_ptr; - mem_cfg->MemorySpdPtr13 = 0; - - /* Channel 7 */ - mem_cfg->Reserved9[7] = dimm_cfg; - mem_cfg->MemorySpdPtr14 = spd_data_ptr; - mem_cfg->MemorySpdPtr15 = 0; - - meminit_dq_dqs_map(mem_cfg, board_cfg, half_populated); -} - -/* Initialize onboard memory configurations for lpddr4x */ -void meminit_lpddr4x_dimm0(FSP_M_CONFIG *mem_cfg, - const struct mb_lpddr4x_cfg *board_cfg, - const struct spd_info *spd, - bool half_populated) +void meminit_lpddr4x(FSP_M_CONFIG *mem_cfg, const struct lpddr4x_cfg *board_cfg, + const struct spd_info *info, bool half_populated) { - size_t spd_data_len; - uintptr_t spd_data_ptr; + size_t spd_len; + uintptr_t spd_data; + int i; - get_spd_data(spd, &spd_data_ptr, &spd_data_len); - print_spd_info((unsigned char *)spd_data_ptr); + if (info->topology != MEMORY_DOWN) + die("LPDDR4x only support memory-down topology.\n"); - mem_cfg->MemorySpdDataLen = spd_data_len; - meminit_channels_dimm0(mem_cfg, board_cfg, spd_data_ptr, - half_populated); - - /* LPDDR4 does not allow interleaved memory */ + /* LPDDR4x does not allow interleaved memory */ mem_cfg->DqPinsInterleaved = 0; mem_cfg->ECT = board_cfg->ect; mem_cfg->MrcSafeConfig = 0x1; + + read_md_spd(info, &spd_data, &spd_len); + print_spd_info((unsigned char *)spd_data); + + mem_cfg->MemorySpdDataLen = spd_len; + + for (i = 0; i < LPDDR4X_CHANNELS; i++) { + if (half_populated && (i >= (LPDDR4X_CHANNELS / 2))) { + /* + * If memory is half-populated, then upper half of the channels + * need to be left empty. + */ + init_spd_upds(mem_cfg, i, 0, 0); + init_dq_upds(mem_cfg, i, NULL); + init_dqs_upds(mem_cfg, i, NULL); + } else { + init_spd_upds(mem_cfg, i, spd_data, 0); + init_dq_upds(mem_cfg, i, board_cfg->dq_map[i]); + init_dqs_upds(mem_cfg, i, board_cfg->dqs_map[i]); + } + } } -- To view, visit https://review.coreboot.org/c/coreboot/+/39865 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib625f2ab30a6e1362a310d9abb3f2051f85c3013 Gerrit-Change-Number: 39865 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

5 59

Change in coreboot[master]: soc/amd/common/psp: Move definitions into a private file
by Felix Held (Code Review) 02 Apr '20

02 Apr '20

Hello Marshall Dawson, Marshall Dawson, Eric Peers, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/40015 to review the following change. Change subject: soc/amd/common/psp: Move definitions into a private file ...................................................................... soc/amd/common/psp: Move definitions into a private file Declutter psp.h by removing internal details the caller doesn't need to know. TEST: Verify PSP functionality on google/grunt Change-Id: I2fb0ed1d2697c313fb8475e3f00482899e729130 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Reviewed-on: https://chromium-review.googlesource.com/2020366 Tested-by: Eric Peers <epeers(a)google.com> Reviewed-by: Eric Peers <epeers(a)google.com> --- M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/common/block/psp/psp.c A src/soc/amd/common/block/psp/psp_def.h 3 files changed, 75 insertions(+), 62 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/40015/1 diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h index 42c802d..d7f6169 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp.h +++ b/src/soc/amd/common/block/include/amdblocks/psp.h @@ -18,63 +18,7 @@ /* Get the mailbox base address - specific to family of device. */ struct psp_mbox *soc_get_mbox_address(void); -/* x86 to PSP commands */ -#define MBOX_BIOS_CMD_DRAM_INFO 0x01 -#define MBOX_BIOS_CMD_SMM_INFO 0x02 -#define MBOX_BIOS_CMD_SX_INFO 0x03 -#define MBOX_BIOS_CMD_RSM_INFO 0x04 -#define MBOX_BIOS_CMD_PSP_QUERY 0x05 -#define MBOX_BIOS_CMD_BOOT_DONE 0x06 -#define MBOX_BIOS_CMD_CLEAR_S3_STS 0x07 -#define MBOX_BIOS_CMD_S3_DATA_INFO 0x08 -#define MBOX_BIOS_CMD_NOP 0x09 -#define MBOX_BIOS_CMD_SMU_FW 0x19 -#define MBOX_BIOS_CMD_SMU_FW2 0x1a -#define MBOX_BIOS_CMD_ABORT 0xfe - -/* generic PSP interface status */ -#define STATUS_INITIALIZED 0x1 -#define STATUS_ERROR 0x2 -#define STATUS_TERMINATED 0x4 -#define STATUS_HALT 0x8 -#define STATUS_RECOVERY 0x10 - -/* psp_mbox consists of hardware registers beginning at PSPx000070 - * mbox_command: BIOS->PSP command, cleared by PSP when complete - * mbox_status: BIOS->PSP interface status - * cmd_response: pointer to command/response buffer - */ -struct psp_mbox { - u32 mbox_command; - u32 mbox_status; - u64 cmd_response; /* definition conflicts w/BKDG but matches agesa */ -} __packed; - -/* command/response format, BIOS builds this in memory - * mbox_buffer_header: generic header - * mbox_buffer: command-specific buffer format - * - * AMD reference code aligns and pads all buffers to 32 bytes. - */ -struct mbox_buffer_header { - u32 size; /* total size of buffer */ - u32 status; /* command status, filled by PSP if applicable */ -} __packed; - -/* - * command-specific buffer definitions: see NDA document #54267 - * The following commands need a buffer definition if they are to be used. - * All other commands will work with the default buffer. - * MBOX_BIOS_CMD_SMM_INFO MBOX_BIOS_CMD_PSP_QUERY - * MBOX_BIOS_CMD_SX_INFO MBOX_BIOS_CMD_S3_DATA_INFO - * MBOX_BIOS_CMD_RSM_INFO - */ - -struct mbox_default_buffer { /* command-response buffer unused by command */ - struct mbox_buffer_header header; -} __attribute__((packed, aligned(32))); - -/* send_psp_command() error codes */ +/* BIOS-to-PSP functions return 0 if successful, else negative value */ #define PSPSTS_SUCCESS 0 #define PSPSTS_NOBASE 1 #define PSPSTS_HALTED 2 @@ -87,11 +31,6 @@ #define PSPSTS_INVALID_NAME 8 #define PSPSTS_INVALID_BLOB 9 -#define PSP_INIT_TIMEOUT 10000 /* 10 seconds */ -#define PSP_CMD_TIMEOUT 1000 /* 1 second */ - -/* BIOS-to-PSP functions return 0 if successful, else negative value */ - int psp_notify_dram(void); /* diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c index 339e0e2..921775e 100644 --- a/src/soc/amd/common/block/psp/psp.c +++ b/src/soc/amd/common/block/psp/psp.c @@ -22,6 +22,7 @@ #include <console/console.h> #include <device/pci_ops.h> #include <amdblocks/psp.h> +#include "psp_def.h" #include <soc/iomap.h> #include <soc/northbridge.h> diff --git a/src/soc/amd/common/block/psp/psp_def.h b/src/soc/amd/common/block/psp/psp_def.h new file mode 100644 index 0000000..4b3ca6a --- /dev/null +++ b/src/soc/amd/common/block/psp/psp_def.h @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#ifndef __AMD_PSP_DEF_H__ +#define __AMD_PSP_DEF_H__ + +#include <types.h> + +/* x86 to PSP commands */ +#define MBOX_BIOS_CMD_DRAM_INFO 0x01 +#define MBOX_BIOS_CMD_SMM_INFO 0x02 +#define MBOX_BIOS_CMD_SX_INFO 0x03 +#define MBOX_BIOS_CMD_RSM_INFO 0x04 +#define MBOX_BIOS_CMD_PSP_QUERY 0x05 +#define MBOX_BIOS_CMD_BOOT_DONE 0x06 +#define MBOX_BIOS_CMD_CLEAR_S3_STS 0x07 +#define MBOX_BIOS_CMD_S3_DATA_INFO 0x08 +#define MBOX_BIOS_CMD_NOP 0x09 +#define MBOX_BIOS_CMD_SMU_FW 0x19 +#define MBOX_BIOS_CMD_SMU_FW2 0x1a +#define MBOX_BIOS_CMD_ABORT 0xfe + +/* generic PSP interface status */ +#define STATUS_INITIALIZED 0x1 +#define STATUS_ERROR 0x2 +#define STATUS_TERMINATED 0x4 +#define STATUS_HALT 0x8 +#define STATUS_RECOVERY 0x10 + +/* psp_mbox consists of hardware registers beginning at PSPx000070 + * mbox_command: BIOS->PSP command, cleared by PSP when complete + * mbox_status: BIOS->PSP interface status + * cmd_response: pointer to command/response buffer + */ +struct psp_mbox { + u32 mbox_command; + u32 mbox_status; + u64 cmd_response; /* definition conflicts w/BKDG but matches agesa */ +} __packed; + +/* command/response format, BIOS builds this in memory + * mbox_buffer_header: generic header + * mbox_buffer: command-specific buffer format + * + * AMD reference code aligns and pads all buffers to 32 bytes. + */ +struct mbox_buffer_header { + u32 size; /* total size of buffer */ + u32 status; /* command status, filled by PSP if applicable */ +} __packed; + +/* + * command-specific buffer definitions: see NDA document #54267 + * The following commands need a buffer definition if they are to be used. + * All other commands will work with the default buffer. + * MBOX_BIOS_CMD_SMM_INFO MBOX_BIOS_CMD_PSP_QUERY + * MBOX_BIOS_CMD_SX_INFO MBOX_BIOS_CMD_S3_DATA_INFO + * MBOX_BIOS_CMD_RSM_INFO + */ + +struct mbox_default_buffer { /* command-response buffer unused by command */ + struct mbox_buffer_header header; +} __attribute__((packed, aligned(32))); + +struct mbox_cmd_sx_info_buffer { + struct mbox_buffer_header header; + u8 sleep_type; +} __attribute__((packed, aligned(32))); + +#define PSP_INIT_TIMEOUT 10000 /* 10 seconds */ +#define PSP_CMD_TIMEOUT 1000 /* 1 second */ + +#endif /* __AMD_PSP_DEF_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/40015 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2fb0ed1d2697c313fb8475e3f00482899e729130 Gerrit-Change-Number: 40015 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshall.dawson(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2020