coreboot-gerrit April 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: spi: add Winbond W25Q64JW spi rom support
by Paul Menzel (Code Review) 08 Apr '20

08 Apr '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40270 ) Change subject: spi: add Winbond W25Q64JW spi rom support ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/c/coreboot/+/40270/5//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40270/5//COMMIT_MSG@10 PS5, Line 10: TEST=Able to boot to kernel It should also boot without that change, shouldn’t it? Did you check that the MRC cache could be written? -- To view, visit https://review.coreboot.org/c/coreboot/+/40270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I699f6d7ba3af01436f10c9a59af4a22fc45aa300 Gerrit-Change-Number: 40270 Gerrit-PatchSet: 5 Gerrit-Owner: Scott Chao <scott.chao(a)bitland.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Peichao Li <peichao.wang(a)bitland.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper.chang(a)bitland.corp-partner.google.com> Gerrit-CC: Paul Ma <magf(a)bitland.com.cn> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 08 Apr 2020 15:37:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Update JSLRVP USB configuration
by Ronak Kanabar (Code Review) 08 Apr '20

08 Apr '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39403 ) Change subject: mb/intel/jasperlake_rvp: Update JSLRVP USB configuration ...................................................................... Patch Set 18: (3 comments) https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@7 PS15, Line 7: dd JSLRVP USB configration > Update USB configuration Done https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@9 PS15, Line 9: OC > over-current Done https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@10 PS15, Line 10: > Please describe how you are doing this. […] Ack. updated. -- To view, visit https://review.coreboot.org/c/coreboot/+/39403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Gerrit-Change-Number: 39403 Gerrit-PatchSet: 18 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 08 Apr 2020 15:23:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Update JSLRVP USB configuration
by Ronak Kanabar (Code Review) 08 Apr '20

08 Apr '20

Hello V Sowmya, build bot (Jenkins), Maulik V Vaghela, Meera Ravindranath, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39403 to look at the new patch set (#18). Change subject: mb/intel/jasperlake_rvp: Update JSLRVP USB configuration ...................................................................... mb/intel/jasperlake_rvp: Update JSLRVP USB configuration Remove extra USB port entry because it came in from copy patch from the previous board and configure USB over-current pins as per JSLRVP. Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 13 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/39403/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/39403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Gerrit-Change-Number: 39403 Gerrit-PatchSet: 18 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/jasperlake_rvp: Update JSLRVP USB configuration
by Ronak Kanabar (Code Review) 08 Apr '20

08 Apr '20

Hello V Sowmya, build bot (Jenkins), Maulik V Vaghela, Meera Ravindranath, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39403 to look at the new patch set (#17). Change subject: mb/intel/jasperlake_rvp: Update JSLRVP USB configuration ...................................................................... mb/intel/jasperlake_rvp: Update JSLRVP USB configuration Remove extra USB port entry and configure USB over-current pins for JSLRVP. Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 13 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/39403/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/39403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Gerrit-Change-Number: 39403 Gerrit-PatchSet: 17 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/jasperlake_rvp: add JSLRVP USB configuration
by Aamir Bohra (Code Review) 08 Apr '20

08 Apr '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39403 ) Change subject: mb/intel/jasperlake_rvp: add JSLRVP USB configuration ...................................................................... Patch Set 16: (2 comments) https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@7 PS15, Line 7: dd JSLRVP USB configration Update USB configuration https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@9 PS15, Line 9: OC over-current -- To view, visit https://review.coreboot.org/c/coreboot/+/39403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Gerrit-Change-Number: 39403 Gerrit-PatchSet: 16 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 08 Apr 2020 14:56:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: add JSLRVP USB configuration
by Ronak Kanabar (Code Review) 08 Apr '20

08 Apr '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39403 ) Change subject: mb/intel/jasperlake_rvp: add JSLRVP USB configuration ...................................................................... Patch Set 16: (2 comments) https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@7 PS15, Line 7: configration > configuration Done https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@9 PS15, Line 9: Configure USB OC pins for JSLRVP > Please add a dot/period at the end of sentences. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/39403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Gerrit-Change-Number: 39403 Gerrit-PatchSet: 16 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 08 Apr 2020 14:43:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: add JSLRVP USB configuration
by Ronak Kanabar (Code Review) 08 Apr '20

08 Apr '20

Hello V Sowmya, build bot (Jenkins), Maulik V Vaghela, Meera Ravindranath, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/39403 to look at the new patch set (#16). Change subject: mb/intel/jasperlake_rvp: add JSLRVP USB configuration ...................................................................... mb/intel/jasperlake_rvp: add JSLRVP USB configuration Configure USB OC pins for JSLRVP. Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 13 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/39403/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/39403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Gerrit-Change-Number: 39403 Gerrit-PatchSet: 16 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/inteltool: powermgt: move platform structures to subdir
by Paul Menzel (Code Review) 08 Apr '20

08 Apr '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39747 ) Change subject: util/inteltool: powermgt: move platform structures to subdir ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/39747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id33228f1d34ff08f1dd2a699148a477f94b543ff Gerrit-Change-Number: 39747 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 08 Apr 2020 14:40:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/jasperlake_rvp: add JSLRVP USB configration
by Paul Menzel (Code Review) 08 Apr '20

08 Apr '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39403 ) Change subject: mb/intel/jasperlake_rvp: add JSLRVP USB configration ...................................................................... Patch Set 15: (3 comments) https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@7 PS15, Line 7: configration configuration https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@9 PS15, Line 9: Configure USB OC pins for JSLRVP Please add a dot/period at the end of sentences. https://review.coreboot.org/c/coreboot/+/39403/15//COMMIT_MSG@10 PS15, Line 10: Please describe how you are doing this. You remove copied over devices? -- To view, visit https://review.coreboot.org/c/coreboot/+/39403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9df8e330d31ed81207dfdfa2ab96fd4d49f3f0c Gerrit-Change-Number: 39403 Gerrit-PatchSet: 15 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 08 Apr 2020 14:19:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: rules.h: Add ENV_EARLY_RAM
by Marshall Dawson (Code Review) 08 Apr '20

08 Apr '20

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37486 ) Change subject: rules.h: Add ENV_EARLY_RAM ...................................................................... rules.h: Add ENV_EARLY_RAM Add a definition for environments where the x86's reset vector is in DRAM and a unique linker file must be used to coordinate regions across stages. Change-Id: I03703ae37a835de08ad8c905bafa504bdc41e959 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/include/rules.h 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/37486/1 diff --git a/src/include/rules.h b/src/include/rules.h index fa60ede..1947ede 100644 --- a/src/include/rules.h +++ b/src/include/rules.h @@ -255,8 +255,10 @@ #if CONFIG(ARCH_X86) /* Indicates memory layout is determined with arch/x86/car.ld. */ #define ENV_CACHE_AS_RAM (ENV_ROMSTAGE_OR_BEFORE && !CONFIG(RESET_VECTOR_IN_RAM)) +/* Reset vector is in DRAM, and memory layout is determined by its own .ld file. */ +#define ENV_EARLY_RAM (ENV_ROMSTAGE_OR_BEFORE && CONFIG(RESET_VECTOR_IN_RAM)) /* No .data sections with execute-in-place from ROM. */ -#define ENV_STAGE_HAS_DATA_SECTION !ENV_CACHE_AS_RAM +#define ENV_STAGE_HAS_DATA_SECTION (!ENV_CACHE_AS_RAM && !ENV_EARLY_RAM) /* No .bss sections for stage with CAR teardown. */ #define ENV_STAGE_HAS_BSS_SECTION 1 #else -- To view, visit https://review.coreboot.org/c/coreboot/+/37486 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03703ae37a835de08ad8c905bafa504bdc41e959 Gerrit-Change-Number: 37486 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2020