coreboot-gerrit March 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/libretrend/lt1000: Add Libretrend LT1000 board support
by Michał Żygowski (Code Review) 05 Mar '20

05 Mar '20

Hello build bot (Jenkins), Martin Roth, Patrick Georgi, Patrick Rudolph, Piotr Król, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30360 to look at the new patch set (#14). Change subject: mb/libretrend/lt1000: Add Libretrend LT1000 board support ...................................................................... mb/libretrend/lt1000: Add Libretrend LT1000 board support Change-Id: I32fc8a7d3177ba379d04ad8b87adefcfca2b0fab Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/libretrend/lt1000.jpg A Documentation/mainboard/libretrend/lt1000.md M MAINTAINERS A configs/config.libretrend_lt1000 A src/mainboard/libretrend/Kconfig A src/mainboard/libretrend/Kconfig.name A src/mainboard/libretrend/lt1000/Kconfig A src/mainboard/libretrend/lt1000/Kconfig.name A src/mainboard/libretrend/lt1000/Makefile.inc A src/mainboard/libretrend/lt1000/acpi/ec.asl A src/mainboard/libretrend/lt1000/acpi/mainboard.asl A src/mainboard/libretrend/lt1000/acpi/superio.asl A src/mainboard/libretrend/lt1000/board_info.txt A src/mainboard/libretrend/lt1000/bootblock.c A src/mainboard/libretrend/lt1000/data.vbt A src/mainboard/libretrend/lt1000/devicetree.cb A src/mainboard/libretrend/lt1000/dsdt.asl A src/mainboard/libretrend/lt1000/gma-mainboard.ads A src/mainboard/libretrend/lt1000/gpio.h A src/mainboard/libretrend/lt1000/hda_verb.c A src/mainboard/libretrend/lt1000/ramstage.c A src/mainboard/libretrend/lt1000/romstage.c 23 files changed, 960 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/30360/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/30360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32fc8a7d3177ba379d04ad8b87adefcfca2b0fab Gerrit-Change-Number: 30360 Gerrit-PatchSet: 14 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/hatch/puff: Enable VBOOT_EC_EFS
by Paul Menzel (Code Review) 05 Mar '20

05 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39273 ) Change subject: mb/google/hatch/puff: Enable VBOOT_EC_EFS ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/39273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0877000b7d277106436831f2d69775c25299da9e Gerrit-Change-Number: 39273 Gerrit-PatchSet: 2 Gerrit-Owner: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 05 Mar 2020 14:22:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: security/vboot: Support enabling EC EFS with EC software sync
by Paul Menzel (Code Review) 05 Mar '20

05 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39272 ) Change subject: security/vboot: Support enabling EC EFS with EC software sync ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/39272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I697e90748e19d15af154011413b30c0f2a0bf52e Gerrit-Change-Number: 39272 Gerrit-PatchSet: 2 Gerrit-Owner: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 05 Mar 2020 14:22:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/smm: add case intrusion to SMI handler
by Paul Menzel (Code Review) 05 Mar '20

05 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39265 ) Change subject: soc/intel/common/block/smm: add case intrusion to SMI handler ...................................................................... Patch Set 5: Code-Review+1 Thank you! -- To view, visit https://review.coreboot.org/c/coreboot/+/39265 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifad675bb09215ada760efebdcd915958febf5778 Gerrit-Change-Number: 39265 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 05 Mar 2020 12:47:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Fix potential NULL pointer dereferences and memory leak
by Paul Menzel (Code Review) 05 Mar '20

05 Mar '20

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30098 ) Change subject: Fix potential NULL pointer dereferences and memory leak ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/coreboot/+/30098/3/src/arch/x86/acpigen.c File src/arch/x86/acpigen.c: https://review.coreboot.org/c/coreboot/+/30098/3/src/arch/x86/acpigen.c@a399 PS3, Line 399: } Why do you remove this function? It causes build failures. ``` CC cbfs/fallback/ramstage.debug i386-elf-ld.bfd: /cb-build/coreboot-gerrit.0/chromeos/GOOGLE_BUTTERFLY/generated/ramstage.o: in function `generate_cpu_entries': /home/coreboot/slave-root/workspace/coreboot-gerrit/src/cpu/intel/model_206ax/acpi.c:340: undefined reference to `acpigen_write_processor_cnot' make[1]: *** [src/arch/x86/Makefile.inc:314: /cb-build/coreboot-gerrit.0/chromeos/GOOGLE_BUTTERFLY/cbfs/fallback/ramstage.debug] Error 1 make[1]: Leaving directory '/home/coreboot/slave-root/workspace/coreboot-gerrit' ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/30098 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38a8910e68b7a8ce0e97ca4cdb9ef7f595c0e319 Gerrit-Change-Number: 30098 Gerrit-PatchSet: 3 Gerrit-Owner: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Thu, 05 Mar 2020 12:23:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7180: Add QUPv3 FW load & config
by Taniya Das (Code Review) 05 Mar '20

05 Mar '20

Taniya Das has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35499 ) Change subject: sc7180: Add QUPv3 FW load & config ...................................................................... Patch Set 41: (1 comment) https://review.coreboot.org/c/coreboot/+/35499/40/src/soc/qualcomm/sc7180/i… File src/soc/qualcomm/sc7180/include/soc/qupv3_config.h: https://review.coreboot.org/c/coreboot/+/35499/40/src/soc/qualcomm/sc7180/i… PS40, Line 54: #define QUPV3_UART_SRC_HZ 7372800 > Again, this should also be used for where 7372800 appears in clock.c. […] Hi Julius, In the cases where the frequency needs to be updated for UART operation the clock driver needs to be updated. Do you think it is a good idea/way to define it in clock code? Please let me know your comments. -- To view, visit https://review.coreboot.org/c/coreboot/+/35499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d91dd10488931247f81a87b0bdcc598f4bceb31 Gerrit-Change-Number: 35499 Gerrit-PatchSet: 41 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Doug Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-CC: Satya Priya Kakitapalli <c_skakit(a)qualcomm.corp-partner.google.com> Gerrit-CC: Stephen Boyd <swboyd(a)chromium.org> Gerrit-CC: Taniya Das <tdas(a)codeaurora.org> Gerrit-Comment-Date: Thu, 05 Mar 2020 09:25:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add ACPI support for CNVi
by Srinidhi N Kaushik (Code Review) 05 Mar '20

05 Mar '20

Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37887 ) Change subject: soc/intel/tigerlake: Add ACPI support for CNVi ...................................................................... Patch Set 15: -Code-Review I have pushed a new patch for Dynamic SSDT generation for CNVi, https://review.coreboot.org/c/coreboot/+/39315 Will abandon this patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/37887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66091374f8ebcb06457296252c9a8924734a7fa5 Gerrit-Change-Number: 37887 Gerrit-PatchSet: 15 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.corp-partner.google.com> Gerrit-CC: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Thu, 05 Mar 2020 08:54:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "acpi: Bump FADT to revision 6"
by Matt DeVillier (Code Review) 05 Mar '20

05 Mar '20

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39307 ) Change subject: Revert "acpi: Bump FADT to revision 6" ...................................................................... Revert "acpi: Bump FADT to revision 6" This reverts commit c8b0f31ca1b6cae993736d47d919080b6c186c6f. Bumping the FADT table version from 3 to 6 causes Windows 10 to BSOD with an ACPI BIOS error or simply fail to boot on multiple platforms (Haswell, Broadwell, Braswell, Skylake). Revert until the issue can be properly identified and corrected. Change-Id: I261d953321df2616a3f1c3460a535b57a8848315 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/arch/x86/acpi.c M src/arch/x86/include/arch/acpi.h 2 files changed, 3 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/39307/1 diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index b9e896f..6dab373 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -1563,7 +1563,7 @@ { switch (table) { case FADT: - return ACPI_FADT_REV_ACPI_6_0; + return ACPI_FADT_REV_ACPI_3_0; case MADT: /* ACPI 3.0: 2, ACPI 4.0/5.0: 3, ACPI 6.2b/6.3: 5 */ return 2; case MCFG: diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index 67f4be2..68475c1 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -529,8 +529,8 @@ u32 flags; acpi_addr_t reset_reg; u8 reset_value; - u16 ARM_boot_arch; /* Revision 6 only, Revision 5: Must be zero */ - u8 FADT_MinorVersion; /* Revision 6 only, Revision 5: Must be zero */ + u16 ARM_boot_arch; + u8 FADT_MinorVersion; u32 x_firmware_ctl_l; u32 x_firmware_ctl_h; u32 x_dsdt_l; @@ -543,11 +543,6 @@ acpi_addr_t x_pm_tmr_blk; acpi_addr_t x_gpe0_blk; acpi_addr_t x_gpe1_blk; - /* Revision 5 */ - acpi_addr_t sleep_control_reg; - acpi_addr_t sleep_status_reg; - /* Revision 6 */ - u64 hypervisor_vendor_identity; } __packed acpi_fadt_t; /* FADT TABLE Revision values */ -- To view, visit https://review.coreboot.org/c/coreboot/+/39307 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I261d953321df2616a3f1c3460a535b57a8848315 Gerrit-Change-Number: 39307 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: security/vboot: Support enabling EC EFS with EC software sync
by Edward O'Callaghan (Code Review) 04 Mar '20

04 Mar '20

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39272 ) Change subject: security/vboot: Support enabling EC EFS with EC software sync ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I697e90748e19d15af154011413b30c0f2a0bf52e Gerrit-Change-Number: 39272 Gerrit-PatchSet: 2 Gerrit-Owner: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 05 Mar 2020 02:56:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/hatch/puff: Enable VBOOT_EC_EFS
by Edward O'Callaghan (Code Review) 04 Mar '20

04 Mar '20

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39273 ) Change subject: mb/google/hatch/puff: Enable VBOOT_EC_EFS ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/39273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0877000b7d277106436831f2d69775c25299da9e Gerrit-Change-Number: 39273 Gerrit-PatchSet: 2 Gerrit-Owner: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 05 Mar 2020 02:56:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit March 2020