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Change in coreboot[master]: amdfwtool: Apply the change of config file to stoneyridge
by Bao Zheng (Code Review) 05 Oct '20

05 Oct '20

Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/45287 to review the following change. Change subject: amdfwtool: Apply the change of config file to stoneyridge ...................................................................... amdfwtool: Apply the change of config file to stoneyridge Change-Id: I0536f854de533a7419c50da8a2b54d3635b55c61 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc 2 files changed, 28 insertions(+), 112 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/45287/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index b29bd99..1683306 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -194,12 +194,20 @@ string "GEC firmware path and filename" depends on STONEYRIDGE_GEC_FWM -config AMD_PUBKEY_FILE - string "AMD public Key" +config AMDFW_CONFIG_FILE + string + string "AMD PSP Firmware config file" default "" if !USE_AMD_BLOBS - default "3rdparty/amd_blobs/stoneyridge/PSP/CZ/AmdPubKeyCZ.bin" if AMD_APU_MERLINFALCON - default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_PRAIRIEFALCON - default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_STONEYRIDGE + default "3rdparty/amd_blobs/stoneyridge/PSP/CZ/fw.cfg" if AMD_APU_MERLINFALCON + default "3rdparty/amd_blobs/stoneyridge/PSP/ST/fw.cfg" if AMD_APU_PRAIRIEFALCON + default "3rdparty/amd_blobs/stoneyridge/PSP/ST/fw.cfg" if AMD_APU_STONEYRIDGE + +#config AMD_PUBKEY_FILE +# string "AMD public Key" +# default "" if !USE_AMD_BLOBS +# default "3rdparty/amd_blobs/stoneyridge/PSP/CZ/AmdPubKeyCZ.bin" if AMD_APU_MERLINFALCON +# default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_PRAIRIEFALCON +# default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_STONEYRIDGE config STONEYRIDGE_SATA_MODE int "SATA Mode" diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 289f54b..07f0456 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -101,7 +101,9 @@ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) ### 0 -FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))) + +FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMDFW_CONFIG_FILE))) + ifneq ($(FIRMWARE_LOCATE),) ifeq ($(CONFIG_AMD_APU_STONEYRIDGE),y) @@ -119,20 +121,11 @@ endif # CONFIG_AMD_APU_MERLINFALCON endif # CONFIG_AMD_APU_STONEYRIDGE -###5 -PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key +add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) -###1 -PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin +OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci) +OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE), --gec) -###3 -PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin - -###4 -PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin - -###8 - Check for SMU firmware named either *.sbin or *.csbin. Both "signed" and -### "compressed signed" are used by generations supported by this file. SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin ifeq ("$(wildcard $(SMUFWM_FILE))","") @@ -140,113 +133,28 @@ SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin endif -###95 -SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin - -###9 -PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key - -ifeq ($(CONFIG_USE_PSPSECUREOS),y) -###2 -PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin - -###12 -PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin) - -###13 -TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin -endif - -###18- Check for SMU firmware2 named either *.sbin or *.csbin -### TODO: Remove *.sbin section after the blobs repo is updated. -SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin -SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin -ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","") -SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin -SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin -endif - -ifeq ("$(wildcard $(SMUFWM_FN_FILE))","") -SMUFWM_FN_FILE= -SMUFIRMWARE2_FN_FILE= -endif - -add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) - -OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci) -OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec) - -OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey) -OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader) -OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware) -OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery) -OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey) -OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram) -OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug) -ifeq ($(CONFIG_USE_PSPSECUREOS),y) -OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos) -OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets) -OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey) -endif -OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2) -OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs) -SUBPROG_FN_SMU_FW=1 -OPT_SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware) -OPT_SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware2) - ifeq ($(FIRMWARE_TYPE),ST) OPT_COMBOCAPABLE=--combo-capable endif +ifeq ($(CONFIG_USE_PSPSECUREOS),y) +PSP_USE_PSPSECUREOS="--use-pspsecureos" +endif + +OPT_PSP_USE_PSPSECUREOS=$(call strip_quotes, $(PSP_USE_PSPSECUREOS)) + $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ - $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \ - $(call strip_quotes, $(PSPBTLDR_FILE)) \ - $(call strip_quotes, $(PSPRCVR_FILE)) \ - $(call strip_quotes, $(PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(PSPNVRAM_FILE)) \ - $(call strip_quotes, $(SMUFWM_FILE)) \ - $(call strip_quotes, $(SMUFWM_FN_FILE)) \ - $(call strip_quotes, $(SMUSCS_FILE)) \ - $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \ - $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \ - $(call strip_quotes, $(SMUFIRMWARE2_FN_FILE)) \ $(AMDFWTOOL) rm -f $@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" $(AMDFWTOOL) \ $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \ $(OPT_STONEYRIDGE_GEC_FWM_FILE) \ - $(OPT_AMD_PUBKEY_FILE) \ - $(OPT_PSPBTLDR_FILE) \ - $(OPT_SMUFWM_FILE) \ - $(OPT_PSPRCVR_FILE) \ - $(OPT_PUBSIGNEDKEY_FILE) \ - $(OPT_PSPSCUREOS_FILE) \ - $(OPT_PSPNVRAM_FILE) \ - $(OPT_PSPSECUREDEBUG_FILE) \ - $(OPT_PSPTRUSTLETS_FILE) \ - $(OPT_TRUSTLETKEY_FILE) \ - $(OPT_SMUFIRMWARE2_FILE) \ - $(OPT_SMUSCS_FILE) \ - $(OPT_AMD_PUBKEY_FILE) \ - $(OPT_PSPBTLDR_FILE) \ - $(OPT_SMUFWM_FILE) \ - $(OPT_SMUFWM_FN_FILE) \ - $(OPT_PSPRCVR_FILE) \ - $(OPT_PUBSIGNEDKEY_FILE) \ - $(OPT_PSPSCUREOS_FILE) \ - $(OPT_PSPNVRAM_FILE) \ - $(OPT_PSPSECUREDEBUG_FILE) \ - $(OPT_PSPTRUSTLETS_FILE) \ - $(OPT_TRUSTLETKEY_FILE) \ - $(OPT_SMUFIRMWARE2_FILE) \ - $(OPT_SMUFIRMWARE2_FN_FILE) \ - $(OPT_SMUSCS_FILE) \ $(OPT_COMBOCAPABLE)\ + $(OPT_PSP_USE_PSPSECUREOS) \ + --config $(FIRMWARE_LOCATE)/fw.cfg \ --flashsize $(CONFIG_ROM_SIZE) \ --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \ --output $@ @@ -270,7 +178,7 @@ else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) -#cbfs-files-y += apu/amdfw +cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION) apu/amdfw-type := raw -- To view, visit https://review.coreboot.org/c/coreboot/+/45287 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0536f854de533a7419c50da8a2b54d3635b55c61 Gerrit-Change-Number: 45287 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-MessageType: newchange

3 14

Change in coreboot[master]: amdfwtool: Apply the change of config file to hudson
by Bao Zheng (Code Review) 05 Oct '20

05 Oct '20

Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/45288 to review the following change. Change subject: amdfwtool: Apply the change of config file to hudson ...................................................................... amdfwtool: Apply the change of config file to hudson Change-Id: Id953c3e4b5c075815d4cc86bc8cd7ca0ebdf6de7 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/southbridge/amd/pi/hudson/Kconfig M src/southbridge/amd/pi/hudson/Makefile.inc 2 files changed, 12 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/45288/1 diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig index b569690..94418a8 100644 --- a/src/southbridge/amd/pi/hudson/Kconfig +++ b/src/southbridge/amd/pi/hudson/Kconfig @@ -63,6 +63,11 @@ bool default y if CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01 +config AMDFW_CONFIG_FILE + string + string "AMD PSP Firmware config file" + default "3rdparty/blobs/southbridge/amd/avalon/PSP/fw.cfg" if CPU_AMD_PI_00730F01 + config HUDSON_XHCI_FWM_FILE string "XHCI firmware path and filename" default "3rdparty/blobs/southbridge/amd/avalon/xhci.bin" if SOUTHBRIDGE_AMD_PI_AVALON diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index bf8292b..9ad1954 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -78,10 +78,10 @@ ifeq ($(CONFIG_HUDSON_PSP), y) ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y) -FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))) +FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMDFW_CONFIG_FILE))) FIRMWARE_TYPE= -PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader.Bypass.sbin +#PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader.Bypass.sbin #PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecovery.sbin #PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs.sbin #PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/trustlets.bin @@ -102,9 +102,9 @@ #PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key #PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin -SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin -SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin -SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin +#SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin +#SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin +#SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin #PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key endif @@ -131,18 +131,6 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \ - $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ - $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \ - $(call strip_quotes, $(PSPBTLDR_FILE)) \ - $(call strip_quotes, $(PSPRCVR_FILE)) \ - $(call strip_quotes, $(PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(PSPNVRAM_FILE)) \ - $(call strip_quotes, $(SMUFWM_FILE)) \ - $(call strip_quotes, $(SMUSCS_FILE)) \ - $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \ - $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \ $(call strip_quotes, $(AMD_PUBKEY2_FILE)) \ $(call strip_quotes, $(PUBSIGNEDKEY2_FILE)) \ $(call strip_quotes, $(PSPBTLDR2_FILE)) \ @@ -164,18 +152,6 @@ $(OPT_HUDSON_XHCI_FWM_FILE) \ $(OPT_HUDSON_IMC_FWM_FILE) \ $(OPT_HUDSON_GEC_FWM_FILE) \ - $(OPT_AMD_PUBKEY_FILE) \ - $(OPT_PSPBTLDR_FILE) \ - $(OPT_SMUFWM_FILE) \ - $(OPT_PSPRCVR_FILE) \ - $(OPT_PUBSIGNEDKEY_FILE) \ - $(OPT_PSPSCUREOS_FILE) \ - $(OPT_PSPNVRAM_FILE) \ - $(OPT_PSPSECUREDEBUG_FILE) \ - $(OPT_PSPTRUSTLETS_FILE) \ - $(OPT_TRUSTLETKEY_FILE) \ - $(OPT_SMUFIRMWARE2_FILE) \ - $(OPT_SMUSCS_FILE) \ $(OPT_2AMD_PUBKEY_FILE) \ $(OPT_2PSPBTLDR_FILE) \ $(OPT_2SMUFWM_FILE) \ @@ -192,6 +168,7 @@ $(OPT_2SMUSCS_FILE) \ --flashsize $(CONFIG_ROM_SIZE) \ --location $(HUDSON_FWM_POSITION) \ + --config $(CONFIG_AMDFW_CONFIG_FILE) \ --output $@ ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) @@ -205,7 +182,7 @@ else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) -#cbfs-files-y += apu/amdfw +cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom apu/amdfw-position := $(HUDSON_FWM_POSITION) apu/amdfw-type := raw -- To view, visit https://review.coreboot.org/c/coreboot/+/45288 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id953c3e4b5c075815d4cc86bc8cd7ca0ebdf6de7 Gerrit-Change-Number: 45288 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-MessageType: newchange

3 11

Change in coreboot[master]: amdfwtool: Remove the backup amdfwtool permanently
by Bao Zheng (Code Review) 05 Oct '20

05 Oct '20

Bao Zheng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45806 ) Change subject: amdfwtool: Remove the backup amdfwtool permanently ...................................................................... amdfwtool: Remove the backup amdfwtool permanently Change-Id: Ic797e3b78d042dbc8a154670feef9f52f7c0c61d Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> --- M Makefile.inc M util/amdfwtool/Makefile.inc 2 files changed, 2 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/45806/1 diff --git a/Makefile.inc b/Makefile.inc index 5cd7a64..bf33f8b 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -502,7 +502,7 @@ endif additional-dirs := $(objutil)/cbfstool $(objutil)/ifdtool \ - $(objutil)/options $(objutil)/amdfwtool $(objutil)/amdfwtool-b \ + $(objutil)/options $(objutil)/amdfwtool \ $(objutil)/cbootimage export $(COREBOOT_EXPORTS) @@ -576,7 +576,6 @@ cp -a $(top)/util/ifdtool/ifdtool $@ AMDFWTOOL:=$(objutil)/amdfwtool/amdfwtool -AMDFWTOOL-b:=$(objutil)/amdfwtool/amdfwtool-b APCB_EDIT_TOOL:=$(top)/util/apcb/apcb_edit.py @@ -678,7 +677,7 @@ include util/crossgcc/Makefile.inc .PHONY: tools -tools: $(objutil)/kconfig/conf $(objutil)/kconfig/toada $(CBFSTOOL) $(objutil)/cbfstool/cbfs-compression-tool $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(objutil)/sconfig/sconfig $(IFDTOOL) $(CBOOTIMAGE) $(AMDFWTOOL) $(AMDFWTOOL-b) $(AMDCOMPRESS) $(FUTILITY) $(BINCFG) $(IFITTOOL) $(objutil)/supermicro/smcbiosinfo +tools: $(objutil)/kconfig/conf $(objutil)/kconfig/toada $(CBFSTOOL) $(objutil)/cbfstool/cbfs-compression-tool $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(objutil)/sconfig/sconfig $(IFDTOOL) $(CBOOTIMAGE) $(AMDFWTOOL) $(AMDCOMPRESS) $(FUTILITY) $(BINCFG) $(IFITTOOL) $(objutil)/supermicro/smcbiosinfo ########################################################################### # Common recipes for all stages diff --git a/util/amdfwtool/Makefile.inc b/util/amdfwtool/Makefile.inc index 139388b..18ad0d7 100644 --- a/util/amdfwtool/Makefile.inc +++ b/util/amdfwtool/Makefile.inc @@ -10,14 +10,3 @@ $(objutil)/amdfwtool/amdfwtool: $(addprefix $(objutil)/amdfwtool/,$(amdfwtoolobj)) printf " AMDFWTOOL\n" $(HOSTCC) $(addprefix $(objutil)/amdfwtool/,$(amdfwtoolobj)) -o $@ - -##### - -amdfwtoolobj-b = amdfwtool-b.o - -$(objutil)/amdfwtool/%.o: $(top)/util/amdfwtool/%.c # $(HEADER) - $(HOSTCC) $(AMDFWTOOLCFLAGS) $(HOSTCFLAGS) -DCONFIG_ROM_SIZE=$(CONFIG_ROM_SIZE) -c -o $@ $< - -$(objutil)/amdfwtool/amdfwtool-b: $(addprefix $(objutil)/amdfwtool/,$(amdfwtoolobj-b)) - printf " AMDFWTOOL-b\n" - $(HOSTCC) $(addprefix $(objutil)/amdfwtool/,$(amdfwtoolobj-b)) -o $@ -- To view, visit https://review.coreboot.org/c/coreboot/+/45806 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic797e3b78d042dbc8a154670feef9f52f7c0c61d Gerrit-Change-Number: 45806 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

3 6

Change in coreboot[master]: [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: drop duplicate PM ACPI timer ...
by Michael Niewöhner (Code Review) 05 Oct '20

05 Oct '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Subrata Banik, Aamir Bohra, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45958 to look at the new patch set (#19). Change subject: [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: drop duplicate PM ACPI timer disabling ...................................................................... [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: drop duplicate PM ACPI timer disabling FSP already disables the PM ACPI timer, when EnableTcoTimer=0, so there is no need to do it again in coreboot. Change-Id: I5594ac423d6dff4c3212d657c242137492dc5d2a Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/finalize.c M src/soc/intel/common/block/include/intelblocks/pmclib.h M src/soc/intel/common/block/pmc/Kconfig M src/soc/intel/common/block/pmc/pmclib.c M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/elkhartlake/chip.h M src/soc/intel/elkhartlake/finalize.c M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/chip.h M src/soc/intel/icelake/finalize.c M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/finalize.c M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/chip.h M src/soc/intel/tigerlake/finalize.c 17 files changed, 4 insertions(+), 107 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/45958/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/45958 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5594ac423d6dff4c3212d657c242137492dc5d2a Gerrit-Change-Number: 45958 Gerrit-PatchSet: 19 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: guard ACPI timer emulation en...
by Michael Niewöhner (Code Review) 05 Oct '20

05 Oct '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Subrata Banik, Aamir Bohra, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45956 to look at the new patch set (#19). Change subject: [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: guard ACPI timer emulation enablement ...................................................................... [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: guard ACPI timer emulation enablement Add a check to enable ACPI timer emulation only when the APCI PM timer is disabled. This is what FSP does and what coreboot does for CNL. Change-Id: Ie3e2eaf37b3e6f1dc3360331d343db9aa178adcc Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/elkhartlake/cpu.c M src/soc/intel/icelake/cpu.c M src/soc/intel/jasperlake/cpu.c M src/soc/intel/tigerlake/cpu.c 4 files changed, 12 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/45956/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/45956 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie3e2eaf37b3e6f1dc3360331d343db9aa178adcc Gerrit-Change-Number: 45956 Gerrit-PatchSet: 19 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: PM ACPI timer state from Kconfig
by Michael Niewöhner (Code Review) 05 Oct '20

05 Oct '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Subrata Banik, Aamir Bohra, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45957 to look at the new patch set (#19). Change subject: [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: PM ACPI timer state from Kconfig ...................................................................... [UNTESTED] soc/intel/{icl,tgl,jsl,elh}: PM ACPI timer state from Kconfig Sets the FSP option for PM ACPI timer enablement from the devicetree option, to be able to disable the timer for power savings. Change-Id: Iaf1eee9297034b29b7250f6c752e6f7f52b4b908 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/elkhartlake/fsp_params.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/jasperlake/fsp_params.c M src/soc/intel/tigerlake/fsp_params.c 4 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/45957/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/45957 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf1eee9297034b29b7250f6c752e6f7f52b4b908 Gerrit-Change-Number: 45957 Gerrit-PatchSet: 19 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig
by Michael Niewöhner (Code Review) 05 Oct '20

05 Oct '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Michał Żygowski, Frans Hendriks, Subrata Banik, Aamir Bohra, Patrick Rudolph, Wim Vervoorn, Piotr Król, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45955 to look at the new patch set (#18). Change subject: soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig ...................................................................... soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig Set the FSP option for PM ACPI timer enablement from the Kconfig option instead of the old devicetree option. Also drop the obsolete devicetree option from soc code and from the mainboards and add a corresponding Kconfig entry instead. Change-Id: I10724ccf1647594404cec15c2349ab05b6c9714f Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/Kconfig M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/Kconfig M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/Kconfig M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/Kconfig M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/Kconfig M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/Kconfig M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/kunimitsu/Kconfig M src/mainboard/intel/kunimitsu/devicetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/Kconfig M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/Kconfig M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/purism/librem_whl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/cpu.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h M src/soc/intel/skylake/cpu.c 41 files changed, 42 insertions(+), 42 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/45955/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/45955 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10724ccf1647594404cec15c2349ab05b6c9714f Gerrit-Change-Number: 45955 Gerrit-PatchSet: 18 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/skl: guard ACPI PM timer emulation enablement
by Michael Niewöhner (Code Review) 05 Oct '20

05 Oct '20

Hello build bot (Jenkins), Nico Huber, Furquan Shaikh, Subrata Banik, Aamir Bohra, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/45953 to look at the new patch set (#19). Change subject: soc/intel/skl: guard ACPI PM timer emulation enablement ...................................................................... soc/intel/skl: guard ACPI PM timer emulation enablement Add a check to enable ACPI timer emulation only when the APCI PM timer is disabled. This is what FSP does and what coreboot does for CNL. Test: supermicro/x11ssm-f boots fine without any errors in dmesg Change-Id: I529cdbe759e9c9270493bd3fff42ded65c74a6b4 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/skylake/cpu.c 1 file changed, 4 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/45953/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/45953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I529cdbe759e9c9270493bd3fff42ded65c74a6b4 Gerrit-Change-Number: 45953 Gerrit-PatchSet: 19 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/intel/ironlake: Drop unnecessary `smm_region_start` function
by Angel Pons (Code Review) 05 Oct '20

05 Oct '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45919 ) Change subject: nb/intel/ironlake: Drop unnecessary `smm_region_start` function ...................................................................... nb/intel/ironlake: Drop unnecessary `smm_region_start` function Change-Id: I4c4b40b2b4f54b7756b8485dad80a1b4786270f7 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/northbridge/intel/ironlake/memmap.c 1 file changed, 3 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/45919/1 diff --git a/src/northbridge/intel/ironlake/memmap.c b/src/northbridge/intel/ironlake/memmap.c index 54337cc..78fbae8 100644 --- a/src/northbridge/intel/ironlake/memmap.c +++ b/src/northbridge/intel/ironlake/memmap.c @@ -11,16 +11,10 @@ #include "ironlake.h" -static uintptr_t smm_region_start(void) -{ - /* Base of TSEG is top of usable DRAM */ - uintptr_t tom = pci_read_config32(PCI_DEV(0,0,0), TSEG); - return tom; -} - static uintptr_t northbridge_get_tseg_base(void) { - return smm_region_start(); + /* Base of TSEG is top of usable DRAM */ + return pci_read_config32(PCI_DEV(0, 0, 0), TSEG); } static size_t northbridge_get_tseg_size(void) @@ -30,7 +24,7 @@ void *cbmem_top_chipset(void) { - return (void *) smm_region_start(); + return (void *)northbridge_get_tseg_base(); } void smm_region(uintptr_t *start, size_t *size) -- To view, visit https://review.coreboot.org/c/coreboot/+/45919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c4b40b2b4f54b7756b8485dad80a1b4786270f7 Gerrit-Change-Number: 45919 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: nb/intel/ironlake/memmap.c: Clean up includes
by Angel Pons (Code Review) 05 Oct '20

05 Oct '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45918 ) Change subject: nb/intel/ironlake/memmap.c: Clean up includes ...................................................................... nb/intel/ironlake/memmap.c: Clean up includes Drop unused includes and add missing <types.h>. Change-Id: Ifefe81d4727d67ea702c5e24527f80a0614aa396 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/northbridge/intel/ironlake/memmap.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/45918/1 diff --git a/src/northbridge/intel/ironlake/memmap.c b/src/northbridge/intel/ironlake/memmap.c index 406b9a9..54337cc 100644 --- a/src/northbridge/intel/ironlake/memmap.c +++ b/src/northbridge/intel/ironlake/memmap.c @@ -7,8 +7,8 @@ #include <cbmem.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> -#include <program_loading.h> -#include <cpu/intel/smm_reloc.h> +#include <types.h> + #include "ironlake.h" static uintptr_t smm_region_start(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/45918 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifefe81d4727d67ea702c5e24527f80a0614aa396 Gerrit-Change-Number: 45918 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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