coreboot-gerrit June 2019

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Change in ...coreboot[master]: drivers/ipmi: Add chip ops
by Patrick Rudolph (Code Review) 21 Jun '19

21 Jun '19

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33255 Change subject: drivers/ipmi: Add chip ops ...................................................................... drivers/ipmi: Add chip ops * Add SPMI ACPI code * Add chips ops for IPMI KCS. * Set firmware version over KCS. * Get IPMI version over KCS. * Generate ACPI SPMI for IPMI KCS. * Generate SMBIOS type 38 for IPMI KCS. Change-Id: I73cbd2058ccdc5395baf244f31345a85eb0047d7 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/acpi.c M src/arch/x86/include/arch/acpi.h M src/drivers/ipmi/Makefile.inc A src/drivers/ipmi/chip.h M src/drivers/ipmi/ipmi_kcs.h A src/drivers/ipmi/ipmi_kcs_ops.c 6 files changed, 337 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/33255/1 diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index bf9813c..8938147 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -772,6 +772,53 @@ header->checksum = acpi_checksum((void *)vfct, header->length); } +void acpi_create_ipmi(struct device *device, + struct acpi_spmi *spmi, + const u16 ipmi_revision, + const acpi_addr_t *addr, + const enum acpi_ipmi_interface_type type, + const s8 gpe_interrupt, + const u32 apic_interrupt) +{ + acpi_header_t *header = &(spmi->header); + memset((void *)spmi, 0, sizeof(struct acpi_spmi)); + + /* Fill out header fields. */ + memcpy(header->signature, "SPMI", 4); + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); + + header->asl_compiler_revision = asl_revision; + header->length = sizeof(struct acpi_spmi); + header->revision = get_acpi_table_revision(SPMI); + + if (device->path.type == DEVICE_PATH_PCI) { + spmi->pci_device_flag = 1; + spmi->pci_bus = device->bus->secondary; + spmi->pci_device = device->path.pci.devfn >> 3; + spmi->pci_function = device->path.pci.devfn & 0x7; + } + + spmi->base_address = *addr; + spmi->specification_revision = ipmi_revision; + + spmi->interface_type = type; + + if (gpe_interrupt >= 0 && gpe_interrupt < 32) { + spmi->gpe = gpe_interrupt; + spmi->interrupt_type |= 1; + } + if (apic_interrupt > 0) { + spmi->global_system_interrupt = apic_interrupt; + spmi->interrupt_type |= 2; + } + + /* (Re)calculate length and checksum. */ + header->length = sizeof(struct acpi_spmi); + header->checksum = acpi_checksum((void *)spmi, header->length); +} + void acpi_create_ivrs(acpi_ivrs_t *ivrs, unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct, unsigned long current)) @@ -1490,6 +1537,8 @@ return 1; case SLIT: /* ACPI 2.0 upto 6.3: 1 */ return 1; + case SPMI: /* IMPI 2.0 */ + return 5; case HPET: /* Currently 1. Table added in ACPI 2.0. */ return 1; case VFCT: /* ACPI 2.0/3.0/4.0: 1 */ diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index dbf46a9..a864071 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -82,7 +82,7 @@ BERT, DBG2, DMAR, DSDT, FACS, FADT, HEST, HPET, IVRS, MADT, MCFG, RSDP, RSDT, SLIT, SRAT, SSDT, TCPA, TPM2, XSDT, ECDT, /* Additional proprietary tables used by coreboot */ - VFCT, NHLT + VFCT, NHLT, SPMI }; /* RSDP (Root System Description Pointer) */ @@ -782,6 +782,39 @@ UPC_TYPE_HUB }; +enum acpi_ipmi_interface_type { + IPMI_INTERFACE_RESERVED, + IPMI_INTERFACE_KCS, + IPMI_INTERFACE_SMIC, + IPMI_INTERFACE_BT, + IPMI_INTERFACE_SSIF, +}; + +/* ACPI IPMI 2.0 */ +struct acpi_spmi { + struct acpi_table_header header; + u8 interface_type; + u8 reserved; + u16 specification_revision; + u8 interrupt_type; + u8 gpe; + u8 reserved2; + u8 pci_device_flag; + + u32 global_system_interrupt; + acpi_addr_t base_address; + union { + struct { + u8 pci_segment_group; + u8 pci_bus; + u8 pci_device; + u8 pci_function; + }; + u8 uid[4]; + }; + u8 reserved3; +} __packed ; + unsigned long fw_cfg_acpi_tables(unsigned long start); /* These are implemented by the target port or north/southbridge. */ @@ -834,6 +867,14 @@ struct acpi_vfct *vfct_struct, unsigned long current)); +void acpi_create_ipmi(struct device *device, + struct acpi_spmi *spmi, + const u16 ipmi_revision, + const acpi_addr_t *addr, + const enum acpi_ipmi_interface_type type, + const s8 gpe_interrupt, + const u32 apic_interrupt); + void acpi_create_ivrs(acpi_ivrs_t *ivrs, unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct, unsigned long current)); diff --git a/src/drivers/ipmi/Makefile.inc b/src/drivers/ipmi/Makefile.inc index e9e7ff3..a29c2e2 100644 --- a/src/drivers/ipmi/Makefile.inc +++ b/src/drivers/ipmi/Makefile.inc @@ -1 +1,2 @@ ramstage-$(CONFIG_IPMI_KCS) += ipmi_kcs.c +ramstage-$(CONFIG_IPMI_KCS) += ipmi_kcs_ops.c diff --git a/src/drivers/ipmi/chip.h b/src/drivers/ipmi/chip.h new file mode 100644 index 0000000..eb8b4e6 --- /dev/null +++ b/src/drivers/ipmi/chip.h @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Patrick Rudolph <siro(a)das-labor.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _IMPI_CHIP_H_ +#define _IPMI_CHIP_H_ + +struct drivers_ipmi_config { + u8 bmc_i2c_address; + u8 have_nv_storage; + u8 nv_storage_device_address; + u8 have_gpe; + u8 gpe_interrupt; + u8 have_apic; + u32 apic_interrupt; +}; + +#endif /* _IMPI_CHIP_H_ */ diff --git a/src/drivers/ipmi/ipmi_kcs.h b/src/drivers/ipmi/ipmi_kcs.h index 3cd7609..b43f043 100644 --- a/src/drivers/ipmi/ipmi_kcs.h +++ b/src/drivers/ipmi/ipmi_kcs.h @@ -26,7 +26,26 @@ #define IPMI_CMD_ACPI_POWERON 0x06 +#define IPMI_SET_SYS_INFO 0x58 +#define IPMI_GET_SYS_INFO 0x59 + +#define IPMI_BMC_GET_DEVICE_ID 0x01 + extern int ipmi_kcs_message(int port, int netfn, int lun, int cmd, const unsigned char *inmsg, int inlen, unsigned char *outmsg, int outlen); + +struct ipmi_devid_rsp { + uint8_t device_id; + uint8_t device_revision; + uint8_t fw_rev1; + uint8_t fw_rev2; + uint8_t ipmi_version; + uint8_t adtl_device_support; + uint8_t manufacturer_id[3]; + uint8_t product_id[2]; + uint8_t aux_fw_rev[4]; +} __packed; + + #endif diff --git a/src/drivers/ipmi/ipmi_kcs_ops.c b/src/drivers/ipmi/ipmi_kcs_ops.c new file mode 100644 index 0000000..3c394db --- /dev/null +++ b/src/drivers/ipmi/ipmi_kcs_ops.c @@ -0,0 +1,197 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 9elements Agency GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Place in devicetree.cb: + * + * chip drivers/ipmi + * device pnp 3ca.0 on end # IPMI KCS + * end + */ + +#include <console/console.h> +#include <device/device.h> +#include <device/pnp.h> +#include <arch/acpi.h> +#include <smbios.h> +#include <version.h> +#include <delay.h> +#include "ipmi_kcs.h" +#include "chip.h" + +u16 ipmi_revision = 0x1500; + +static void ipmi_set_firmware_version(struct device *dev, const char *firmware) +{ + char msg[18]; + + if (!firmware || strlen(firmware) > 255) + return; + + msg[0] = 1; + msg[1] = 0; + msg[2] = 0; + msg[3] = strlen(firmware); + + memcpy(&msg[4], firmware, MIN(strlen(firmware), 12)); + firmware += MIN(strlen(firmware), 12); + + ipmi_kcs_message(dev->path.pnp.port, IPMI_NETFN_APPLICATION, 0, + IPMI_SET_SYS_INFO, (const u8 *)msg, sizeof(msg), + NULL, 0); + + do { + msg[1] ++; + memset(&msg[2], 0, 16); + + if (strlen(firmware)) { + memcpy(&msg[2], firmware, MIN(strlen(firmware), 16)); + firmware += MIN(strlen(firmware), 16); + } + + ipmi_kcs_message(dev->path.pnp.port, IPMI_NETFN_APPLICATION, 0, + IPMI_SET_SYS_INFO, (const u8 *)msg, + sizeof(msg), NULL, 0); + + } while (strlen(firmware)); +} + +static int ipmi_get_device_id(struct device *dev, struct ipmi_devid_rsp *rsp) +{ + if (ipmi_kcs_message(dev->path.pnp.port, IPMI_NETFN_APPLICATION, 0, + IPMI_BMC_GET_DEVICE_ID, NULL, 0, (u8 *)rsp, + sizeof(*rsp)) != sizeof(*rsp)) { + printk(BIOS_ERR, "IPMI: Failed to get device id\n"); + return 1; + } + return 0; +} + +static void ipmi_kcs_init(struct device *dev) +{ + struct ipmi_devid_rsp rsp; + + if (!dev->enabled) + return; + + /* Set firmware version string */ + ipmi_set_firmware_version(dev, coreboot_version); + + /* Get IPMI version for ACPI */ + if (!ipmi_get_device_id(dev, &rsp)) + ipmi_revision = rsp.ipmi_version; +} + +static void ipmi_set_resources(struct device *dev) +{ +} + +static void ipmi_enable_resources(struct device *dev) +{ +} + +#if CONFIG(HAVE_ACPI_TABLES) +static unsigned long +ipmi_write_acpi_tables(struct device *dev, unsigned long current, + struct acpi_rsdp *rsdp) +{ + struct drivers_ipmi_config *conf = NULL; + struct acpi_spmi *spmi; + s8 gpe_interrupt = -1; + u32 apic_interrupt = 0; + acpi_addr_t addr = { + .space_id = ACPI_ADDRESS_SPACE_IO, + .access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS, + .addrl = dev->path.pnp.port, + }; + + current = ALIGN(current, 8); + printk(BIOS_DEBUG, "ACPI: * SPMI at %lx\n", current); + spmi = (struct acpi_spmi *)current; + + if (dev->chip_info) + conf = dev->chip_info; + + if (conf) { + if (conf->have_gpe) + gpe_interrupt = conf->gpe_interrupt; + if (conf->have_apic) + apic_interrupt = conf->apic_interrupt; + } + acpi_create_ipmi(dev, spmi, ipmi_revision, &addr, IPMI_INTERFACE_KCS, + gpe_interrupt, apic_interrupt); + + acpi_add_table(rsdp, spmi); + + current += spmi->header.length; + + return current; +} +#endif + +#if CONFIG(GENERATE_SMBIOS_TABLES) +static int ipmi_smbios_data(struct device *dev, int *handle, + unsigned long *current) +{ + struct drivers_ipmi_config *conf = NULL; + u8 nv_storage = 0xff; + u8 i2c_address = 0; + int len = 0; + + if (dev->chip_info) + conf = dev->chip_info; + + if (conf) { + if (conf->have_nv_storage) + nv_storage = conf->nv_storage_device_address; + i2c_address = conf->bmc_i2c_address; + } + + // add IPMI Device Information + len += smbios_write_type38( + current, handle, + SMBIOS_BMC_INTERFACE_KCS, + ipmi_revision >> 4, // IPMI Version + i2c_address, // I2C address + nv_storage, // NV storage + dev->path.pnp.port | 1, // IO port interface address + 0, + 0); // no IRQ + + return len; +} +#endif + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = ipmi_set_resources, + .enable_resources = ipmi_enable_resources, + .init = ipmi_kcs_init, +#if CONFIG(HAVE_ACPI_TABLES) + .write_acpi_tables = ipmi_write_acpi_tables, +#endif +#if CONFIG(GENERATE_SMBIOS_TABLES) + .get_smbios_data = ipmi_smbios_data, +#endif +}; + +static void enable_dev(struct device *dev) +{ + dev->ops = &ops; +} + +struct chip_operations drivers_ipmi_kcs_ops = { + CHIP_NAME("IPMI KCS") + .enable_dev = enable_dev, +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/33255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73cbd2058ccdc5395baf244f31345a85eb0047d7 Gerrit-Change-Number: 33255 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: arch/x86/acpi: use ALIGN_UP instead of ALIGN
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33627 Change subject: arch/x86/acpi: use ALIGN_UP instead of ALIGN ...................................................................... arch/x86/acpi: use ALIGN_UP instead of ALIGN The ALIGN_UP macro is basically an alias of the ALIGN macro; with this change it's more obvious in which direction the alignment happens. Change-Id: I6f1b9f9bbcafeb85a6ef5c10ce4b57edc0740e72 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/arch/x86/acpi.c M src/arch/x86/include/arch/acpi.h 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/33627/1 diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index bf9813c..635f0fa 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -813,7 +813,7 @@ hpet = (acpi_hpet_t *) current; current += sizeof(acpi_hpet_t); - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); acpi_create_hpet(hpet); acpi_add_table(rsdp, hpet); @@ -1271,7 +1271,7 @@ acpi_write_xsdt(xsdt, oem_id, oem_table_id); printk(BIOS_DEBUG, "ACPI: * FACS\n"); - current = (ALIGN(current, 64)); + current = (ALIGN_UP(current, 64)); facs = (acpi_facs_t *) current; current += sizeof(acpi_facs_t); current = acpi_align_current(current); diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index dbf46a9..a17729a 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -958,7 +958,7 @@ static inline uintptr_t acpi_align_current(uintptr_t current) { - return ALIGN(current, 16); + return ALIGN_UP(current, 16); } /* ACPI table revisions should match the revision of the ACPI spec -- To view, visit https://review.coreboot.org/c/coreboot/+/33627 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f1b9f9bbcafeb85a6ef5c10ce4b57edc0740e72 Gerrit-Change-Number: 33627 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: drivers/intel/fsp: use ALIGN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33636 Change subject: drivers/intel/fsp: use ALIGN_UP instead of ALIGN for better readability ...................................................................... drivers/intel/fsp: use ALIGN_UP instead of ALIGN for better readability Change-Id: I41fd50dc1e30332261f80e99419dad2635b5a54a Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/drivers/intel/fsp1_0/fsp_util.c M src/drivers/intel/fsp1_1/raminit.c 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/33636/1 diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c index 4e50abae..d787c7b 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.c +++ b/src/drivers/intel/fsp1_0/fsp_util.c @@ -275,7 +275,7 @@ printk(BIOS_DEBUG, "Memory Configure Data Hob at %p (size = 0x%x).\n", (void *)mrc_hob_data, mrc_hob_size); - output_len = ALIGN(mrc_hob_size, 16); + output_len = ALIGN_UP(mrc_hob_size, 16); /* Save the MRC S3/fast boot/ADR restore data to cbmem */ mrc_data = cbmem_add (CBMEM_ID_MRCDATA, diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index eff011a..a631fca 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -297,7 +297,7 @@ else if (!vboot_recovery_mode_enabled()) { /* Do not save MRC data in recovery path */ params->data_to_save = GET_GUID_HOB_DATA(mrc_hob); - params->data_to_save_size = ALIGN( + params->data_to_save_size = ALIGN_UP( ((u32)GET_HOB_LENGTH(mrc_hob)), 16); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/33636 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41fd50dc1e30332261f80e99419dad2635b5a54a Gerrit-Change-Number: 33636 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: cpu/x86: use ALIGN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33635 Change subject: cpu/x86: use ALIGN_UP instead of ALIGN for better readability ...................................................................... cpu/x86: use ALIGN_UP instead of ALIGN for better readability Change-Id: I0afb81740973a0c841ebe6cce984e135e5c395e6 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/cpu/x86/mirror_payload.c M src/cpu/x86/mp_init.c 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/33635/1 diff --git a/src/cpu/x86/mirror_payload.c b/src/cpu/x86/mirror_payload.c index 5f0493a..6da2164 100644 --- a/src/cpu/x86/mirror_payload.c +++ b/src/cpu/x86/mirror_payload.c @@ -42,7 +42,7 @@ alignment_diff = (intra_cacheline_mask & (uintptr_t)src); size += alignment_diff; - size = ALIGN(size, cacheline_size); + size = ALIGN_UP(size, cacheline_size); printk(BIOS_DEBUG, "Payload aligned size: 0x%zx\n", size); diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index b7b8fe2..9528149 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -321,7 +321,7 @@ module_size = rmodule_memory_size(&sipi_mod); /* Align to 4 bytes. */ - module_size = ALIGN(module_size, 4); + module_size = ALIGN_UP(module_size, 4); if (module_size > loc_size) { printk(BIOS_CRIT, "SIPI module size (%d) > region size (%d).\n", -- To view, visit https://review.coreboot.org/c/coreboot/+/33635 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0afb81740973a0c841ebe6cce984e135e5c395e6 Gerrit-Change-Number: 33635 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: cpu/amd: use ALIGN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33634 Change subject: cpu/amd: use ALIGN_UP instead of ALIGN for better readability ...................................................................... cpu/amd: use ALIGN_UP instead of ALIGN for better readability Change-Id: Icef97ea764567a311b4cd63b65ad584ed0360152 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/cpu/amd/car/post_cache_as_ram.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/33634/1 diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 18e7542..f49c676 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -45,7 +45,7 @@ static size_t backup_size(void) { size_t car_size = car_data_size(); - return ALIGN(car_size + 1024, 1024); + return ALIGN_UP(car_size + 1024, 1024); } static void memcpy_(void *d, const void *s, size_t len) -- To view, visit https://review.coreboot.org/c/coreboot/+/33634 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icef97ea764567a311b4cd63b65ad584ed0360152 Gerrit-Change-Number: 33634 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: device/pci_rom: use ALIGN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33633 Change subject: device/pci_rom: use ALIGN_UP instead of ALIGN for better readability ...................................................................... device/pci_rom: use ALIGN_UP instead of ALIGN for better readability Change-Id: Icb0b3fd22fa9b6ea73b7770079f81335e40fd0d3 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/device/pci_rom.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/33633/1 diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 2dbfb51..3160c20 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -257,7 +257,7 @@ /* AMD/ATI uses VFCT */ if (device->vendor == PCI_VENDOR_ID_ATI) { - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * VFCT at %lx\n", current); vfct = (struct acpi_vfct *)current; acpi_create_vfct(device, vfct, pci_rom_acpi_fill_vfct); -- To view, visit https://review.coreboot.org/c/coreboot/+/33633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb0b3fd22fa9b6ea73b7770079f81335e40fd0d3 Gerrit-Change-Number: 33633 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: commonlib/storage: use ALIGN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33632 Change subject: commonlib/storage: use ALIGN_UP instead of ALIGN for better readability ...................................................................... commonlib/storage: use ALIGN_UP instead of ALIGN for better readability Change-Id: I76ec5ff107bc043d9457b3377e88226a96eb3f3c Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/commonlib/storage/bouncebuf.h M src/commonlib/storage/storage.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/33632/1 diff --git a/src/commonlib/storage/bouncebuf.h b/src/commonlib/storage/bouncebuf.h index 27d92e8..0d81be1 100644 --- a/src/commonlib/storage/bouncebuf.h +++ b/src/commonlib/storage/bouncebuf.h @@ -88,7 +88,7 @@ #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \ char __##name[ROUND(size * sizeof(type), DMA_MINALIGN) + \ DMA_MINALIGN - 1]; \ - type *name = (type *) ALIGN((uintptr_t)__##name, DMA_MINALIGN) + type *name = (type *) ALIGN_UP((uintptr_t)__##name, DMA_MINALIGN) #ifndef ARCH_DMA_MINALIGN #define ARCH_DMA_MINALIGN (DMA_MINALIGN) #endif diff --git a/src/commonlib/storage/storage.h b/src/commonlib/storage/storage.h index 645b6c1a..c71510d 100644 --- a/src/commonlib/storage/storage.h +++ b/src/commonlib/storage/storage.h @@ -23,7 +23,7 @@ #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \ char __##name[ROUND(size * sizeof(type), DMA_MINALIGN) + \ DMA_MINALIGN - 1]; \ - type *name = (type *) ALIGN((uintptr_t)__##name, DMA_MINALIGN) + type *name = (type *) ALIGN_UP((uintptr_t)__##name, DMA_MINALIGN) /* NOOPs mirroring ARM's cache API, since x86 devices usually cache snoop */ #define dcache_invalidate_by_mva(addr, len) -- To view, visit https://review.coreboot.org/c/coreboot/+/33632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I76ec5ff107bc043d9457b3377e88226a96eb3f3c Gerrit-Change-Number: 33632 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: arch/arm/cpu: use ALIGN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33631 Change subject: arch/arm/cpu: use ALIGN_UP instead of ALIGN for better readability ...................................................................... arch/arm/cpu: use ALIGN_UP instead of ALIGN for better readability Change-Id: Id0e281ece0a647721c18402029cd6980f75d5908 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/arch/arm/cpu.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/33631/1 diff --git a/src/arch/arm/cpu.c b/src/arch/arm/cpu.c index fae1a37..93d5675 100644 --- a/src/arch/arm/cpu.c +++ b/src/arch/arm/cpu.c @@ -39,7 +39,7 @@ "feature, make sure you add the proper assertions " \ "(and maybe consider revising the whole thing to work closer to what " \ "arm64 is doing now)." - uintptr_t addr = ALIGN((uintptr_t)__builtin_frame_address(0), + uintptr_t addr = ALIGN_UP((uintptr_t)__builtin_frame_address(0), CONFIG_STACK_SIZE); addr -= sizeof(struct cpu_info); return (void *)addr; -- To view, visit https://review.coreboot.org/c/coreboot/+/33631 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0e281ece0a647721c18402029cd6980f75d5908 Gerrit-Change-Number: 33631 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: arch/x86: use ALIGN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33630 Change subject: arch/x86: use ALIGN_UP instead of ALIGN for better readability ...................................................................... arch/x86: use ALIGN_UP instead of ALIGN for better readability This patch contains the rest of the fixes for this subtree; having one change for every area would create an unnecessary amouint of patches. Change-Id: Id92c11d58693292d58cba323c8468db858becfb5 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/arch/x86/gdt.c M src/arch/x86/include/arch/early_variables.h M src/arch/x86/pirq_routing.c 3 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/33630/1 diff --git a/src/arch/x86/gdt.c b/src/arch/x86/gdt.c index c9aec6d..d3ad01e 100644 --- a/src/arch/x86/gdt.c +++ b/src/arch/x86/gdt.c @@ -46,7 +46,7 @@ newgdt = cbmem_find(CBMEM_ID_GDT); num_gdt_bytes = (uintptr_t)&gdt_end - (uintptr_t)&gdt; if (!newgdt) { - newgdt = cbmem_add(CBMEM_ID_GDT, ALIGN(num_gdt_bytes, 512)); + newgdt = cbmem_add(CBMEM_ID_GDT, ALIGN_UP(num_gdt_bytes, 512)); if (!newgdt) { printk(BIOS_ERR, "Error: Could not relocate GDT.\n"); return; diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h index 9ea1537..b3042c3 100644 --- a/src/arch/x86/include/arch/early_variables.h +++ b/src/arch/x86/include/arch/early_variables.h @@ -69,7 +69,7 @@ static inline size_t car_data_size(void) { size_t car_size = _car_relocatable_data_size; - return ALIGN(car_size, 64); + return ALIGN_UP(car_size, 64); } static inline size_t car_object_offset(void *ptr) diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 194efb4..70df201 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -191,7 +191,7 @@ const struct irq_routing_table *routing_table) { /* Align the table to be 16 byte aligned. */ - addr = ALIGN(addr, 16); + addr = ALIGN_UP(addr, 16); /* This table must be between 0xf0000 & 0x100000 */ printk(BIOS_INFO, "Copying Interrupt Routing Table to 0x%08lx... ", -- To view, visit https://review.coreboot.org/c/coreboot/+/33630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id92c11d58693292d58cba323c8468db858becfb5 Gerrit-Change-Number: 33630 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: arch/x86/tables: use ALIGHN_UP instead of ALIGN for better readability
by Felix Held (Code Review) 21 Jun '19

21 Jun '19

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33629 Change subject: arch/x86/tables: use ALIGHN_UP instead of ALIGN for better readability ...................................................................... arch/x86/tables: use ALIGHN_UP instead of ALIGN for better readability Change-Id: Idfb814abee87d52d0f5970ec0cd291f738631320 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/arch/x86/tables.c 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/33629/1 diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c index f17fb85..3cc385b 100644 --- a/src/arch/x86/tables.c +++ b/src/arch/x86/tables.c @@ -36,7 +36,7 @@ /* This table must be between 0x0f0000 and 0x100000 */ rom_table_end = write_pirq_routing_table(rom_table_end); - rom_table_end = ALIGN(rom_table_end, 1024); + rom_table_end = ALIGN_UP(rom_table_end, 1024); /* And add a high table version for those payloads that * want to live in the F segment @@ -68,7 +68,7 @@ /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */ rom_table_end = write_smp_table(rom_table_end); - rom_table_end = ALIGN(rom_table_end, 1024); + rom_table_end = ALIGN_UP(rom_table_end, 1024); high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_MPTABLE, MAX_MP_TABLE_SIZE); @@ -114,7 +114,7 @@ unsigned long acpi_start = high_table_pointer; unsigned long new_high_table_pointer; - rom_table_end = ALIGN(rom_table_end, 16); + rom_table_end = ALIGN_UP(rom_table_end, 16); new_high_table_pointer = write_acpi_tables(high_table_pointer); if (new_high_table_pointer > (high_table_pointer + MAX_ACPI_SIZE)) @@ -146,10 +146,10 @@ printk(BIOS_ERR, "ERROR: Didn't find RSDP in high table.\n"); } - rom_table_end = ALIGN(rom_table_end + sizeof(acpi_rsdp_t), 16); + rom_table_end = ALIGN_UP(rom_table_end + sizeof(acpi_rsdp_t), 16); } else { rom_table_end = write_acpi_tables(rom_table_end); - rom_table_end = ALIGN(rom_table_end, 1024); + rom_table_end = ALIGN_UP(rom_table_end, 1024); } return rom_table_end; @@ -168,7 +168,7 @@ new_high_table_pointer = smbios_write_tables(high_table_pointer); - rom_table_end = ALIGN(rom_table_end, 16); + rom_table_end = ALIGN_UP(rom_table_end, 16); memcpy((void *)rom_table_end, (void *)high_table_pointer, sizeof(struct smbios_entry)); rom_table_end += sizeof(struct smbios_entry); @@ -184,7 +184,7 @@ new_rom_table_end = smbios_write_tables(rom_table_end); printk(BIOS_DEBUG, "SMBIOS size %ld bytes\n", new_rom_table_end - rom_table_end); - rom_table_end = ALIGN(new_rom_table_end, 16); + rom_table_end = ALIGN_UP(new_rom_table_end, 16); } return rom_table_end; -- To view, visit https://review.coreboot.org/c/coreboot/+/33629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idfb814abee87d52d0f5970ec0cd291f738631320 Gerrit-Change-Number: 33629 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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