mturney mturney has uploaded a new patch set (#76) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/25373 )
Change subject: sdm845: Add UART support
......................................................................
sdm845: Add UART support
TEST=build & run
Change-Id: I827906e820bc15b7f60fdd7876a54c9ed36a48a1
Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org>
Signed-off-by: Akash Asthana <akashast(a)codeaurora.org>
---
M src/soc/qualcomm/sdm845/Kconfig
M src/soc/qualcomm/sdm845/Makefile.inc
M src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h
M src/soc/qualcomm/sdm845/qcom_qup_se.c
A src/soc/qualcomm/sdm845/uart.c
5 files changed, 190 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/25373/76
--
To view, visit https://review.coreboot.org/c/coreboot/+/25373
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I827906e820bc15b7f60fdd7876a54c9ed36a48a1
Gerrit-Change-Number: 25373
Gerrit-PatchSet: 76
Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org>
Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com>
Gerrit-CC: Julius Werner <jwerner(a)chromium.org>
Gerrit-MessageType: newpatchset
mturney mturney has uploaded a new patch set (#36) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/29104 )
Change subject: sdm845: Port I2C driver
......................................................................
sdm845: Port I2C driver
Add I2C functionality in coreboot
Change-Id: Ifb76564d8a11427423dd14d8ba7c8c7d500ef346
Signed-off-by: Akash Asthana <akashast(a)codeaurora.org>
---
M src/mainboard/google/cheza/mainboard.c
M src/soc/qualcomm/sdm845/Makefile.inc
A src/soc/qualcomm/sdm845/i2c.c
A src/soc/qualcomm/sdm845/include/soc/i2c.h
M src/soc/qualcomm/sdm845/include/soc/qupv3_fw_config.h
M src/soc/qualcomm/sdm845/qupv3_fw_config.c
M src/soc/qualcomm/sdm845/spi_qup.c
7 files changed, 202 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/29104/36
--
To view, visit https://review.coreboot.org/c/coreboot/+/29104
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ifb76564d8a11427423dd14d8ba7c8c7d500ef346
Gerrit-Change-Number: 29104
Gerrit-PatchSet: 36
Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org>
Gerrit-Reviewer: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-MessageType: newpatchset
mturney mturney has uploaded a new patch set (#56) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/27483 )
Change subject: sdm845: Add SPI QUP driver
......................................................................
sdm845: Add SPI QUP driver
This implements the SPI driver for the Qualcomm Universal Peripheral
(QUP) core.
Change-Id: I35061727d5ccc550eaeb06caef4524bc4cf25b54
Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org>
Signed-off-by: Akash Asthana <akashast(a)codeaurora.org>
---
M src/mainboard/google/cheza/bootblock.c
M src/soc/qualcomm/sdm845/Makefile.inc
M src/soc/qualcomm/sdm845/bootblock.c
M src/soc/qualcomm/sdm845/include/soc/addressmap.h
A src/soc/qualcomm/sdm845/include/soc/spi_qup_qcom.h
A src/soc/qualcomm/sdm845/qcom_qup_se.c
M src/soc/qualcomm/sdm845/spi.c
A src/soc/qualcomm/sdm845/spi_qup.c
8 files changed, 508 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/27483/56
--
To view, visit https://review.coreboot.org/c/coreboot/+/27483
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I35061727d5ccc550eaeb06caef4524bc4cf25b54
Gerrit-Change-Number: 27483
Gerrit-PatchSet: 56
Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Vin Kamath <vink(a)codeaurora.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org>
Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com>
Gerrit-CC: Julius Werner <jwerner(a)chromium.org>
Gerrit-MessageType: newpatchset
mturney mturney has uploaded a new patch set (#76) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/25372 )
Change subject: sdm845: Add QUPv3 FW load & config
......................................................................
sdm845: Add QUPv3 FW load & config
UART driver requires FW loading
TEST=build
Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d
Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org>
---
M 3rdparty/blobs
M src/mainboard/google/cheza/Makefile.inc
M src/mainboard/google/cheza/mainboard.c
A src/mainboard/google/cheza/qupv3_config.c
M src/soc/qualcomm/sdm845/Makefile.inc
M src/soc/qualcomm/sdm845/bootblock.c
M src/soc/qualcomm/sdm845/include/soc/addressmap.h
A src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h
A src/soc/qualcomm/sdm845/include/soc/qupv3_config.h
A src/soc/qualcomm/sdm845/include/soc/qupv3_fw_config.h
A src/soc/qualcomm/sdm845/qupv3_fw_config.c
11 files changed, 871 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/25372/76
--
To view, visit https://review.coreboot.org/c/coreboot/+/25372
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d
Gerrit-Change-Number: 25372
Gerrit-PatchSet: 76
Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org>
Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com>
Gerrit-CC: Julius Werner <jwerner(a)chromium.org>
Gerrit-MessageType: newpatchset
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31548 )
Change subject: security: Add memory subfolder
......................................................................
Patch Set 11: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/31548/11/Documentation/security/memory_clea…
File Documentation/security/memory_clearing.md:
https://review.coreboot.org/#/c/31548/11/Documentation/security/memory_clea…
PS11, Line 15: The device must indicate support for memory clearing as part of the boot
-the
--
To view, visit https://review.coreboot.org/c/coreboot/+/31548
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ifba25bfdd1057049f5cbae8968501bd9be487110
Gerrit-Change-Number: 31548
Gerrit-PatchSet: 11
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org>
Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Comment-Date: Wed, 26 Jun 2019 14:45:46 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Hello Alexander Couzens, Patrick Rudolph, Arthur Heymans, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29160
to look at the new patch set (#4).
Change subject: mb/lenovo/t60: Align ACPI C-state across the similar boards
......................................................................
mb/lenovo/t60: Align ACPI C-state across the similar boards
We have 3 similar Lenovo mainboards - x60 (oldest), t60, and z61t (most
recent addition). The only one with two consequent 2s as the C-types
is t60:
static acpi_cstate_t cst_entries[] = {
{ 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
{ 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
{ 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
};
It seems that 3 could be a better choice for the last line here.
UNTESTED on a real hardware.
Change-Id: I090e82d5f4ae25c768ff45a01a8dd76ff8a96a90
Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com>
---
M src/mainboard/lenovo/t60/mainboard.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/29160/4
--
To view, visit https://review.coreboot.org/c/coreboot/+/29160
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I090e82d5f4ae25c768ff45a01a8dd76ff8a96a90
Gerrit-Change-Number: 29160
Gerrit-PatchSet: 4
Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com>
Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Peter Lemenkov <lemenkov(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello Alexander Couzens, Patrick Rudolph, Arthur Heymans, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29160
to look at the new patch set (#3).
Change subject: mb/lenovo/t60: Align ACPI C-state across the similar boards
......................................................................
mb/lenovo/t60: Align ACPI C-state across the similar boards
We have 3 similar Lenovo mainboards - x60 (oldest), t60, and z61t (most
recent addition). The only one with two consequent 2s as the C-types
is t60:
static acpi_cstate_t cst_entries[] = {
{ 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
{ 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
{ 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
};
It seems that 3 could be a better choice for the last line here.
UNTESTED on hardware.
Change-Id: I090e82d5f4ae25c768ff45a01a8dd76ff8a96a90
Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com>
---
M src/mainboard/lenovo/t60/mainboard.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/29160/3
--
To view, visit https://review.coreboot.org/c/coreboot/+/29160
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I090e82d5f4ae25c768ff45a01a8dd76ff8a96a90
Gerrit-Change-Number: 29160
Gerrit-PatchSet: 3
Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com>
Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Peter Lemenkov <lemenkov(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31550 )
Change subject: security/memory: Clear memory in ramstage
......................................................................
Patch Set 12: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/31550
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idaadb8fb438e5b95557c0f65a14534e8762fde20
Gerrit-Change-Number: 31550
Gerrit-PatchSet: 12
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Nico Huber <nico.h(a)gmx.de>
Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Comment-Date: Wed, 26 Jun 2019 12:12:32 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31549 )
Change subject: cpu/x86/pae/pgtbl: Add memset with PAE
......................................................................
Patch Set 12: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/31549
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I00f7ecf87b5c9227a9d58a0b61eecc38007e1a57
Gerrit-Change-Number: 31549
Gerrit-PatchSet: 12
Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org>
Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com>
Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Nico Huber <nico.h(a)gmx.de>
Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Comment-Date: Wed, 26 Jun 2019 12:11:30 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment