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Change in ...coreboot[master]: device/pci_ops: Have only default PCI bus ops available
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31753 ) Change subject: device/pci_ops: Have only default PCI bus ops available ...................................................................... Patch Set 3: -Code-Review This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31753 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11c37cadfcbef8fb5657dec6d620e6bccab311a4 Gerrit-Change-Number: 31753 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 13 Mar 2019 05:24:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: arch/x86: Fix PCI IO config accessor
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31847 ) Change subject: arch/x86: Fix PCI IO config accessor ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id2888e07fc0f2b182b4633a747c1786e5c560678 Gerrit-Change-Number: 31847 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 13 Mar 2019 05:24:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: arch/x86: Optimise PCI IO config accessor
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31754 ) Change subject: arch/x86: Optimise PCI IO config accessor ...................................................................... Patch Set 5: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31754 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e729fe800c92b1ce4994ad2b4203072fa75a958 Gerrit-Change-Number: 31754 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 13 Mar 2019 05:24:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: [NOTFORMERGE] PCI accessor testcases
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31811 ) Change subject: [NOTFORMERGE] PCI accessor testcases ...................................................................... Patch Set 2: So my theory here is, the casting to (volatile void *addr) when calling write32() is the culprit; this with alias with any other pointer variables, essentially invalidating dev, dev->bus (and optionally non-constant var_mmconf_base here) from registers. -- To view, visit https://review.coreboot.org/c/coreboot/+/31811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ca4d5556d2ac80986a909cf4df029ee575f3940 Gerrit-Change-Number: 31811 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 13 Mar 2019 05:08:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci_ops: Rename 'where' to 'reg'
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31846 ) Change subject: device/pci_ops: Rename 'where' to 'reg' ...................................................................... device/pci_ops: Rename 'where' to 'reg' One could understand 'where' as bus, device, function or register. Make it clear it is register. Change-Id: I95d0330ba40510e48be70ca1d8f58aca66c8f695 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31846 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/include/arch/pci_io_cfg.h M src/arch/x86/pci_ops_conf1.c M src/device/pci_ops_mmconf.c M src/include/device/pci.h M src/include/device/pci_mmio_cfg.h M src/include/device/pci_ops.h 6 files changed, 116 insertions(+), 116 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h index 45ca381..317c50a 100644 --- a/src/arch/x86/include/arch/pci_io_cfg.h +++ b/src/arch/x86/include/arch/pci_io_cfg.h @@ -19,60 +19,60 @@ #include <device/pci_type.h> static __always_inline -uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t where) +uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg) { if (CONFIG(PCI_IO_CFG_EXT)) { // seg == 0 - return dev >> 4 | (where & 0xff) | ((where & 0xf00) << 16); + return dev >> 4 | (reg & 0xff) | ((reg & 0xf00) << 16); } else { - return dev >> 4 | where; + return dev >> 4 | reg; } } static __always_inline -uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t where) +uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t reg) { - uint32_t addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, reg); outl(0x80000000 | (addr & ~3), 0xCF8); return inb(0xCFC + (addr & 3)); } static __always_inline -uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t where) +uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t reg) { - uint32_t addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, reg); outl(0x80000000 | (addr & ~3), 0xCF8); return inw(0xCFC + (addr & 2)); } static __always_inline -uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t where) +uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg) { - uint32_t addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, reg); outl(0x80000000 | (addr & ~3), 0xCF8); return inl(0xCFC); } static __always_inline -void pci_io_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) +void pci_io_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value) { - uint32_t addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, reg); outl(0x80000000 | (addr & ~3), 0xCF8); outb(value, 0xCFC + (addr & 3)); } static __always_inline -void pci_io_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) +void pci_io_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value) { - uint32_t addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, reg); outl(0x80000000 | (addr & ~3), 0xCF8); outw(value, 0xCFC + (addr & 2)); } static __always_inline -void pci_io_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) +void pci_io_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) { - uint32_t addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, reg); outl(0x80000000 | (addr & ~3), 0xCF8); outl(value, 0xCFC); } @@ -85,39 +85,39 @@ */ static __always_inline -uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t where) +uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg) { - return pci_io_read_config8(dev, where); + return pci_io_read_config8(dev, reg); } static __always_inline -uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t where) +uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg) { - return pci_io_read_config16(dev, where); + return pci_io_read_config16(dev, reg); } static __always_inline -uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t where) +uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg) { - return pci_io_read_config32(dev, where); + return pci_io_read_config32(dev, reg); } static __always_inline -void pci_s_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) +void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value) { - pci_io_write_config8(dev, where, value); + pci_io_write_config8(dev, reg, value); } static __always_inline -void pci_s_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) +void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value) { - pci_io_write_config16(dev, where, value); + pci_io_write_config16(dev, reg, value); } static __always_inline -void pci_s_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) +void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) { - pci_io_write_config32(dev, where, value); + pci_io_write_config32(dev, reg, value); } #endif diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 3cd1ed5..4e2f24e 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -19,50 +19,50 @@ */ #if !CONFIG(PCI_IO_CFG_EXT) -#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ - ((dev)->path.pci.devfn << 8) | (where & ~3)) +#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | (reg & ~3)) #else -#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ - ((dev)->path.pci.devfn << 8) | ((where & 0xff) & ~3) |\ - ((where & 0xf00)<<16)) +#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | ((reg & 0xff) & ~3) |\ + ((reg & 0xf00)<<16)) #endif -static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t where) +static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t reg) { - outl(CONF_CMD(dev, where), 0xCF8); - return inb(0xCFC + (where & 3)); + outl(CONF_CMD(dev, reg), 0xCF8); + return inb(0xCFC + (reg & 3)); } -static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t where) +static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t reg) { - outl(CONF_CMD(dev, where), 0xCF8); - return inw(0xCFC + (where & 2)); + outl(CONF_CMD(dev, reg), 0xCF8); + return inw(0xCFC + (reg & 2)); } -static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t where) +static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t reg) { - outl(CONF_CMD(dev, where), 0xCF8); + outl(CONF_CMD(dev, reg), 0xCF8); return inl(0xCFC); } -static void pci_conf1_write_config8(const struct device *dev, uint16_t where, +static void pci_conf1_write_config8(const struct device *dev, uint16_t reg, uint8_t value) { - outl(CONF_CMD(dev, where), 0xCF8); - outb(value, 0xCFC + (where & 3)); + outl(CONF_CMD(dev, reg), 0xCF8); + outb(value, 0xCFC + (reg & 3)); } -static void pci_conf1_write_config16(const struct device *dev, uint16_t where, +static void pci_conf1_write_config16(const struct device *dev, uint16_t reg, uint16_t value) { - outl(CONF_CMD(dev, where), 0xCF8); - outw(value, 0xCFC + (where & 2)); + outl(CONF_CMD(dev, reg), 0xCF8); + outw(value, 0xCFC + (reg & 2)); } -static void pci_conf1_write_config32(const struct device *dev, uint16_t where, +static void pci_conf1_write_config32(const struct device *dev, uint16_t reg, uint32_t value) { - outl(CONF_CMD(dev, where), 0xCF8); + outl(CONF_CMD(dev, reg), 0xCF8); outl(value, 0xCFC); } diff --git a/src/device/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c index bfa75ce..c7c005c 100644 --- a/src/device/pci_ops_mmconf.c +++ b/src/device/pci_ops_mmconf.c @@ -23,43 +23,43 @@ * Functions for accessing PCI configuration space with mmconf accesses */ -#define PCI_MMIO_ADDR(dev, where, mask) \ +#define PCI_MMIO_ADDR(dev, reg, mask) \ ((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\ (((dev)->bus->secondary & 0xFFF) << 20) |\ (((dev)->path.pci.devfn & 0xFF) << 12) |\ - ((where) & 0xFFF)) & ~mask)) + ((reg) & 0xFFF)) & ~mask)) -static uint8_t pci_mmconf_read_config8(const struct device *dev, uint16_t where) +static uint8_t pci_mmconf_read_config8(const struct device *dev, uint16_t reg) { - return read8(PCI_MMIO_ADDR(dev, where, 0)); + return read8(PCI_MMIO_ADDR(dev, reg, 0)); } -static uint16_t pci_mmconf_read_config16(const struct device *dev, uint16_t where) +static uint16_t pci_mmconf_read_config16(const struct device *dev, uint16_t reg) { - return read16(PCI_MMIO_ADDR(dev, where, 1)); + return read16(PCI_MMIO_ADDR(dev, reg, 1)); } -static uint32_t pci_mmconf_read_config32(const struct device *dev, uint16_t where) +static uint32_t pci_mmconf_read_config32(const struct device *dev, uint16_t reg) { - return read32(PCI_MMIO_ADDR(dev, where, 3)); + return read32(PCI_MMIO_ADDR(dev, reg, 3)); } -static void pci_mmconf_write_config8(const struct device *dev, uint16_t where, +static void pci_mmconf_write_config8(const struct device *dev, uint16_t reg, uint8_t value) { - write8(PCI_MMIO_ADDR(dev, where, 0), value); + write8(PCI_MMIO_ADDR(dev, reg, 0), value); } -static void pci_mmconf_write_config16(const struct device *dev, uint16_t where, +static void pci_mmconf_write_config16(const struct device *dev, uint16_t reg, uint16_t value) { - write16(PCI_MMIO_ADDR(dev, where, 1), value); + write16(PCI_MMIO_ADDR(dev, reg, 1), value); } -static void pci_mmconf_write_config32(const struct device *dev, uint16_t where, +static void pci_mmconf_write_config32(const struct device *dev, uint16_t reg, uint32_t value) { - write32(PCI_MMIO_ADDR(dev, where, 3), value); + write32(PCI_MMIO_ADDR(dev, reg, 3), value); } static const struct pci_bus_operations pci_ops_mmconf = { diff --git a/src/include/device/pci.h b/src/include/device/pci.h index aa2dd99..2cfcb60 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -35,12 +35,12 @@ /* Common pci bus operations */ struct pci_bus_operations { - uint8_t (*read8)(const struct device *dev, uint16_t where); - uint16_t (*read16)(const struct device *dev, uint16_t where); - uint32_t (*read32)(const struct device *dev, uint16_t where); - void (*write8)(const struct device *dev, uint16_t where, uint8_t val); - void (*write16)(const struct device *dev, uint16_t where, uint16_t val); - void (*write32)(const struct device *dev, uint16_t where, uint32_t val); + uint8_t (*read8)(const struct device *dev, uint16_t reg); + uint16_t (*read16)(const struct device *dev, uint16_t reg); + uint32_t (*read32)(const struct device *dev, uint16_t reg); + void (*write8)(const struct device *dev, uint16_t reg, uint8_t val); + void (*write16)(const struct device *dev, uint16_t reg, uint16_t val); + void (*write32)(const struct device *dev, uint16_t reg, uint32_t val); }; struct pci_driver { diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h index 64406a7..e701915 100644 --- a/src/include/device/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -22,50 +22,50 @@ static __always_inline -uint8_t pci_mmio_read_config8(pci_devfn_t dev, uint16_t where) +uint8_t pci_mmio_read_config8(pci_devfn_t dev, uint16_t reg) { void *addr; - addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | where); + addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | reg); return read8(addr); } static __always_inline -uint16_t pci_mmio_read_config16(pci_devfn_t dev, uint16_t where) +uint16_t pci_mmio_read_config16(pci_devfn_t dev, uint16_t reg) { void *addr; - addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1)); + addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~1)); return read16(addr); } static __always_inline -uint32_t pci_mmio_read_config32(pci_devfn_t dev, uint16_t where) +uint32_t pci_mmio_read_config32(pci_devfn_t dev, uint16_t reg) { void *addr; - addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3)); + addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~3)); return read32(addr); } static __always_inline -void pci_mmio_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) +void pci_mmio_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value) { void *addr; - addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | where); + addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | reg); write8(addr, value); } static __always_inline -void pci_mmio_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) +void pci_mmio_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value) { void *addr; - addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1)); + addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~1)); write16(addr, value); } static __always_inline -void pci_mmio_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) +void pci_mmio_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) { void *addr; - addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3)); + addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~3)); write32(addr, value); } @@ -77,39 +77,39 @@ */ static __always_inline -uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t where) +uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg) { - return pci_mmio_read_config8(dev, where); + return pci_mmio_read_config8(dev, reg); } static __always_inline -uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t where) +uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg) { - return pci_mmio_read_config16(dev, where); + return pci_mmio_read_config16(dev, reg); } static __always_inline -uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t where) +uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg) { - return pci_mmio_read_config32(dev, where); + return pci_mmio_read_config32(dev, reg); } static __always_inline -void pci_s_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) +void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value) { - pci_mmio_write_config8(dev, where, value); + pci_mmio_write_config8(dev, reg, value); } static __always_inline -void pci_s_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) +void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value) { - pci_mmio_write_config16(dev, where, value); + pci_mmio_write_config16(dev, reg, value); } static __always_inline -void pci_s_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) +void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) { - pci_mmio_write_config32(dev, where, value); + pci_mmio_write_config32(dev, reg, value); } #endif diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h index 618e3a1..82f9658 100644 --- a/src/include/device/pci_ops.h +++ b/src/include/device/pci_ops.h @@ -55,83 +55,83 @@ } static __always_inline -u8 pci_read_config8(const struct device *dev, u16 where) +u8 pci_read_config8(const struct device *dev, u16 reg) { pcidev_assert(dev); - return pci_bus_ops()->read8(dev, where); + return pci_bus_ops()->read8(dev, reg); } static __always_inline -u16 pci_read_config16(const struct device *dev, u16 where) +u16 pci_read_config16(const struct device *dev, u16 reg) { pcidev_assert(dev); - return pci_bus_ops()->read16(dev, where); + return pci_bus_ops()->read16(dev, reg); } static __always_inline -u32 pci_read_config32(const struct device *dev, u16 where) +u32 pci_read_config32(const struct device *dev, u16 reg) { pcidev_assert(dev); - return pci_bus_ops()->read32(dev, where); + return pci_bus_ops()->read32(dev, reg); } static __always_inline -void pci_write_config8(const struct device *dev, u16 where, u8 val) +void pci_write_config8(const struct device *dev, u16 reg, u8 val) { pcidev_assert(dev); - pci_bus_ops()->write8(dev, where, val); + pci_bus_ops()->write8(dev, reg, val); } static __always_inline -void pci_write_config16(const struct device *dev, u16 where, u16 val) +void pci_write_config16(const struct device *dev, u16 reg, u16 val) { pcidev_assert(dev); - pci_bus_ops()->write16(dev, where, val); + pci_bus_ops()->write16(dev, reg, val); } static __always_inline -void pci_write_config32(const struct device *dev, u16 where, u32 val) +void pci_write_config32(const struct device *dev, u16 reg, u32 val) { pcidev_assert(dev); - pci_bus_ops()->write32(dev, where, val); + pci_bus_ops()->write32(dev, reg, val); } #endif #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_or_config8(pci_devfn_t dev, u16 where, u8 ormask) +void pci_or_config8(pci_devfn_t dev, u16 reg, u8 ormask) #else static __always_inline -void pci_or_config8(const struct device *dev, u16 where, u8 ormask) +void pci_or_config8(const struct device *dev, u16 reg, u8 ormask) #endif { - u8 value = pci_read_config8(dev, where); - pci_write_config8(dev, where, value | ormask); + u8 value = pci_read_config8(dev, reg); + pci_write_config8(dev, reg, value | ormask); } #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_or_config16(pci_devfn_t dev, u16 where, u16 ormask) +void pci_or_config16(pci_devfn_t dev, u16 reg, u16 ormask) #else static __always_inline -void pci_or_config16(const struct device *dev, u16 where, u16 ormask) +void pci_or_config16(const struct device *dev, u16 reg, u16 ormask) #endif { - u16 value = pci_read_config16(dev, where); - pci_write_config16(dev, where, value | ormask); + u16 value = pci_read_config16(dev, reg); + pci_write_config16(dev, reg, value | ormask); } #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_or_config32(pci_devfn_t dev, u16 where, u32 ormask) +void pci_or_config32(pci_devfn_t dev, u16 reg, u32 ormask) #else static __always_inline -void pci_or_config32(const struct device *dev, u16 where, u32 ormask) +void pci_or_config32(const struct device *dev, u16 reg, u32 ormask) #endif { - u32 value = pci_read_config32(dev, where); - pci_write_config32(dev, where, value | ormask); + u32 value = pci_read_config32(dev, reg); + pci_write_config32(dev, reg, value | ormask); } #ifdef __SIMPLE_DEVICE__ -- To view, visit https://review.coreboot.org/c/coreboot/+/31846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95d0330ba40510e48be70ca1d8f58aca66c8f695 Gerrit-Change-Number: 31846 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: device/pci_ops: Unify signatures
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31845 ) Change subject: device/pci_ops: Unify signatures ...................................................................... device/pci_ops: Unify signatures Use fixed width types and const pointers for dev. Change-Id: Ide3b70238479ad3e1869ed22aa4fa0f1ff8aa766 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31845 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/include/arch/pci_io_cfg.h M src/arch/x86/pci_ops_conf1.c M src/device/pci_ops_mmconf.c M src/include/device/pci.h M src/include/device/pci_mmio_cfg.h M src/include/device/pci_ops.h 6 files changed, 67 insertions(+), 67 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h index 017e661..45ca381 100644 --- a/src/arch/x86/include/arch/pci_io_cfg.h +++ b/src/arch/x86/include/arch/pci_io_cfg.h @@ -19,7 +19,7 @@ #include <device/pci_type.h> static __always_inline -unsigned int pci_io_encode_addr(pci_devfn_t dev, unsigned int where) +uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t where) { if (CONFIG(PCI_IO_CFG_EXT)) { // seg == 0 @@ -30,49 +30,49 @@ } static __always_inline -uint8_t pci_io_read_config8(pci_devfn_t dev, unsigned int where) +uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t where) { - unsigned int addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, where); outl(0x80000000 | (addr & ~3), 0xCF8); return inb(0xCFC + (addr & 3)); } static __always_inline -uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned int where) +uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t where) { - unsigned int addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, where); outl(0x80000000 | (addr & ~3), 0xCF8); return inw(0xCFC + (addr & 2)); } static __always_inline -uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned int where) +uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t where) { - unsigned int addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, where); outl(0x80000000 | (addr & ~3), 0xCF8); return inl(0xCFC); } static __always_inline -void pci_io_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) +void pci_io_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) { - unsigned int addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, where); outl(0x80000000 | (addr & ~3), 0xCF8); outb(value, 0xCFC + (addr & 3)); } static __always_inline -void pci_io_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) +void pci_io_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) { - unsigned int addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, where); outl(0x80000000 | (addr & ~3), 0xCF8); outw(value, 0xCFC + (addr & 2)); } static __always_inline -void pci_io_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) +void pci_io_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) { - unsigned int addr = pci_io_encode_addr(dev, where); + uint32_t addr = pci_io_encode_addr(dev, where); outl(0x80000000 | (addr & ~3), 0xCF8); outl(value, 0xCFC); } @@ -85,37 +85,37 @@ */ static __always_inline -uint8_t pci_s_read_config8(pci_devfn_t dev, unsigned int where) +uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t where) { return pci_io_read_config8(dev, where); } static __always_inline -uint16_t pci_s_read_config16(pci_devfn_t dev, unsigned int where) +uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t where) { return pci_io_read_config16(dev, where); } static __always_inline -uint32_t pci_s_read_config32(pci_devfn_t dev, unsigned int where) +uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t where) { return pci_io_read_config32(dev, where); } static __always_inline -void pci_s_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) +void pci_s_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) { pci_io_write_config8(dev, where, value); } static __always_inline -void pci_s_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) +void pci_s_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) { pci_io_write_config16(dev, where, value); } static __always_inline -void pci_s_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) +void pci_s_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) { pci_io_write_config32(dev, where, value); } diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 7d82507..3cd1ed5 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -27,39 +27,39 @@ ((where & 0xf00)<<16)) #endif -static uint8_t pci_conf1_read_config8(struct device *dev, int where) +static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t where) { outl(CONF_CMD(dev, where), 0xCF8); return inb(0xCFC + (where & 3)); } -static uint16_t pci_conf1_read_config16(struct device *dev, int where) +static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t where) { outl(CONF_CMD(dev, where), 0xCF8); return inw(0xCFC + (where & 2)); } -static uint32_t pci_conf1_read_config32(struct device *dev, int where) +static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t where) { outl(CONF_CMD(dev, where), 0xCF8); return inl(0xCFC); } -static void pci_conf1_write_config8(struct device *dev, int where, +static void pci_conf1_write_config8(const struct device *dev, uint16_t where, uint8_t value) { outl(CONF_CMD(dev, where), 0xCF8); outb(value, 0xCFC + (where & 3)); } -static void pci_conf1_write_config16(struct device *dev, int where, +static void pci_conf1_write_config16(const struct device *dev, uint16_t where, uint16_t value) { outl(CONF_CMD(dev, where), 0xCF8); outw(value, 0xCFC + (where & 2)); } -static void pci_conf1_write_config32(struct device *dev, int where, +static void pci_conf1_write_config32(const struct device *dev, uint16_t where, uint32_t value) { outl(CONF_CMD(dev, where), 0xCF8); diff --git a/src/device/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c index 9b03068..bfa75ce 100644 --- a/src/device/pci_ops_mmconf.c +++ b/src/device/pci_ops_mmconf.c @@ -29,34 +29,34 @@ (((dev)->path.pci.devfn & 0xFF) << 12) |\ ((where) & 0xFFF)) & ~mask)) -static uint8_t pci_mmconf_read_config8(struct device *dev, int where) +static uint8_t pci_mmconf_read_config8(const struct device *dev, uint16_t where) { return read8(PCI_MMIO_ADDR(dev, where, 0)); } -static uint16_t pci_mmconf_read_config16(struct device *dev, int where) +static uint16_t pci_mmconf_read_config16(const struct device *dev, uint16_t where) { return read16(PCI_MMIO_ADDR(dev, where, 1)); } -static uint32_t pci_mmconf_read_config32(struct device *dev, int where) +static uint32_t pci_mmconf_read_config32(const struct device *dev, uint16_t where) { return read32(PCI_MMIO_ADDR(dev, where, 3)); } -static void pci_mmconf_write_config8(struct device *dev, int where, +static void pci_mmconf_write_config8(const struct device *dev, uint16_t where, uint8_t value) { write8(PCI_MMIO_ADDR(dev, where, 0), value); } -static void pci_mmconf_write_config16(struct device *dev, int where, +static void pci_mmconf_write_config16(const struct device *dev, uint16_t where, uint16_t value) { write16(PCI_MMIO_ADDR(dev, where, 1), value); } -static void pci_mmconf_write_config32(struct device *dev, int where, +static void pci_mmconf_write_config32(const struct device *dev, uint16_t where, uint32_t value) { write32(PCI_MMIO_ADDR(dev, where, 3), value); diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 2fefb39..aa2dd99 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -35,12 +35,12 @@ /* Common pci bus operations */ struct pci_bus_operations { - uint8_t (*read8)(struct device *dev, int where); - uint16_t (*read16)(struct device *dev, int where); - uint32_t (*read32)(struct device *dev, int where); - void (*write8)(struct device *dev, int where, uint8_t val); - void (*write16)(struct device *dev, int where, uint16_t val); - void (*write32)(struct device *dev, int where, uint32_t val); + uint8_t (*read8)(const struct device *dev, uint16_t where); + uint16_t (*read16)(const struct device *dev, uint16_t where); + uint32_t (*read32)(const struct device *dev, uint16_t where); + void (*write8)(const struct device *dev, uint16_t where, uint8_t val); + void (*write16)(const struct device *dev, uint16_t where, uint16_t val); + void (*write32)(const struct device *dev, uint16_t where, uint32_t val); }; struct pci_driver { diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h index aaa2181..64406a7 100644 --- a/src/include/device/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -22,7 +22,7 @@ static __always_inline -u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where) +uint8_t pci_mmio_read_config8(pci_devfn_t dev, uint16_t where) { void *addr; addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | where); @@ -30,7 +30,7 @@ } static __always_inline -u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where) +uint16_t pci_mmio_read_config16(pci_devfn_t dev, uint16_t where) { void *addr; addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1)); @@ -38,7 +38,7 @@ } static __always_inline -u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where) +uint32_t pci_mmio_read_config32(pci_devfn_t dev, uint16_t where) { void *addr; addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3)); @@ -46,7 +46,7 @@ } static __always_inline -void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value) +void pci_mmio_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) { void *addr; addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | where); @@ -54,7 +54,7 @@ } static __always_inline -void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value) +void pci_mmio_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) { void *addr; addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1)); @@ -62,7 +62,7 @@ } static __always_inline -void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value) +void pci_mmio_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) { void *addr; addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3)); @@ -77,37 +77,37 @@ */ static __always_inline -uint8_t pci_s_read_config8(pci_devfn_t dev, unsigned int where) +uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t where) { return pci_mmio_read_config8(dev, where); } static __always_inline -uint16_t pci_s_read_config16(pci_devfn_t dev, unsigned int where) +uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t where) { return pci_mmio_read_config16(dev, where); } static __always_inline -uint32_t pci_s_read_config32(pci_devfn_t dev, unsigned int where) +uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t where) { return pci_mmio_read_config32(dev, where); } static __always_inline -void pci_s_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value) +void pci_s_write_config8(pci_devfn_t dev, uint16_t where, uint8_t value) { pci_mmio_write_config8(dev, where, value); } static __always_inline -void pci_s_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value) +void pci_s_write_config16(pci_devfn_t dev, uint16_t where, uint16_t value) { pci_mmio_write_config16(dev, where, value); } static __always_inline -void pci_s_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) +void pci_s_write_config32(pci_devfn_t dev, uint16_t where, uint32_t value) { pci_mmio_write_config32(dev, where, value); } diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h index 1c9f3cc..618e3a1 100644 --- a/src/include/device/pci_ops.h +++ b/src/include/device/pci_ops.h @@ -55,42 +55,42 @@ } static __always_inline -u8 pci_read_config8(struct device *dev, unsigned int where) +u8 pci_read_config8(const struct device *dev, u16 where) { pcidev_assert(dev); return pci_bus_ops()->read8(dev, where); } static __always_inline -u16 pci_read_config16(struct device *dev, unsigned int where) +u16 pci_read_config16(const struct device *dev, u16 where) { pcidev_assert(dev); return pci_bus_ops()->read16(dev, where); } static __always_inline -u32 pci_read_config32(struct device *dev, unsigned int where) +u32 pci_read_config32(const struct device *dev, u16 where) { pcidev_assert(dev); return pci_bus_ops()->read32(dev, where); } static __always_inline -void pci_write_config8(struct device *dev, unsigned int where, u8 val) +void pci_write_config8(const struct device *dev, u16 where, u8 val) { pcidev_assert(dev); pci_bus_ops()->write8(dev, where, val); } static __always_inline -void pci_write_config16(struct device *dev, unsigned int where, u16 val) +void pci_write_config16(const struct device *dev, u16 where, u16 val) { pcidev_assert(dev); pci_bus_ops()->write16(dev, where, val); } static __always_inline -void pci_write_config32(struct device *dev, unsigned int where, u32 val) +void pci_write_config32(const struct device *dev, u16 where, u32 val) { pcidev_assert(dev); pci_bus_ops()->write32(dev, where, val); @@ -100,10 +100,10 @@ #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_or_config8(pci_devfn_t dev, unsigned int where, u8 ormask) +void pci_or_config8(pci_devfn_t dev, u16 where, u8 ormask) #else static __always_inline -void pci_or_config8(struct device *dev, unsigned int where, u8 ormask) +void pci_or_config8(const struct device *dev, u16 where, u8 ormask) #endif { u8 value = pci_read_config8(dev, where); @@ -112,10 +112,10 @@ #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_or_config16(pci_devfn_t dev, unsigned int where, u16 ormask) +void pci_or_config16(pci_devfn_t dev, u16 where, u16 ormask) #else static __always_inline -void pci_or_config16(struct device *dev, unsigned int where, u16 ormask) +void pci_or_config16(const struct device *dev, u16 where, u16 ormask) #endif { u16 value = pci_read_config16(dev, where); @@ -124,10 +124,10 @@ #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_or_config32(pci_devfn_t dev, unsigned int where, u32 ormask) +void pci_or_config32(pci_devfn_t dev, u16 where, u32 ormask) #else static __always_inline -void pci_or_config32(struct device *dev, unsigned int where, u32 ormask) +void pci_or_config32(const struct device *dev, u16 where, u32 ormask) #endif { u32 value = pci_read_config32(dev, where); @@ -136,10 +136,10 @@ #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_update_config8(pci_devfn_t dev, int reg, u8 mask, u8 or) +void pci_update_config8(pci_devfn_t dev, u16 reg, u8 mask, u8 or) #else static __always_inline -void pci_update_config8(struct device *dev, int reg, u8 mask, u8 or) +void pci_update_config8(const struct device *dev, u16 reg, u8 mask, u8 or) #endif { u8 reg8; @@ -152,10 +152,10 @@ #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_update_config16(pci_devfn_t dev, int reg, u16 mask, u16 or) +void pci_update_config16(pci_devfn_t dev, u16 reg, u16 mask, u16 or) #else static __always_inline -void pci_update_config16(struct device *dev, int reg, u16 mask, u16 or) +void pci_update_config16(const struct device *dev, u16 reg, u16 mask, u16 or) #endif { u16 reg16; @@ -168,10 +168,10 @@ #ifdef __SIMPLE_DEVICE__ static __always_inline -void pci_update_config32(pci_devfn_t dev, int reg, u32 mask, u32 or) +void pci_update_config32(pci_devfn_t dev, u16 reg, u32 mask, u32 or) #else static __always_inline -void pci_update_config32(struct device *dev, int reg, u32 mask, u32 or) +void pci_update_config32(const struct device *dev, u16 reg, u32 mask, u32 or) #endif { u32 reg32; -- To view, visit https://review.coreboot.org/c/coreboot/+/31845 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide3b70238479ad3e1869ed22aa4fa0f1ff8aa766 Gerrit-Change-Number: 31845 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: sb/amd/cimx/sb800/early.c: Drop unused 'include <cbmem.h>
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31857 ) Change subject: sb/amd/cimx/sb800/early.c: Drop unused 'include <cbmem.h> ...................................................................... sb/amd/cimx/sb800/early.c: Drop unused 'include <cbmem.h> Change-Id: I0e641197119588ccf090dad2950282f54ccbd208 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31857 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/southbridge/amd/cimx/sb800/early.c 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c index 5b19b5a..7d93c81 100644 --- a/src/southbridge/amd/cimx/sb800/early.c +++ b/src/southbridge/amd/cimx/sb800/early.c @@ -18,7 +18,6 @@ #include "SBPLATFORM.h" #include "sb_cimx.h" #include "cfg.h" /*sb800_cimx_config*/ -#include "cbmem.h" /** * @brief South Bridge CIMx romstage entry, -- To view, visit https://review.coreboot.org/c/coreboot/+/31857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e641197119588ccf090dad2950282f54ccbd208 Gerrit-Change-Number: 31857 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: sb/amd/cimx/sb800/early.c: Drop unused 'include <cbmem.h>
by Kyösti Mälkki (Code Review) 13 Mar '19

13 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31857 ) Change subject: sb/amd/cimx/sb800/early.c: Drop unused 'include <cbmem.h> ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/31857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e641197119588ccf090dad2950282f54ccbd208 Gerrit-Change-Number: 31857 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 13 Mar 2019 04:36:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: nb/i945/stage_cache.c: Drop unnecessary include
by HAOUAS Elyes (Code Review) 13 Mar '19

13 Mar '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31714 Change subject: nb/i945/stage_cache.c: Drop unnecessary include ...................................................................... nb/i945/stage_cache.c: Drop unnecessary include Change-Id: If6224c28012241e4925e05e14f0499857054f178 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/stage_cache.c 1 file changed, 1 insertion(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/31714/1 diff --git a/src/northbridge/intel/i945/stage_cache.c b/src/northbridge/intel/i945/stage_cache.c index 26d4e7e..47f08c1 100644 --- a/src/northbridge/intel/i945/stage_cache.c +++ b/src/northbridge/intel/i945/stage_cache.c @@ -13,12 +13,9 @@ * GNU General Public License for more details. */ -#include <arch/io.h> -#include <cbmem.h> -#include <device/pci.h> +#include <stdint.h> #include <stage_cache.h> #include <cpu/intel/smm/gen1/smi.h> -#include "i945.h" void stage_cache_external_region(void **base, size_t *size) { -- To view, visit https://review.coreboot.org/c/coreboot/+/31714 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6224c28012241e4925e05e14f0499857054f178 Gerrit-Change-Number: 31714 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 7

Change in ...coreboot[master]: src/mainboard/*/*/cstates.c: Drop unused includes
by HAOUAS Elyes (Code Review) 13 Mar '19

13 Mar '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31783 Change subject: src/mainboard/*/*/cstates.c: Drop unused includes ...................................................................... src/mainboard/*/*/cstates.c: Drop unused includes Change-Id: I315721d6261e558c3f7145c80714262052ce0e49 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asus/p5gc-mx/cstates.c M src/mainboard/asus/p5qc/cstates.c M src/mainboard/foxconn/d41s/cstates.c M src/mainboard/foxconn/g41s-k/cstates.c M src/mainboard/getac/p470/cstates.c M src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c M src/mainboard/gigabyte/ga-g41m-es2l/cstates.c M src/mainboard/ibase/mb899/cstates.c M src/mainboard/intel/d510mo/cstates.c M src/mainboard/intel/d945gclf/cstates.c M src/mainboard/intel/dg43gt/cstates.c M src/mainboard/kontron/986lcd-m/cstates.c M src/mainboard/lenovo/t400/cstates.c M src/mainboard/lenovo/x200/cstates.c M src/mainboard/roda/rk886ex/cstates.c M src/mainboard/roda/rk9/cstates.c 16 files changed, 1 insertion(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/31783/1 diff --git a/src/mainboard/asus/p5gc-mx/cstates.c b/src/mainboard/asus/p5gc-mx/cstates.c index 0370a69..ab75f49 100644 --- a/src/mainboard/asus/p5gc-mx/cstates.c +++ b/src/mainboard/asus/p5gc-mx/cstates.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/asus/p5qc/cstates.c b/src/mainboard/asus/p5qc/cstates.c index aa7214d..ab75f49 100644 --- a/src/mainboard/asus/p5qc/cstates.c +++ b/src/mainboard/asus/p5qc/cstates.c @@ -12,8 +12,6 @@ */ #include <arch/acpigen.h> -#include <device/device.h> -#include <southbridge/intel/i82801jx/i82801jx.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/foxconn/d41s/cstates.c b/src/mainboard/foxconn/d41s/cstates.c index 45b5752..bee1779 100644 --- a/src/mainboard/foxconn/d41s/cstates.c +++ b/src/mainboard/foxconn/d41s/cstates.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/foxconn/g41s-k/cstates.c b/src/mainboard/foxconn/g41s-k/cstates.c index 062add2..3ac18c2 100644 --- a/src/mainboard/foxconn/g41s-k/cstates.c +++ b/src/mainboard/foxconn/g41s-k/cstates.c @@ -15,7 +15,6 @@ */ #include <arch/acpigen.h> -#include <southbridge/intel/i82801gx/i82801gx.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/getac/p470/cstates.c b/src/mainboard/getac/p470/cstates.c index 55e6ab8..8939e47 100644 --- a/src/mainboard/getac/p470/cstates.c +++ b/src/mainboard/getac/p470/cstates.c @@ -11,7 +11,7 @@ * GNU General Public License for more details. */ -#include <device/device.h> +#include <arch/acpi.h> #include <arch/acpigen.h> #include <southbridge/intel/i82801gx/i82801gx.h> diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c b/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c index 0370a69..ab75f49 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/cstates.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cstates.c b/src/mainboard/gigabyte/ga-g41m-es2l/cstates.c index 4d9f4ab..fa542eb 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/cstates.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/cstates.c @@ -14,8 +14,6 @@ */ #include <arch/acpigen.h> -#include <device/device.h> -#include <southbridge/intel/i82801gx/i82801gx.h> static acpi_cstate_t cst_entries[] = {}; diff --git a/src/mainboard/ibase/mb899/cstates.c b/src/mainboard/ibase/mb899/cstates.c index 0370a69..ab75f49 100644 --- a/src/mainboard/ibase/mb899/cstates.c +++ b/src/mainboard/ibase/mb899/cstates.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/intel/d510mo/cstates.c b/src/mainboard/intel/d510mo/cstates.c index 45b5752..bee1779 100644 --- a/src/mainboard/intel/d510mo/cstates.c +++ b/src/mainboard/intel/d510mo/cstates.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/intel/d945gclf/cstates.c b/src/mainboard/intel/d945gclf/cstates.c index 0370a69..ab75f49 100644 --- a/src/mainboard/intel/d945gclf/cstates.c +++ b/src/mainboard/intel/d945gclf/cstates.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/intel/dg43gt/cstates.c b/src/mainboard/intel/dg43gt/cstates.c index aa7214d..ab75f49 100644 --- a/src/mainboard/intel/dg43gt/cstates.c +++ b/src/mainboard/intel/dg43gt/cstates.c @@ -12,8 +12,6 @@ */ #include <arch/acpigen.h> -#include <device/device.h> -#include <southbridge/intel/i82801jx/i82801jx.h> int get_cst_entries(acpi_cstate_t **entries) { diff --git a/src/mainboard/kontron/986lcd-m/cstates.c b/src/mainboard/kontron/986lcd-m/cstates.c index 0370a69..ab75f49 100644 --- a/src/mainboard/kontron/986lcd-m/cstates.c +++ b/src/mainboard/kontron/986lcd-m/cstates.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/lenovo/t400/cstates.c b/src/mainboard/lenovo/t400/cstates.c index e51accb..34bceaf 100644 --- a/src/mainboard/lenovo/t400/cstates.c +++ b/src/mainboard/lenovo/t400/cstates.c @@ -14,8 +14,6 @@ */ #include <arch/acpigen.h> -#include <device/device.h> /* fix for i82801ix.h */ -#include <southbridge/intel/i82801ix/i82801ix.h> static acpi_cstate_t cst_entries[] = { { diff --git a/src/mainboard/lenovo/x200/cstates.c b/src/mainboard/lenovo/x200/cstates.c index e51accb..34bceaf 100644 --- a/src/mainboard/lenovo/x200/cstates.c +++ b/src/mainboard/lenovo/x200/cstates.c @@ -14,8 +14,6 @@ */ #include <arch/acpigen.h> -#include <device/device.h> /* fix for i82801ix.h */ -#include <southbridge/intel/i82801ix/i82801ix.h> static acpi_cstate_t cst_entries[] = { { diff --git a/src/mainboard/roda/rk886ex/cstates.c b/src/mainboard/roda/rk886ex/cstates.c index 0370a69..ab75f49 100644 --- a/src/mainboard/roda/rk886ex/cstates.c +++ b/src/mainboard/roda/rk886ex/cstates.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <device/device.h> #include <arch/acpigen.h> int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/roda/rk9/cstates.c b/src/mainboard/roda/rk9/cstates.c index 0a5f98a..fea9276 100644 --- a/src/mainboard/roda/rk9/cstates.c +++ b/src/mainboard/roda/rk9/cstates.c @@ -14,8 +14,6 @@ */ #include <arch/acpigen.h> -#include <device/device.h> /* fix for i82801ix.h */ -#include <southbridge/intel/i82801ix/i82801ix.h> static acpi_cstate_t cst_entries[] = { { -- To view, visit https://review.coreboot.org/c/coreboot/+/31783 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I315721d6261e558c3f7145c80714262052ce0e49 Gerrit-Change-Number: 31783 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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coreboot-gerrit March 2019