November 2019 - coreboot-gerrit

Change in coreboot[master]: soc/intel/common: pmclib: make use of the new ETR address API
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Hello Kyösti Mälkki, Aaron Durbin, Patrick Rudolph, Subrata Banik, Angel Pons, Arthur Heymans, build bot (Jenkins), Nico Huber, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/36570 to look at the new patch set (#2). Change subject: soc/intel/common: pmclib: make use of the new ETR address API ...................................................................... soc/intel/common: pmclib: make use of the new ETR address API Make use of the new ETR address API in the ETR3 register related functions. Change-Id: I49f59efb4a7c7d3d629ac54a7922bbcc8a87714d Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/common/block/pmc/pmclib.c 1 file changed, 14 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/36570/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49f59efb4a7c7d3d629ac54a7922bbcc8a87714d Gerrit-Change-Number: 36570 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: pmclib: make use of the new ETR address API
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36570 ) Change subject: soc/intel/common: pmclib: make use of the new ETR address API ...................................................................... Uploaded patch set 2. -- To view, visit https://review.coreboot.org/c/coreboot/+/36570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49f59efb4a7c7d3d629ac54a7922bbcc8a87714d Gerrit-Change-Number: 36570 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Nov 2019 14:50:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/icelake: lockdown: lock global reset
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36572 ) Change subject: soc/intel/icelake: lockdown: lock global reset ...................................................................... Uploaded patch set 2: Patch Set 1 was rebased. -- To view, visit https://review.coreboot.org/c/coreboot/+/36572 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e450a473ccdf99221e82e0f857879039d78991b Gerrit-Change-Number: 36572 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Nov 2019 14:50:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: lockdown: lock global reset
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Hello Kyösti Mälkki, Aaron Durbin, Patrick Rudolph, Subrata Banik, Angel Pons, Arthur Heymans, build bot (Jenkins), Nico Huber, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/36573 to look at the new patch set (#3). Change subject: soc/intel/skylake: lockdown: lock global reset ...................................................................... soc/intel/skylake: lockdown: lock global reset There are four chipsets selecting PMC_GLOBAL_RESET_ENABLE_LOCK but only one (apollolake) is actually calling the code. Add the missing call. Also fix the register offset in a comment in reset code. Change-Id: If190c3c66889ede105d958b423b38ebdcb698332 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/skylake/lockdown.c M src/soc/intel/skylake/reset.c 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/36573/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/36573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If190c3c66889ede105d958b423b38ebdcb698332 Gerrit-Change-Number: 36573 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/skylake: lockdown: lock global reset
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36573 ) Change subject: soc/intel/skylake: lockdown: lock global reset ...................................................................... Uploaded patch set 3. -- To view, visit https://review.coreboot.org/c/coreboot/+/36573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If190c3c66889ede105d958b423b38ebdcb698332 Gerrit-Change-Number: 36573 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Nov 2019 14:50:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Add ASPEED AST2500 chip video initializetion functions. Based on ASPE...
by Дмитрий Понаморев (Code Review) Nov. 2, 2019

Nov. 2, 2019

Дмитрий Понаморев has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36575 ) Change subject: Add ASPEED AST2500 chip video initializetion functions. Based on ASPEED Graphics Linux XFree86/XORG Driver v.1.09.0 ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/36575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c53bf5ee454d3c2ecd33fd998e31755edde2998 Gerrit-Change-Number: 36575 Gerrit-PatchSet: 1 Gerrit-Owner: Дмитрий Понаморев <dponamorev(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: Дмитрий Понаморев <dponamorev(a)gmail.com> Gerrit-Comment-Date: Sat, 02 Nov 2019 14:38:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/gm45: Build test with VBOOT
by Arthur Heymans (Code Review) Nov. 2, 2019

Nov. 2, 2019

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36238 ) Change subject: nb/intel/gm45: Build test with VBOOT ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/36238/5/configs/config.lenovo_t400… File configs/config.lenovo_t400_all_debug_and_option_table: PS5: > rename the file? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/36238 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21d20d7c575833ace02b4b8ed9d5c82750b331c7 Gerrit-Change-Number: 36238 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 02 Nov 2019 14:36:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: add soc implementation for ETR address API
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36569 ) Change subject: soc/intel/skylake: add soc implementation for ETR address API ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/c/coreboot/+/36569/1/src/soc/intel/skylake/pmut… File src/soc/intel/skylake/pmutil.c: https://review.coreboot.org/c/coreboot/+/36569/1/src/soc/intel/skylake/pmut… PS1, Line 178: return (uintptr_t) &pcicfg(PCH_DEVFN_PMC)->reg32[ETR / sizeof(uint32_t)]; > does not work as expected, yet Done -- To view, visit https://review.coreboot.org/c/coreboot/+/36569 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae54af09347d693620b631721576e4b916ea0f0f Gerrit-Change-Number: 36569 Gerrit-PatchSet: 1 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Nov 2019 14:19:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: lockdown: lock global reset
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Hello Kyösti Mälkki, Aaron Durbin, Patrick Rudolph, Subrata Banik, Angel Pons, Arthur Heymans, build bot (Jenkins), Nico Huber, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/36573 to look at the new patch set (#2). Change subject: soc/intel/skylake: lockdown: lock global reset ...................................................................... soc/intel/skylake: lockdown: lock global reset There are four chipsets selecting PMC_GLOBAL_RESET_ENABLE_LOCK but only one (apollolake) is actually calling the code. Add the missing call. Also fix the register offset in a comment in reset code. Change-Id: If190c3c66889ede105d958b423b38ebdcb698332 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M src/soc/intel/skylake/lockdown.c M src/soc/intel/skylake/pmutil.c M src/soc/intel/skylake/reset.c 3 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/36573/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If190c3c66889ede105d958b423b38ebdcb698332 Gerrit-Change-Number: 36573 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/skylake: lockdown: lock global reset
by Michael Niewöhner (Code Review) Nov. 2, 2019

Nov. 2, 2019

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36573 ) Change subject: soc/intel/skylake: lockdown: lock global reset ...................................................................... Uploaded patch set 2. -- To view, visit https://review.coreboot.org/c/coreboot/+/36573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If190c3c66889ede105d958b423b38ebdcb698332 Gerrit-Change-Number: 36573 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Nov 2019 14:18:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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