Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30873 )
Change subject: [RFC] cpu/intel/car: Use symbols for CAR MTRR setup
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block…
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block…
PS4, Line 109: #if 0
> Do we need two MTRRs? Don't we get the same cacheline utilisation by limiting the load to _car_mtrr_size below.
Probably not, as long as the CAR region with cachelines utilized is large enough to fit the programs. Unless FSP-M is supposed to be independent of FSP-T so I would guess that it does not care about how CAR is set up as long as it's in the right place?
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Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30873 )
Change subject: [RFC] cpu/intel/car: Use symbols for CAR MTRR setup
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block…
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block…
PS4, Line 109: #if 0
Do we need two MTRRs? Don't we get the same cacheline utilisation by limiting the load to _car_mtrr_size below.
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36622 )
Change subject: drivers/fsp2_0: drop support for FSP-T
......................................................................
Patch Set 4:
> Patch Set 4:
>
> > Patch Set 4:
> >
> > > Patch Set 4:
> > >
> > > > Patch Set 4: Code-Review-1
> > > >
> > > > FSP-T already set as optional. Some of our customers are using FSP-T, it has to be there.
> > >
> > > Could you please state why? What does FSP-T do that coreboot cannot?
> >
> > I understand the concern Arthur.
> >
> > There are some customer who still like to make use of FSP-T due to various reason.
> >
> > 1. native CAR implementation majorly focusing on NEM enhance
> > 2. Some customers like to use FSP-T with intel boot guard solution, where else native CAR what we implemented is not applicable with bootguard
>
> Can you give more details on that NEM part, please?
> On 2: is there any chance, Intel can release more details here so we can (maybe) add support for it?
@Subrata ping
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Kyösti Mälkki has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/36596 )
Change subject: include: introduce update* for mmio operations
......................................................................
Removed Code-Review-2 by Kyösti Mälkki <kyosti.malkki(a)gmail.com>
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36596 )
Change subject: include: introduce update* for mmio operations
......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36596/3/src/include/mmio.h
File src/include/mmio.h:
https://review.coreboot.org/c/coreboot/+/36596/3/src/include/mmio.h@17
PS3, Line 17:
> need to find out why test fails cb:36653
Done
https://review.coreboot.org/c/coreboot/+/36596/3/src/include/mmio.h@28
PS3, Line 28: write8(reg);
> yep, saw it two seconds before your comment, thanks :D
Done
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Change subject: include: introduce update* for mmio operations
......................................................................
Uploaded patch set 4.
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Hello Kyösti Mälkki, Aaron Durbin, Arthur Heymans, build bot (Jenkins), Nico Huber, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36596
to look at the new patch set (#4).
Change subject: include: introduce update* for mmio operations
......................................................................
include: introduce update* for mmio operations
Introduce update* as equivalent of pci_update* for mmio operations.
Change-Id: I9f188d586c09ee9f1e17290563f68970603204fb
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
A src/include/mmio.h
1 file changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/36596/4
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36596 )
Change subject: include: introduce update* for mmio operations
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36596/3/src/include/mmio.h
File src/include/mmio.h:
https://review.coreboot.org/c/coreboot/+/36596/3/src/include/mmio.h@28
PS3, Line 28: write8(reg);
> missing addr
yep, saw it two seconds before your comment, thanks :D
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