Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30868 )
Change subject: cpu/intel/smm/gen1: Add pineview to the check for alt SMRR MSR's
......................................................................
Patch Set 3: Code-Review+2
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Angel Pons has uploaded a new patch set (#41) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/25601 )
Change subject: nb/intel/x4x: Use parallel MP init
......................................................................
nb/intel/x4x: Use parallel MP init
Use parallel MP init code to initialize all AP's.
Also remove guards around CPU code where all platforms now use
parallel MP init.
Tested on Intel DG41WV, shaves off about 90ms on a quad core.
Change-Id: Id5a2729f5bf6b525abad577e63d7953ae6640921
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/cpu/intel/model_1067x/model_1067x_init.c
M src/cpu/intel/model_6fx/model_6fx_init.c
M src/cpu/intel/model_f4x/model_f4x_init.c
M src/mainboard/asrock/g41c-gs/cmos.layout
M src/mainboard/foxconn/g41s-k/cmos.layout
M src/mainboard/gigabyte/ga-g41m-es2l/cmos.layout
M src/northbridge/intel/x4x/Kconfig
M src/northbridge/intel/x4x/northbridge.c
M src/southbridge/intel/i82801jx/lpc.c
9 files changed, 2 insertions(+), 78 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/25601/41
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/20979 )
Change subject: nb/intel/x4x/raminit: Move dummy reads after JEDEC init
......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/#/c/20979/7//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/20979/7//COMMIT_MSG@7
PS7, Line 7: nb/intel/x4x/raminit: Move dummy reads after JEDEC init
It’s confusing right now, as they are already after JEDEC init. Maybe *right after* or *directly after*?
https://review.coreboot.org/#/c/20979/7//COMMIT_MSG@12
PS7, Line 12: Dummy reads also make much more sense after JEDEC init as a way to
: send a few JEDEC commands, presumably as a way to make sure it is
: ready.
Maybe we can get rid of those entirely?
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/20979 )
Change subject: nb/intel/x4x/raminit: Move dummy reads after JEDEC init
......................................................................
Patch Set 7:
I have not seen it improve thing but yes this is how it is supposed to be done.
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22813 )
Change subject: nb/intel/x4x/rcven.c: Reset the DQS probe twice
......................................................................
Patch Set 1:
> Patch Set 1:
>
> Is this still useful?
I have not seen it improve thing but yes, this is what the vendor does.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/20979 )
Change subject: nb/intel/x4x/raminit: Move dummy reads after JEDEC init
......................................................................
Patch Set 7:
Is this still needed?
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22813 )
Change subject: nb/intel/x4x/rcven.c: Reset the DQS probe twice
......................................................................
Patch Set 1:
Is this still useful?
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25601 )
Change subject: nb/intel/x4x: Use parallel MP init
......................................................................
Patch Set 40:
Why the rebase?
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HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25601 )
Change subject: nb/intel/x4x: Use parallel MP init
......................................................................
Patch Set 40:
> Uploaded patch set 40.
mybe you'll need to rebase on 25600
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