September 2018 - coreboot-gerrit

Change in coreboot[master]: sb/amd/pi/hudson: Remove #if 1
by Jonathan Neuschäfer (Code Review) Sept. 30, 2018

Sept. 30, 2018

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28830 Change subject: sb/amd/pi/hudson: Remove #if 1 ...................................................................... sb/amd/pi/hudson: Remove #if 1 Change-Id: I4cf69dc3df2afaa8f33864374ea93548ab7ad810 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- M src/southbridge/amd/pi/hudson/chip.h 1 file changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/28830/1 diff --git a/src/southbridge/amd/pi/hudson/chip.h b/src/southbridge/amd/pi/hudson/chip.h index aefd310..511b586 100644 --- a/src/southbridge/amd/pi/hudson/chip.h +++ b/src/southbridge/amd/pi/hudson/chip.h @@ -18,14 +18,12 @@ struct southbridge_amd_pi_hudson_config { - #if 1 u32 ide0_enable : 1; u32 sata0_enable : 1; u32 boot_switch_sata_ide : 1; u32 hda_viddid; u8 gpp_configuration; u8 sd_mode; - #endif }; #endif /* HUDSON_CHIP_H */ -- To view, visit https://review.coreboot.org/28830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4cf69dc3df2afaa8f33864374ea93548ab7ad810 Gerrit-Change-Number: 28830 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>

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Change in coreboot[master]: util/crossgcc/buildgcc: Remove quotation marks around hashes
by Jonathan Neuschäfer (Code Review) Sept. 30, 2018

Sept. 30, 2018

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28829 Change subject: util/crossgcc/buildgcc: Remove quotation marks around hashes ...................................................................... util/crossgcc/buildgcc: Remove quotation marks around hashes They were not originally printed, and serve no good purpose, so lets remove them again. Change-Id: I4e00477f2e143f93fd27ba6a083977a667a3eb48 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- M util/crossgcc/buildgcc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/28829/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index dea42ad..42c089d 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -431,7 +431,7 @@ exit 1 fi - printf "${GREEN}hash verified (\"$known_hash\")${NC}\n" + printf "${GREEN}hash verified (${known_hash})${NC}\n" } unpack_and_patch() { -- To view, visit https://review.coreboot.org/28829 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4e00477f2e143f93fd27ba6a083977a667a3eb48 Gerrit-Change-Number: 28829 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>

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Change in coreboot[master]: util/abuild/abuild.1: Fix references to CBROOT parameter
by Jonathan Neuschäfer (Code Review) Sept. 30, 2018

Sept. 30, 2018

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28828 Change subject: util/abuild/abuild.1: Fix references to CBROOT parameter ...................................................................... util/abuild/abuild.1: Fix references to CBROOT parameter One occurence of this parameter was changed from LBROOT to CBROOT in f8ee1806ac ("Rename almost all occurences of LinuxBIOS to coreboot."). Change the others, too. Change-Id: Ic0da24c32cd6d2f0577de037b5463c800f455786 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- M util/abuild/abuild.1 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/28828/1 diff --git a/util/abuild/abuild.1 b/util/abuild/abuild.1 index fbd31f3..2eee84b 100644 --- a/util/abuild/abuild.1 +++ b/util/abuild/abuild.1 @@ -4,13 +4,13 @@ .SH SYNOPSIS .B abuild \fR[\fB\-abrvxsTVh\fR] [\fB\-c\fR numcpus|max] [\fB\-t\fR vendor/board] [\fB\-p\fR dir] -[LBROOT] +[CBROOT] .SH DESCRIPTION .B abuild is a utility used to easily build coreboot images for all available targets. .SH OPTIONS The -.B "[LBROOT]" +.B "[CBROOT]" parameter tells .B abuild where the root directory of the coreboot build tree resides. Per default -- To view, visit https://review.coreboot.org/28828 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic0da24c32cd6d2f0577de037b5463c800f455786 Gerrit-Change-Number: 28828 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>

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Change in coreboot[master]: Documentation: Spell "blob" in lowercase
by Jonathan Neuschäfer (Code Review) Sept. 30, 2018

Sept. 30, 2018

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28827 Change subject: Documentation: Spell "blob" in lowercase ...................................................................... Documentation: Spell "blob" in lowercase It's not an acronym (outside of database software). Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- M Documentation/mainboard/lenovo/xx20_series.md M Documentation/mainboard/lenovo/xx30_series.md M Documentation/northbridge/intel/sandybridge/nri_features.md 3 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/28827/1 diff --git a/Documentation/mainboard/lenovo/xx20_series.md b/Documentation/mainboard/lenovo/xx20_series.md index 976a29b..8603853 100644 --- a/Documentation/mainboard/lenovo/xx20_series.md +++ b/Documentation/mainboard/lenovo/xx20_series.md @@ -26,8 +26,8 @@ * Do **NOT** accidently swap pins or power on the board while a SPI flasher is connected. It will destroy your device. * It's recommended to only flash the BIOS region. In that case you don't - need to extract BLOBs from vendor firmware. - If you want to flash the whole chip, you need BLOBs when building + need to extract blobs from vendor firmware. + If you want to flash the whole chip, you need blobs when building coreboot. * The shipped *Flash layout* allocates 3MiB to the BIOS region, which is the space usable by coreboot. diff --git a/Documentation/mainboard/lenovo/xx30_series.md b/Documentation/mainboard/lenovo/xx30_series.md index e65a3f2..ad85605 100644 --- a/Documentation/mainboard/lenovo/xx30_series.md +++ b/Documentation/mainboard/lenovo/xx30_series.md @@ -26,8 +26,8 @@ * Do **NOT** accidently swap pins or power on the board while a SPI flasher is connected. It will permanently brick your device. * It's recommended to only flash the BIOS region. In that case you don't - need to extract BLOBs from vendor firmware. - If you want to flash the whole chip, you need BLOBs when building + need to extract blobs from vendor firmware. + If you want to flash the whole chip, you need blobs when building coreboot. * The *Flash layout* shows that by default 7MiB of space are available for the use with coreboot. diff --git a/Documentation/northbridge/intel/sandybridge/nri_features.md b/Documentation/northbridge/intel/sandybridge/nri_features.md index 51297bd..d700b54 100644 --- a/Documentation/northbridge/intel/sandybridge/nri_features.md +++ b/Documentation/northbridge/intel/sandybridge/nri_features.md @@ -8,7 +8,7 @@ * There might be errors to fix. * Position in romstage doesn't matter. 2. mrc.bin raminit - * Closed Source (aka BLOB) + * Closed Source (aka blob) * No known errors. * Needs to be placed at fixed offset in romstage. -- To view, visit https://review.coreboot.org/28827 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671 Gerrit-Change-Number: 28827 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>

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Change in coreboot[master]: Documentation/mb/lenovo/t4xx_series: Change "Steps to access the flas...
by Jonathan Neuschäfer (Code Review) Sept. 30, 2018

Sept. 30, 2018

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28826 Change subject: Documentation/mb/lenovo/t4xx_series: Change "Steps to access the flash IC" to sub-heading ...................................................................... Documentation/mb/lenovo/t4xx_series: Change "Steps to access the flash IC" to sub-heading This heading should not be a top-level heading, because it's not at the top of the file. Also remove the trailing colon, because it's unnecessary in a heading. Change-Id: I0685bb8734ad899c29618d24c0497e4fb8c0d01c Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- M Documentation/mainboard/lenovo/t4xx_series.md 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/28826/1 diff --git a/Documentation/mainboard/lenovo/t4xx_series.md b/Documentation/mainboard/lenovo/t4xx_series.md index 23fe0fb..e5e90f1 100644 --- a/Documentation/mainboard/lenovo/t4xx_series.md +++ b/Documentation/mainboard/lenovo/t4xx_series.md @@ -3,7 +3,7 @@ A skilled engineer takes around 40 minutes to disassemble, flash and reassemble the whole device. -# Steps to access the flash IC: +## Steps to access the flash IC * Unplug the main battery * Remove the harddisk, CDROM, ExpressCard, SIM-card, SDcard, SmartCard, ... -- To view, visit https://review.coreboot.org/28826 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I0685bb8734ad899c29618d24c0497e4fb8c0d01c Gerrit-Change-Number: 28826 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>

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Change in coreboot[master]: cpu/intel/car: Fix typo
by Angel Pons (Code Review) Sept. 30, 2018

Sept. 30, 2018

Angel Pons has posted comments on this change. ( https://review.coreboot.org/28805 ) Change subject: cpu/intel/car: Fix typo ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If71ab647f012a735c6aa6939463414407757ab9a Gerrit-Change-Number: 28805 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 30 Sep 2018 07:32:43 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/.../hda: Add and use config for initialization of HDA codecs
by Furquan Shaikh (Code Review) Sept. 30, 2018

Sept. 30, 2018

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28806 to look at the new patch set (#2). Change subject: soc/intel/.../hda: Add and use config for initialization of HDA codecs ...................................................................... soc/intel/.../hda: Add and use config for initialization of HDA codecs Config option SOC_INTEL_COMMON_BLOCK_HDA is currently used for initialization of HDA codecs only. This prevents adding of any static devices under the HDA device node. However, there can be boards which want to add devices under HDA node without performing any codec initialization using the HDA. This change: 1. Adds a new config option SOC_INTEL_COMMON_BLOCK_HDA_VERB that can be set explicitly by the boards that want to perform codec initialization. 2. Uses newly added config option is used to guard the initialization functions for the codec. Rest of the device operations can still be used by all the other boards without having to use HDA codec initialization. 3. Selects the newly added option SOC_INTEL_COMMON_BLOCK_HDA_VERB in kblrvp which was the only board enabling HDA codec initialization using common block code. 4. Selects original config SOC_INTEL_COMMON_BLOCK_HDA for skylake SoC. Above changes need to be bundled and pushed in as a single change in order to avoid breaking existing users. BUG=b:112888584 Change-Id: Ie6f39c13a801833b283120a2d4b6f6175688999c Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/intel/kblrvp/Kconfig M src/soc/intel/common/block/hda/Kconfig M src/soc/intel/common/block/hda/hda.c M src/soc/intel/skylake/Kconfig 4 files changed, 12 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/28806/2 -- To view, visit https://review.coreboot.org/28806 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ie6f39c13a801833b283120a2d4b6f6175688999c Gerrit-Change-Number: 28806 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/common/block/hda: Enable static scanning of devices under HDA
by Furquan Shaikh (Code Review) Sept. 30, 2018

Sept. 30, 2018

Furquan Shaikh has uploaded a new patch set (#2). ( https://review.coreboot.org/28807 ) Change subject: soc/intel/common/block/hda: Enable static scanning of devices under HDA ...................................................................... soc/intel/common/block/hda: Enable static scanning of devices under HDA This change sets scan_bus operation for HDA to scan_static_bus to allow enumeration of static devices under HDA. BUG=b:112888584 Change-Id: I20759c2b702b2f107f0913e7ce92a82c6070ddc4 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/common/block/hda/hda.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/28807/2 -- To view, visit https://review.coreboot.org/28807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I20759c2b702b2f107f0913e7ce92a82c6070ddc4 Gerrit-Change-Number: 28807 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: drivers/generic: Add support for providing DSD properties
by Furquan Shaikh (Code Review) Sept. 30, 2018

Sept. 30, 2018

Hello Benson Leung, Nick Vaccaro, Duncan Laurie, Sathyanarayana Nujella, build bot (Jenkins), HARSHAPRIYA N, I'd like you to reexamine a change. Please visit https://review.coreboot.org/28796 to look at the new patch set (#6). Change subject: drivers/generic: Add support for providing DSD properties ...................................................................... drivers/generic: Add support for providing DSD properties This change adds support in generic device driver to add properties to DSD table. This driver can be used by all generic devices that do not need any special handling other than simply adding device properties to be used by OS. BUG=b:112888584 Change-Id: I0ca6614f1ef322397618676bbf6da898bef18990 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/drivers/generic/generic/Kconfig M src/drivers/generic/generic/Makefile.inc A src/drivers/generic/generic/chip.h A src/drivers/generic/generic/generic.c 4 files changed, 140 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/28796/6 -- To view, visit https://review.coreboot.org/28796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I0ca6614f1ef322397618676bbf6da898bef18990 Gerrit-Change-Number: 28796 Gerrit-PatchSet: 6 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Benson Leung <bleung(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HARSHAPRIYA N <harshapriya.n(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb/google/poppy/variants/nocturne: Add DMIC properties to ACPI DSD
by Furquan Shaikh (Code Review) Sept. 30, 2018

Sept. 30, 2018

Hello Benson Leung, Nick Vaccaro, Duncan Laurie, Sathyanarayana Nujella, build bot (Jenkins), HARSHAPRIYA N, I'd like you to reexamine a change. Please visit https://review.coreboot.org/28797 to look at the new patch set (#6). Change subject: mb/google/poppy/variants/nocturne: Add DMIC properties to ACPI DSD ...................................................................... mb/google/poppy/variants/nocturne: Add DMIC properties to ACPI DSD This change uses the generic device driver to provide DMIC properties in ACPI table to the OS driver. BUG=b:112888584 Change-Id: I239f571bc29f02793f017a4713b5af03b23cfa3e Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/poppy/Kconfig M src/mainboard/google/poppy/variants/nocturne/devicetree.cb 2 files changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/28797/6 -- To view, visit https://review.coreboot.org/28797 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I239f571bc29f02793f017a4713b5af03b23cfa3e Gerrit-Change-Number: 28797 Gerrit-PatchSet: 6 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Benson Leung <bleung(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: HARSHAPRIYA N <harshapriya.n(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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