Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/27294
Change subject: mb/google/octopus/variants/baseboard: Udpate CPU critical temp
......................................................................
mb/google/octopus/variants/baseboard: Udpate CPU critical temp
Observed thermal shutdown by DPTF due to CPU temperature reaching
critical temperature trip value. This patch updates the CPU critical
temperature and power limit1 value to avoid the abrupt thermal
shutdown by DPTF.
BUG=b:79779737
BRANCH=None
TEST=Build coreboot for Octopus board.
Change-Id: Icd786d3c9b5f7c733dac3fd3e22579e2434058a6
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
---
M src/mainboard/google/octopus/variants/baseboard/devicetree.cb
M src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
2 files changed, 7 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/27294/1
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index 6f71f16..9cab69c 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -42,10 +42,11 @@
register "gpe0_dw2" = "PMC_GPE_N_95_64"
register "gpe0_dw3" = "PMC_GPE_N_63_32"
- # PL1 override 12000 mW: Due to error in the energy calculation for
+ # PL1 override 8000 mW: Due to error in the energy calculation for
# current VR solution. Experiments show that SoC TDP max (6W) can
- # be reached when RAPL PL1 is set to 12W.
- register "tdp_pl1_override_mw" = "12000"
+ # be reached when RAPL PL1 is set to 8W.
+ # TODO: Need to tune this value on closed chassis system.
+ register "tdp_pl1_override_mw" = "8000"
# Set RAPL PL2 to 15W.
register "tdp_pl2_override_mw" = "15000"
diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
index 2fafa52..4125e61 100644
--- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
+++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
@@ -15,7 +15,7 @@
/* Below values might change after Thermal Tuning. */
#define DPTF_CPU_PASSIVE 90
-#define DPTF_CPU_CRITICAL 99
+#define DPTF_CPU_CRITICAL 105
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Battery"
@@ -65,7 +65,8 @@
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
3000, /* PowerLimitMinimum */
- 12000, /* PowerLimitMaximum */
+ /* TODO: Need to tune this value on closed chassis system. */
+ 8000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
200 /* StepSize */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Icd786d3c9b5f7c733dac3fd3e22579e2434058a6
Gerrit-Change-Number: 27294
Gerrit-PatchSet: 1
Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com>
Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27293
Change subject: ec/google/chromeec: Remove keyboard initialization
......................................................................
ec/google/chromeec: Remove keyboard initialization
Since none of the boards using chromeec select DRIVERS_PS2_KEYBOARD
now, there is no need to call pc_keyboard_init anymore. This change
gets rid of the call and adds an error message in case any mainboard
using chromeec tries to select this config.
BUG=b:110024487
Change-Id: Ia0b56abe0a5990e527277eaf3397e00dccda3e50
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
---
M src/ec/google/chromeec/ec_lpc.c
1 file changed, 10 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/27293/1
diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c
index 3078c22..b964e3a 100644
--- a/src/ec/google/chromeec/ec_lpc.c
+++ b/src/ec/google/chromeec/ec_lpc.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include <delay.h>
#include <device/pnp.h>
-#include <pc80/keyboard.h>
#include <stdint.h>
#include <stdlib.h>
@@ -27,6 +26,16 @@
#include "ec_commands.h"
/*
+ * Chrome EC driver does not perform keyboard initialization. It relies on the
+ * payload to do this work. If a mainboard using Chrome EC requires
+ * CONFIG_DRIVERS_PS2_KEYBOARD then call to pc_keyboard_init needs to be added
+ * as well.
+ */
+#if IS_ENABLED(CONFIG_DRIVERS_PS2_KEYBOARD)
+#error "CONFIG_DRIVERS_PS2_KEYBOARD is not supported by Chrome EC"
+#endif
+
+/*
* Read bytes from a given LPC-mapped address.
*
* @port: Base read address
@@ -430,7 +439,6 @@
if (!dev->enabled)
return;
- pc_keyboard_init(NO_AUX_DEVICE);
google_chromeec_init();
}
--
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Gerrit-Change-Id: Ia0b56abe0a5990e527277eaf3397e00dccda3e50
Gerrit-Change-Number: 27293
Gerrit-PatchSet: 1
Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>
Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27290
Change subject: payloads/libpayload/drivers/i8042: Disable scanning on disconnect
......................................................................
payloads/libpayload/drivers/i8042: Disable scanning on disconnect
This change ensures that keyboard scanning is disabled and keyboard is
set to default state while disconnecting the keyboard. This is
required to ensure that the controller doesn't keep scanning and
buffering keystrokes which could lead to OS drivers reading stale
data.
BUG=b:110024487
TEST=Verified that kernel driver is able to probe correctly even if
multiple keys are pressed during handoff from payload to OS.
Change-Id: I1ffb8904d545284454c1825ee2e7c0087fc13762
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
---
M payloads/libpayload/drivers/i8042/keyboard.c
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/27290/1
diff --git a/payloads/libpayload/drivers/i8042/keyboard.c b/payloads/libpayload/drivers/i8042/keyboard.c
index d5606a3..062aec2 100644
--- a/payloads/libpayload/drivers/i8042/keyboard.c
+++ b/payloads/libpayload/drivers/i8042/keyboard.c
@@ -338,6 +338,9 @@
while (keyboard_havechar())
keyboard_getchar();
+ /* Disable scanning */
+ keyboard_cmd(I8042_KBCMD_DEFAULT_DIS);
+
/* Send keyboard disconnect command */
i8042_cmd(I8042_CMD_DIS_KB);
--
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Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>
Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27291
Change subject: mb/google/*: Remove selection of DRIVERS_PS2_KEYBOARD
......................................................................
mb/google/*: Remove selection of DRIVERS_PS2_KEYBOARD
Until now, chromeec was doing keyboard initialization for the boards
that have DRIVERS_PS2_KEYBOARD selected. However, coreboot does not
leave the keyboard controller is a default reset state. This could
result in payloads or OS failing to probe the controller as there
could be stale data buffered in the controller during the handoff.
Since the boards using chromeec already perform keyboard
initialization in payload, there is no need to initialize the keyboard
in coreboot too. This change gets rid of DRIVERS_PS2_KEYBOARD
selection from all google mainboards using chromeec.
BUG=b:110024487
TEST=Keyboard works fine after booting to OS even if user hits keys
during BIOS to OS handoff.
Change-Id: I1f49b060eb005c0f2b86f9d68d6758954eeb3cf0
Signed-off-by: Furquan Shaikh <furquan(a)google.com>
---
M src/mainboard/google/eve/Kconfig
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/poppy/Kconfig
M src/mainboard/google/reef/Kconfig
5 files changed, 0 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/27291/1
diff --git a/src/mainboard/google/eve/Kconfig b/src/mainboard/google/eve/Kconfig
index a841f22..7c98339 100644
--- a/src/mainboard/google/eve/Kconfig
+++ b/src/mainboard/google/eve/Kconfig
@@ -5,7 +5,6 @@
select BOARD_ROMSIZE_KB_16384
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
- select DRIVERS_PS2_KEYBOARD
select DRIVERS_I2C_MAX98927
select DRIVERS_I2C_RT5663
select DRIVERS_SPI_ACPI
diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig
index fd43ed6..ef7db04 100644
--- a/src/mainboard/google/kahlee/Kconfig
+++ b/src/mainboard/google/kahlee/Kconfig
@@ -20,7 +20,6 @@
select ALWAYS_RUN_OPROM
select BOARD_ROMSIZE_KB_16384
select DRIVERS_I2C_GENERIC
- select DRIVERS_PS2_KEYBOARD
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID
select EC_GOOGLE_CHROMEEC_LPC
diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig
index 4b2a8f8..34ca725 100644
--- a/src/mainboard/google/octopus/Kconfig
+++ b/src/mainboard/google/octopus/Kconfig
@@ -7,7 +7,6 @@
select DRIVERS_I2C_DA7219
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
- select DRIVERS_PS2_KEYBOARD
select DRIVERS_SPI_ACPI
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID
diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig
index c9a1812..d5f560d 100644
--- a/src/mainboard/google/poppy/Kconfig
+++ b/src/mainboard/google/poppy/Kconfig
@@ -138,7 +138,6 @@
select CHROMEOS_WIFI_SAR if CHROMEOS
select DRIVERS_I2C_MAX98373
select DRIVERS_I2C_DA7219
- select DRIVERS_PS2_KEYBOARD
select DRIVERS_SPI_ACPI
select EXCLUDE_NATIVE_SD_INTERFACE
select MAINBOARD_HAS_SPI_TPM_CR50
@@ -155,7 +154,6 @@
select CHROMEOS_WIFI_SAR if CHROMEOS
select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_DA7219
- select DRIVERS_PS2_KEYBOARD
select DRIVERS_SPI_ACPI
select EXCLUDE_NATIVE_SD_INTERFACE
select MAINBOARD_HAS_SPI_TPM_CR50
@@ -165,7 +163,6 @@
select CHROMEOS_WIFI_SAR if CHROMEOS
select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_DA7219
- select DRIVERS_PS2_KEYBOARD
select VARIANT_HAS_CAMERA_ACPI
select MAINBOARD_HAS_I2C_TPM_CR50
diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig
index 9214421..09b2e61 100644
--- a/src/mainboard/google/reef/Kconfig
+++ b/src/mainboard/google/reef/Kconfig
@@ -7,7 +7,6 @@
select DRIVERS_I2C_DA7219
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
- select DRIVERS_PS2_KEYBOARD
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID
select EC_GOOGLE_CHROMEEC_LPC
--
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Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>