coreboot-gerrit June 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: [WIP]soc/intel/common: Add common code to report platform information
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

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Change in coreboot[master]: [WIP]soc/intel/common: Add bootblock common stage file
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

1 0

Change in coreboot[master]: cbfstool: Update FIT entries in the second bootblock
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26836 ) Change subject: cbfstool: Update FIT entries in the second bootblock ...................................................................... Patch Set 9: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74676/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28786/ : SUCCESS -- To view, visit https://review.coreboot.org/26836 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9a417031c279038903cdf1761a791f2da0fe8644 Gerrit-Change-Number: 26836 Gerrit-PatchSet: 9 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Sat, 09 Jun 2018 00:43:46 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cbfstool: add an option for creating a topswap bootblock
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22537 ) Change subject: cbfstool: add an option for creating a topswap bootblock ...................................................................... Patch Set 18: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74675/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28785/ : SUCCESS -- To view, visit https://review.coreboot.org/22537 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3e455dc8b7f54e55f2229491695cf4218d9cfef8 Gerrit-Change-Number: 22537 Gerrit-PatchSet: 18 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-CC: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Comment-Date: Sat, 09 Jun 2018 00:40:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [WIP] soc/intel/cannonlake: Use bootblock common stage
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25811 ) Change subject: [WIP] soc/intel/cannonlake: Use bootblock common stage ...................................................................... Patch Set 5: (6 comments) https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… File src/soc/intel/cannonlake/bootblock/bootblock.c: https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… PS5, Line 51: #define TCOEN (1 << 1) /* Enable TCO I/O range decode. */ line over 80 characters https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… PS5, Line 127: if (pmc_reg_value != 0xFFFFFFFF) that open brace { should be on the previous line https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… File src/soc/intel/cannonlake/bootblock/report_platform.c: https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… PS5, Line 55: const struct cpu_info* soc_get_cpu_id_table(void) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… PS5, Line 60: const struct mch_info* soc_get_mch_id_table(void) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… PS5, Line 65: const struct pch_info* soc_get_pch_id_table(void) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25811/5/src/soc/intel/cannonlake/bootblock/… PS5, Line 70: const struct igd_info* soc_get_igd_id_table(void) "foo* bar" should be "foo *bar" -- To view, visit https://review.coreboot.org/25811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4397c6d599a9f4ef235755835db3f4d22f81674e Gerrit-Change-Number: 25811 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 09 Jun 2018 00:39:24 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: [WIP]soc/intel/common: Add common code to report platform information
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25810 ) Change subject: [WIP]soc/intel/common: Add common code to report platform information ...................................................................... Patch Set 4: (42 comments) https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… File src/soc/intel/common/basecode/bootblock/report_platform.c: https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 31: __attribute__((weak)) const struct cpu_info* soc_get_cpu_id_table(void) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 37: __attribute__((weak)) const struct mch_info* soc_get_mch_id_table(void) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 43: __attribute__((weak)) const struct pch_info* soc_get_pch_id_table(void) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 49: __attribute__((weak)) const struct igd_info* soc_get_igd_id_table(void) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 65: static void report_cpu_info(const struct cpu_info* cpu_info_table) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 81: int j=0; spaces required around that '=' (ctx:VxV) https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 90: p[12]=0; spaces required around that '=' (ctx:VxV) https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 104: while (cpu_info_table[t].name != NULL ) { space prohibited before that close parenthesis ')' https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 124: static void report_mch_info(const struct mch_info* mch_info_table) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 132: while (mch_info_table[i].name != NULL ) { space prohibited before that close parenthesis ')' https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 144: static void report_pch_info(const struct pch_info* pch_info_table) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 151: while (pch_info_table[i].name != NULL ) { space prohibited before that close parenthesis ')' https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 162: static void report_igd_info(const struct igd_info* igd_info_table) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 169: while (igd_info_table[i].name != NULL ) { space prohibited before that close parenthesis ')' https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 182: const struct cpu_info* cpu_info_table = soc_get_cpu_id_table(); "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 183: const struct mch_info* mch_info_table = soc_get_mch_id_table(); "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 184: const struct pch_info* pch_info_table = soc_get_pch_id_table(); "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/bootb… PS4, Line 185: const struct igd_info* igd_info_table = soc_get_igd_id_table(); "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… File src/soc/intel/common/basecode/include/intelbasecode/report_platform.h: https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 19: struct cpu_info{ missing space after struct definition https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 20: u32 cpuid; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 20: u32 cpuid; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 21: const char *name; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 21: const char *name; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 24: struct mch_info{ missing space after struct definition https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 25: u16 mchid; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 25: u16 mchid; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 26: const char *name; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 26: const char *name; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 29: struct pch_info{ missing space after struct definition https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 30: u16 lpcid; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 30: u16 lpcid; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 31: const char *name; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 31: const char *name; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 34: struct igd_info{ missing space after struct definition https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 35: u16 igdid; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 35: u16 igdid; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 36: const char *name; code indent should use tabs where possible https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 36: const char *name; please, no spaces at the start of a line https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 40: const struct cpu_info* soc_get_cpu_id_table(void); "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 43: const struct mch_info* soc_get_mch_id_table(void); "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 46: const struct pch_info* soc_get_pch_id_table(void); "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/25810/4/src/soc/intel/common/basecode/inclu… PS4, Line 49: const struct igd_info* soc_get_igd_id_table(void); "foo* bar" should be "foo *bar" -- To view, visit https://review.coreboot.org/25810 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id1497b72f784db00a334544f6c5ddc2774049107 Gerrit-Change-Number: 25810 Gerrit-PatchSet: 4 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 09 Jun 2018 00:39:07 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: [WIP]soc/intel/common: Add bootblock common stage file
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18457 ) Change subject: [WIP]soc/intel/common: Add bootblock common stage file ...................................................................... Patch Set 15: (10 comments) https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… File src/soc/intel/common/basecode/bootblock/bootblock.c: https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 59: * Enabling PWRM Base for accessing code indent should use tabs where possible https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 60: * Global Reset Cause Register. code indent should use tabs where possible https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 61: */ code indent should use tabs where possible https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 188: bb_ops->bootblock_soc_early_init= &bootblock_cmn_soc_early_init, spaces required around that '=' (ctx:VxW) https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 190: bb_ops->bootblock_pch_early_init= &bootblock_cmn_pch_early_init, spaces required around that '=' (ctx:VxW) https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 192: bb_ops->bootblock_cpu_early_init= &bootblock_cmn_cpu_early_init, spaces required around that '=' (ctx:VxW) https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 193: bb_ops->bootblock_cpu_init = &bootblock_cmn_cpu_init; please, no space before tabs https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 196: __weak void soc_update_ops(struct bootblock_ops* ops) "foo* bar" should be "foo *bar" https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/boot… PS15, Line 201: void asmlinkage bootblock_c_entry(uint64_t base_timestamp) storage class 'asmlinkage' should be located before type 'void' https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/incl… File src/soc/intel/common/basecode/include/intelbasecode/bootblock.h: https://review.coreboot.org/#/c/18457/15/src/soc/intel/common/basecode/incl… PS15, Line 36: void soc_update_ops(struct bootblock_ops* soc_ops); "foo* bar" should be "foo *bar" -- To view, visit https://review.coreboot.org/18457 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If84c08d33f6f8fd3cd9722ee893653f1d1ae90c1 Gerrit-Change-Number: 18457 Gerrit-PatchSet: 15 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Sat, 09 Jun 2018 00:38:51 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: util/sconfig: Get rid of rescnt in struct device
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26806 ) Change subject: util/sconfig: Get rid of rescnt in struct device ...................................................................... Patch Set 8: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74674/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28784/ : SUCCESS -- To view, visit https://review.coreboot.org/26806 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I73a2361686ad1130716a7d29576f2d02b9ed33c1 Gerrit-Change-Number: 26806 Gerrit-PatchSet: 8 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Jun 2018 23:43:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: arch/arm/armv7: Fix coding style
by Julius Werner (Code Review) 09 Jun '18

09 Jun '18

Julius Werner has posted comments on this change. ( https://review.coreboot.org/26831 ) Change subject: arch/arm/armv7: Fix coding style ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/26831 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib5d574347373009c8021597f555e6e86c2c0c41f Gerrit-Change-Number: 26831 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Jun 2018 22:39:07 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/google/kahlee: Remove Kahlee variant
by build bot (Jenkins) (Code Review) 09 Jun '18

09 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26777 ) Change subject: mainboard/google/kahlee: Remove Kahlee variant ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74672/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28782/ : SUCCESS -- To view, visit https://review.coreboot.org/26777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4eeeee7f35381bba8760c8a530251c475d0ee29b Gerrit-Change-Number: 26777 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 Jun 2018 20:47:19 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit June 2018